Lecture 9

Multiplexers & Demultiplexers

Multiplexers

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 Multiplexers
 A multiplexer has
− N control inputs
− 2N data inputs
− 1 output
 A multiplexer routes (or connects) the selected
data input to the output.
− The value of the control inputs determines
the data input that is selected.

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 Multiplexers
 2-to-1 Mux

Data
inputs
Control 4
input
 Multiplexers
 2-to-1 Mux

A Z

0 I0

1 I1

Z = A′.I0 + A.I1

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 Multiplexers
 4-to-1 Mux

A B Z
0 0 I0
0 1 I1
1 0 I2
1 1 I3

MSB LSB

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Z = A′.B'.I0 + A'.B.I1 + A.B'.I2 + A.B.I3
 Multiplexers
 4-to-1 Mux A B Z
0 0 I0
0 1 I1
1 0 I2
1 1 I3

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Z = A′.B'.I0 + A'.B.I1 + A.B'.I2 + A.B.I3
 Multiplexers
 8-to-1 Mux
A B C Z
0 0 0 I0
0 0 1 I1
0 1 0 I2
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7
MSB LSB

Z = A′.B'.C'.I0 + A'.B'.C.I1 + A'.B.C'.I2 + A'.B.C.I3 +

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A.B'.C’.I4 + A.B'.C.I5 + A'.B.C’.I6 + A.B.C.I7
Multiplexers

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 Multiplexers

 Design a 4-to-1 multiplexer using 2-to-1

multiplexers only.
E S1 S0 F
1 0 0 I0
1 0 1 I1
F 1 1 0 I2
1 1 1 I3
0 X X X

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 Multiplexers

Exercise 1:

Design an 8-to-1 multiplexer using

4-to-1 and 2-to-1 multiplexers only.

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 Multiplexers

Exercise 2:

Design a 16-to-1 multiplexer using

4-to-1 multiplexers only.

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Designing logic circuits using multiplexers

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 Using an n-input Multiplexer
 Use an n-input multiplexer to realize a logic circuit for
a function with n minterms.
− m = 2n, where m = # of variables in the function
 Each minterm of the function can be mapped to an
input of the multiplexer.
 For each row in the truth table, for the function,
where the output is 1, set the corresponding input of
the multiplexer to 1.
− That is, for each minterm in the minterm expansion of the
function, set the corresponding input of the multiplexer to 1.
 Set the remaining inputs of the multiplexer to 0.
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 Using an n-input Mux
Ex.: Design a logic circuit to realize the following
Boolean function, using an 8-to-1 multiplexer

F(X,Y,Z) = Σm(0, 2, 4, 5)
Sol.:

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 Using an n-input Mux

Example:

Using an 8-to-1 multiplexer, design a logic circuit

to realize the following Boolean function

F(A,B,C) = Σm(1, 2, 4)

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 Using an (n / 2)-input Multiplexer
 Use an (n / 2)-input multiplexer to realize a logic
circuit for a function with n minterms.
− m = 2n, where m = # of variables in the function
 Group the rows of the truth table, for the function, into
(n / 2) pairs of rows.
− Each pair of rows represents a product term of (m – 1)
variables.
− Each pair of rows can be mapped to a multiplexer input.
 Determine the logical function of each pair of rows in
terms of the mth variable.
− If the mth variable, for example, is x, then the possible
values are x, x', 0, and 1. 17
 Using an (n / 2)-input Mux
Ex.: Use a 4-to-1 multiplexer to implement the
function F(x,y,z) = Σm(1, 2, 6, 7)

Sol.:

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 Using an (n / 2)-input Mux
Ex.: Use a 8-to-1 Multiplexer to implement the
function F(A,B,C,D) = Σm(1,3,4,11,12,13,14, 15)

Sol.:

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 Using an (n / 4)-input Mux

The design of a logic circuit using an (n / 2)-input

multiplexer can be easily extended to the use of
an (n / 4)-input multiplexer.

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 Using an (n / 4)-input Mux
Ex.: Use a 4-to-1 Multiplexer to implement the
function F(A,B,C,D) = Σm(1,3,4,11,12,13,14, 15)

Sol.:

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Demultiplexers

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 Demultiplexers
 A demultiplexer has
− N control inputs
− 1 data input
− 2N outputs
 A demultiplexer routes (or connects) the data input to
the selected output.
− The value of the control inputs determines the output
that is selected.
 A demultiplexer performs the opposite function of a
multiplexer.
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 Demultiplexers
 A 1-to-4 Demultiplexer

Out0 Y0 Y0 = A'.B'.D
Out1 Y1 Y1 = A'.B.D
Data D In Out2 Y2
Y2 = A.B'.D
Out3 Y3
S1 S0 Y3 = A.B.D

A B
A B Y0 Y1 Y2 Y3
0 0 D 0 0 0
0 1 0 D 0 0
1 0 0 0 D 0
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1 1 0 0 0 D
 Demultiplexers
 A 1-to-4 Demultiplexer

A B Y0 Y1 Y2 Y3
0 0 D 0 0 0
0 1 0 D 0 0
1 0 0 0 D 0
1 1 0 0 0 D

Y0 = A'.B'.D
Y1 = A'.B.D
Y2 = A.B'.D
Y3 = A.B.D
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Internal structure of a 1-to-4 Demultiplexer
 Demultiplexers
 A 1-to-8 Demultiplexer

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 Demultiplexers
 A 1-to-8 Demultiplexer

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 Demultiplexers
 A 1-to-8 Demultiplexer

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 Demultiplexers
 Example: Design a 1-to-8 Demultiplexer using 1-to-4
Demultiplexers.
Sol.: En Select DeMux-1 outputs DeMux-2 outputs
A B C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
0 0 0 D 0 0 0 0 0 0 0

0 0 1 0 D 0 0 0 0 0 0

0 1 0 0 0 D 0 0 0 0 0

0 1 1 0 0 0 D 0 0 0 0

1 0 0 0 0 0 0 D 0 0 0

1 0 1 0 0 0 0 0 D 0 0

1 1 0 0 0 0 0 0 0 D 0

1 1 1 0 0 0 0 0 0 0 D
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 Demultiplexers
 Example: Design a 1-to-8 Demultiplexer using 1-to-4
Demultiplexers.
Sol.:

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Questions?

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