Instruction Set of 8085

An instruction is a binary pattern designed inside a microprocessor to perform a

specific function. The entire group of instructions that a microprocessor supports is

called Instruction Set.

Classification of Instruction Set

1. Data Transfer Instruction

2. Arithmetic Instructions
3. Logical Instructions
4. Branching Instructions

Data Transfer Instruction

➢ These instructions move data between registers, or between memory and registers.
➢ These instructions copy data from source to destination.
➢ While copying, the contents of source are not modified.

Instruction Syntax Meaning

MOV(Move Data MOV Rd, Rs Copies the data from the source register (Rs) to the
between Registers) destination register (Rd).
MVI(Move Immediate MVI Rd, data Moves an 8-bit immediate data value into a register.

Data)

LDA LDA 16-bit address load data from a specified memory address into the
accumulator (A register).
(load accumulator) LAD 2500H
STA(Store Accumulator STA 16-bit_address used to store the contents of the accumulator (A register)

Direct) STA 2500H into a specified memory location.

LHLD(Load HL Pair LHLD 16-bit_address used to load the HL register pair (H and L registers) with the

Direct) LHLD 2500H 16-bit contents from a specified memory location.

SHLD SHLD 2500H used to store the contents of the
(Store HL Pair Direct) HL register pair (H and L
registers) into a specified 16-bit
memory location.
LXI LXI RP, 16-bit data load a 16-bit immediate value
(Load Register Pair RP-register pairs into a register pair (BC, DE, or
Immediate) HL).
XCHG XCHG exchanges the contents of the HL
(Exchange HL with DE) The contents of H are copied to D. register pair with the contents of
The contents of L are copied to E. the DE register pair.
The contents of D are copied to H.
The contents of E are copied to L.
LDAX LDAX rp used to load the accumulator (A)
(Load Accumulator Indirect) Where rp (register pair) can be: with the 16-bit data from the
B (BC register pair) memory location pointed to by
D (DE register pair) the register pair BC or DE
(depending on the variant of the
instruction).
SDAX STAX rp used to store the contents of the
(Store Accumulator Indirect) Where rp (register pair) can be: accumulator (A) into the
B (BC register pair) memory location whose address
D (DE register pair) is specified in a register pair (BC
or DE).
2. Arithmetic Instructions
Arithmetic instructions perform operations such as addition, subtraction,
increment, and decrement on registers, memory, or immediate data.
Instruction Syntax meaning
ADD Syntax: ADR R Meaning: Adds the contents of
register R to the accumulator.
ADI Syntax: ADI data Meaning: Adds an 8-bit
MVI A, 05H immediate data to A.
ADI 03H ; A = A + 03H (A
= 08H)
ADC R (Add Register to Syntax: ADC R Meaning: Adds register R and
Accumulator with Carry) MVI A, 05H carry flag (CY) to A.
MVI B, 03H
STC ; Set carry flag (CY =
1)
ADC B ; A = A + B + CY
(A = 05H + 03H + 1 = 09H)
ACI data (Add Immediate to Syntax: ACI data Meaning: Adds an immediate
Accumulator with Carry) MVI A, 05H 8-bit data and carry flag to A.
STC ; Set carry flag (CY =
1)
 ACI 03H ; A = A + 03H +
CY (A = 09H)
SUB R Syntax: SUB R Meaning: Subtracts register R
(Subtract Register from MVI A, 08H from A.
Accumulator) MVI B, 03H
SUB B ; A = A - B (A =
08H - 03H = 05H)
SUI data (Subtract Syntax: SUI data Meaning: Subtracts an
Immediate from MVI A, 08H immediate 8-bit data from A.
Accumulator) SUI 03H ; A = A - 03H (A =
05H)
SBB R Syntax: SBB R Meaning: Subtracts register R
(Subtract Register from MVI A, 08H and borrow (CY) from A.
Accumulator with Borrow) MVI B, 03H
STC ; Set carry flag (CY =
1)
SBB B ; A = A - B - CY (A
= 08H - 03H - 1 = 04H)
SBI data Syntax: SBI data Meaning: Subtracts an
(Subtract Immediate from MVI A, 08H immediate 8-bit data and
Accumulator with Borrow) STC borrow from A.
SBI 03H ; A = A - 03H - CY
(A = 04H)
INR R (Increment Register) Syntax: INR R Meaning: Increments the
MVI B, 05H register by 1.
INR B ; B = B + 1 (B =
06H)

INX RP (Increment Register Syntax: INX RP Meaning: Increments the

Pair) LXI B, 1000H register pair by 1.
INX B ; BC = BC + 1
(1001H)
DCR R (Decrement Register) Syntax: DCR R Meaning: Decrements the
MVI C, 05H register by 1.
DCR C ; C = C - 1 (04H)
DCR M (Decrement Syntax: DCR M Meaning: Decrements the value
Memory) LXI H, 2000H at memory location (HL) by 1.
MOV M, 05H
DCR M ; (HL) = (HL) - 1
(04H)
DCX RP (Decrement Register Syntax: DCX RP Meaning: Decrements the
Pair) LXI D, 1000H register pair by 1.
DCX D ; DE = DE - 1
(0FFFH)
DAA (Decimal Adjust Syntax: DAA Meaning: Converts A into
Accumulator) MVI A, 38H Binary-Coded Decimal (BCD)
MVI B, 45H format after addition.
ADD B
DAA
DAD (Double Addition) DAD RP DAD (Double Addition) is used
for 16-bit addition. It adds the
content of a register pair (BC,
DE, HL, or SP) to the HL
register pair and stores the
result in HL

3. Logical Instructions
Logical instructions perform bitwise operations like AND, OR, XOR, compare, and
complement on data stored in the accumulator (A).

Instruction syntax meaning

ANA R (AND Register with Syntax: ANA R Meaning: Performs bitwise
Accumulator) AND between the register R
and the accumulator (A). The
result is stored in A.
ANI data (AND Immediate Syntax ANI data Meaning: Performs bitwise
with Accumulator) AND between immediate
data and A.
ORA R (OR Register with ORA R Performs bitwise OR between
Accumulator) register R and A.
ORI data (OR Immediate ORI data Meaning: Performs OR
with Accumulator) operation between immediate
data and A.
XRA R (XOR Register with XRA R Meaning: Performs bitwise
Accumulator) XOR between register R and
A.
XRI data (XOR Immediate XRI data Performs XOR between
with Accumulator) immediate data and A.

CMP R (Compare Register CMP R Meaning: Compares register

with Accumulator) R with A (performs A - R but
does not store the result).
CPI data (Compare CPI data Compares immediate data
Immediate with with A.
Accumulator)
CMA (Complement CMA Meaning: Flips all bits in A
Accumulator) (A = ~A).
 CMC (Complement Carry) CMC Meaning: Toggles the Carry
STC ; Set carry (CY) flag.
CMC ; Complement carry
(CY = 0)
RLC (Rotate Left through Syntax The RLC instruction rotates
Carry) RLC the accumulator (A) left by
one bit. The MSB (Most
Significant Bit) moves to the
LSB (Least Significant Bit)
and also to the Carry (CY)
flag.
RLC (Rotate Right through
Carry)

Flags in the 8085 Microprocessor

The 8085 microprocessor has five primary status flags that indicate the result of an arithmetic or
logical operation. These flags are stored in the Flag Register and are set (1) or reset (0) based on
the result of an operation.

Flag Condition when SET (1) Condition when RESET (0)

Sign(S) Result is negative (MSB = 1) Result is positive (MSB = 0)

Zero (Z) Result is zero (00H) Result is nonzero

Parity (P) Even number of 1s in the result Odd number of 1s in the result

Auxiliary Carry (AC) Carry from bit 3 to bit 4 No carry from bit 3 to bit 4

Y (Unused) Not a valid flag in 8085 Not applicable