Week 02 Assignment Solution
Week 02 Assignment Solution
QUESTION 1:
Suppose for Kernighan‐Lin algorithm unequal sized blocks can be used during partitioning.
Given a circuit with 64 nodes where one block contains 26 nodes and another contains 38
nodes, what will be the maximum number of exchanges?
a. 26
b. 38
c. 64
d. 32
Correct Answer: a
Detailed Solution:
For K‐L algorithm with unequal blocks, the maximum number of exchanges is defined by
MIN(n1,n2), where n1 is the number of nodes in block 1 and n2 is number of nodes in block 2.
Hence in this case, it is MIN(26, 38) = 26.
Hence correct option is (a).
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QUESTION 2:
Which of the following statement(s) is/are true for performance driven partitioning?
a. On chip delay is of the order of milliseconds
b. On chip delay is of the order of nanoseconds
c. On board delay is of the order of milliseconds
d. On board delay is of the order of nanoseconds
Correct Answer: b, c
Detailed Solution:
For performance driven partitioning on chip delay is of the order of nanoseconds and on‐board
delay is of the order of milliseconds.
Hence the correct options are (b) and (c).
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QUESTION 3:
Which of the following statement(s) is/are true for floorplanning and placement?
a. For placement all blocks have well‐defined geometric shapes.
b. For placement the block size is flexible and have fixed pin‐locations.
c. For floorplanning the blocks can be flexible and the pin locations can be
changed.
d. For floorplanning the blocks can be flexible and the pin locations cannot be
changed.
Correct Answer: a, c
Detailed Solution:
For placement all blocks have well‐defined geometric shapes and pin locations, whereas for
floorplanning the blocks can be flexible and pin locations can be changed.
Hence correct options are (a) and (c).
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QUESTION 4:
Consider two rectangular blocks X and Y with their centers located at the co‐ordinates (10,15)
and (40,20) respectively during floorplanning. There are 20 wires that connect the two blocks.
What will be the wire length estimate between X and Y?
a. 700 units
b. 600 units
c. 550 units
d. 580 units
Correct Answer: a
Detailed Solution:
During floorplanning, the wire length between two blocks is estimated as the product of the
number of interconnecting wires and the Manhattan distance between the centers of the two
blocks. In this case, the Manhattan distance is (40 – 10) + (20 – 15) = 35 units. Hence, the wire
length estimate will be 20 x 35 = 700 units.
Hence option (a) is correct.
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QUESTION 5:
Which of the following is/are true?
a. For a planar triangulated partition graph, it is always possible to find a
rectangular floorplan.
b. For a planar triangulated partition graph, it may not be always possible to find a
rectangular floorplan.
c. If the partition graph does not contain any complex triangle, it is not possible to
find a rectangular floorplan.
d. If the partition graph contains a complex triangle, it is not possible to find a
rectangular floorplan.
Correct Answer: b, d
Detailed Solution:
If a partition graph contains a complex triangle, which is also a planar triangulated graph, then
the corresponding rectangular floorplan does not exist. If there are no complex triangles, it is
always possible to find a rectangular floorplan. Hence, (a) and (d) are false. Following the same
argument, the options (b) and (d) are true.
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QUESTION 6:
Four blocks B1, B2, B3 and B4 are placed in a floorplan with center co‐ordinates as (15,25),
(25,55), (45,65) and (55,75) respectively. The numbers of wires connecting B1 and B2 is 10,
B1 and B3 is 8, B2 and B4 is 6, and B1 and B4 is 2. The estimated wire length will be
_____________ units.
Detailed Solution:
The Manhattan distances can be calculated as:
MD (B1,B2) = (25 – 15) + (55 – 25) = 40
MD (B1,B3) = (45 – 15) + (65 – 25) = 70
MD (B2,B4) = (55 – 25) + (75 – 55) = 50
MD (B1,B4) = (55 – 15) + (75 – 25) = 90
Hence, the estimated wire length = 40 * 10 + 70 * 8 + 50 * 6 + 90 * 2 = 1440
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QUESTION 7:
For which of the following combinational circuit modules, the set of input lines form a set of
functionally equivalent pins?
a. 4‐input NAND gate
b. 4‐input EXOR gate
c. 2‐to‐1 multiplexer
d. A circuit realizing the function F = A.B + B.C + A.C
Correct Answer: a, b, d
Detailed Solution:
For NAND and EXOR gates, if the orders of the inputs are changed, the output function does not
change. Also, (d) is an example of symmetric function, for which also the same is true. However,
a 2‐to‐1 multiplexer realizes the function F = S’.A + S.B, where clearly the function will change if
input variables are interchanged.
Hence, the correct options are (a), (b) and (d).
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QUESTION 8:
Consider a 3‐terminal net with terminal co‐ordinates (30,10), (50,30), and (60,40) respectively.
The estimated length of the net using the complete graph topology will be __________ units.
Correct Answer: 80
Detailed Solution:
The co‐ordinates of the 3 points are: A (30,10), B (50,30), and C (60,40). The pairwise distances
are:
AB = (50 – 30) + (30 – 10) = 40
AC = (60 – 30) + (40 – 10) = 60
BC = (60 – 50) + (40 – 30) = 20
Total distance = 40 + 60 + 20 = 120
Hence, estimated length of the net = 2/3 * 120 = 80 units
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QUESTION 9:
Consider a 4‐terminal net with terminal co‐ordinates (10,5), (20,15), (30,40) and (70,20)
respectively. The estimated length of the net using the semi‐perimeter topology will be
__________ units.
Correct Answer: 95
Detailed Solution:
The co‐ordinates of the 4 points are: A (10,5), B (20,15), C (30,40) and D (70,20). The smallest
and the largest x‐ and y‐ co‐ordinates are:
x_min = 10
x_max = 70
y_min = 5
y_max = 40
Hence, semi‐perimeter length = (70 – 10) + (40 – 5) = 95 units
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QUESTION 10:
With respect to modeling of interconnects during placement, which of the following topologies
most closely resembles the actual routing paths?
a. Rectangular Steiner tree
b. Minimum spanning tree
c. Complete graph
d. Semi‐perimeter
Correct Answer: a
Detailed Solution:
In an actual routing path, the segments of the path are typically horizontal or vertical, and most
closely resemble a rectangular Steiner tree.
The correct option is (a).
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