Data Line Sharing in TFT-LCD With The Integrated Gate Driver
Data Line Sharing in TFT-LCD With The Integrated Gate Driver
Park
Introduction
DLS : Reduction of Source Driver IC
Amorphous Silicon (a-Si) technology is very
suitable for large area display application. Because it To reduce the number of source driver IC, we
has low-cost, low processing temperature, and better should change the date - pixel - gate structure. By
uniformity even in large area applications. So, it is using data line sharing(DLS) structure, we could
widely used as a switching device of pixel elements in reduce the half of the source driver ICs. Fig.1 shows
active matrix liquid crystal display (AMLCD). the schematic diagram of DLS structure. Two
Integrating driver IC on the panel is getting more neighboring pixels share the same data line with each
important in LCD technology, because it can reduce gate line and pixel TFT. So, total number of gate line
the cost of driver ICs and the number of module increases double as that of the conventional pixel
processes. structure.
For a long time, it has been regarded the two things
make the a-Si TFT based gate driver integration
impractical. One is that a-Si TFT has low mobility, so
the widths of the TFT should extend to a degree of
thousands of microns. The other is the instability of a-
Si TFT. The threshold voltage of a-Si TFT is shifted
due to applied bias voltage during the operation. The
insufficient life-time of circuits has been the critical
barrier to prevent a-Si TFT drivers from the
technology used in TFT LCD mass-production. [1,4]
We have developed LGD’s own integrated a-Si gate
driver with extreme stability as indicated by our
previous papers. [2,3]
Fig. 1. Schematic diagram for Data line sharing
Recently, a few companies also have succeeded in
(DLS) structure
A. HDAC circuits.
comparable to the current DAC type gate driver. qualification processes at various companies, the
In this work, we adopted hyper DAC structure reliability of this panel has successfully approved.
(HDAC). Table 2 shows the comparison the concepts
of HDAC and DAC. HDAC is the QB sharing
technology which vertically neighboring two gate B. Short Channel TFT.
driver share their QB nodes and reduce 2 sets of QB
node control TFTs. [5,6] To secure the stable performance of integrated gate
driver, we should enhance the output characteristics of
a-Si TFT. By reducing the TFT’s channel length from
6um to below 5um, we could achieve the ~15% of
improvement in the output current, and also can cover
the variation of TFT characteristics which can occur
during the mass production. So, we experienced no
loss in the yield of the TFT-LCD production in this
14.1 WXGA TFT-LCD with DLS technologies.
Summary
Acknowledgement
References
1. J. Jeon, K. Chu, W.K. Lee, J. Song, and H. Kim.,
SID Digest, p.10 (2004).