0% found this document useful (0 votes)
18 views4 pages

Data Line Sharing in TFT-LCD With The Integrated Gate Driver

Uploaded by

nellynho donald
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
18 views4 pages

Data Line Sharing in TFT-LCD With The Integrated Gate Driver

Uploaded by

nellynho donald
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

19-3 / K. S.

Park

Data Line Sharing in TFT-LCD with the Integrated Gate Driver

KwonShik Park, NamWook Cho, MinDoo Chun, TaeWoong Moon, YongHo


Jang, HeaYeol Kim, Binn Kim, SeungChan Choi, HyungNyuck Cho,
ChangIl Ryoo, SooYoung Yoon, ChangDong Kim and InByeong Kang
R&D Center, LG Display Ltd., Deogeun-ri, Woolong-myeon, Paju-si, Gyeonggi-
do, 413-811, Korea
TEL:82-31-933-5035, e-mail: [email protected]

Abstract mass-producing the LCD panel with the integrated


We have succeeded in producing the world 1st TFT gate-driver IC. By making the integrated gate-driver
LCD panel adapting the data line sharing method. In the by conventional a-Si TFT as same as the pixel TFT,
data line sharing structure, two neighboring pixels share they can reduce the cost of driver ICs and the number
one data line. We also adapted time shared data driving of module processes.
with a-Si TFT based circuit integration technology of LG In these days, to widen the application of a-Si
Display’s own. By using these technologies, we can
integrated gate driver, we have concentrated on the
reduce the number of source driver ICs by half,
compared to that of the existing gate driver integrated reduction of the area of the unit integrated gate driver
TFT LCD panel. and also enhancement of the output characteristics of
gate driver. As the results of our research, we can
achieve the world’s 1st mass production of 14.1
Keywords : a-Si TFT, Data line sharing, integrated gate WXGA TFT-LCD panel with integrated gate driver
driver
and 50% of source driver ICs.

Introduction
DLS : Reduction of Source Driver IC
Amorphous Silicon (a-Si) technology is very
suitable for large area display application. Because it To reduce the number of source driver IC, we
has low-cost, low processing temperature, and better should change the date - pixel - gate structure. By
uniformity even in large area applications. So, it is using data line sharing(DLS) structure, we could
widely used as a switching device of pixel elements in reduce the half of the source driver ICs. Fig.1 shows
active matrix liquid crystal display (AMLCD). the schematic diagram of DLS structure. Two
Integrating driver IC on the panel is getting more neighboring pixels share the same data line with each
important in LCD technology, because it can reduce gate line and pixel TFT. So, total number of gate line
the cost of driver ICs and the number of module increases double as that of the conventional pixel
processes. structure.
For a long time, it has been regarded the two things
make the a-Si TFT based gate driver integration
impractical. One is that a-Si TFT has low mobility, so
the widths of the TFT should extend to a degree of
thousands of microns. The other is the instability of a-
Si TFT. The threshold voltage of a-Si TFT is shifted
due to applied bias voltage during the operation. The
insufficient life-time of circuits has been the critical
barrier to prevent a-Si TFT drivers from the
technology used in TFT LCD mass-production. [1,4]
We have developed LGD’s own integrated a-Si gate
driver with extreme stability as indicated by our
previous papers. [2,3]
Fig. 1. Schematic diagram for Data line sharing
Recently, a few companies also have succeeded in
(DLS) structure

IMID/IDMC/ASIA DISPLAY ‘08 DIGEST •


19-3 / K. S. Park

output properties are needed. The area where we can


integrate the driver reduces into half by double gate
It also means the height of unit integrated gate lines (800ea. Æ 1,600ea.). And, the pixel charging
driver decrease the half of the original pixel height. time (1H time) is decreased into 50% by data line
In the view point of the operating timing, the sharing (20us Æ 10us). TABLE.1 shows that
charging time of each pixel reduces into the half of the situations.
conventional by adopting the DLS structure. Fig.2 is
the simple timing chart for this DLS technology. TABLE 1. Comparison of integrated gate driver
and DLS with integrated gate driver

As below equation, the output current of the buffer


Fig. 2 Signal diagram for the DLS structure TFT is directly proportional to the performance of
integrated gate driver.
There are so many diversities in DLS structures. We
have investigated several pixel rendering structures, §W ·
I output D ¨ ¸ ˜ P
and found two kinds of pixel structures. Using the one ©L¹
of them we could achieve the mass production of the W : channel width
TFT-LCD panel for NBPC. Fig.3 is the typical two L : channel length
type of pixel rendering in DLS pixel structures.
Pmobilityࣜ
During development period, two types have been
shown little differences in their display properties.
The output current is proportional to the channel
width and the mobility of the TFT. So, to guarantee
the performance of integrated gate driver in DLS
structure, we adopted our genuine gate driver
schematic, Hyper Dual AC structure (HDAC). And we
also adopted shorten the length of TFTs to improve
the performance of unit TFT.

A. HDAC circuits.

From our previous works, we have already


developed the integrated gate driver with extreme
Fig. 3 Schematic diagram for the typical pixel stability. The main idea for the extreme stability is the
rendering structure in DLS technology dual pull-down structure (DAC). And, this LGD’s
own circuit is adopted into the TFT-LCD production.
Fig. 4 is the basic diagram and QB timing for DAC
Improvement of the performance of integrated circuit.
gate drivers But, to achieve the upgrade the performance of
integrated gate driver, we developed several QB node
By adapting DLS structure, almost 4 times of sharing technology and confirmed its reliability is

• IMID/IDMC/ASIA DISPLAY ‘08 DIGEST


19-3 / K. S. Park

comparable to the current DAC type gate driver. qualification processes at various companies, the
In this work, we adopted hyper DAC structure reliability of this panel has successfully approved.
(HDAC). Table 2 shows the comparison the concepts
of HDAC and DAC. HDAC is the QB sharing
technology which vertically neighboring two gate B. Short Channel TFT.
driver share their QB nodes and reduce 2 sets of QB
node control TFTs. [5,6] To secure the stable performance of integrated gate
driver, we should enhance the output characteristics of
a-Si TFT. By reducing the TFT’s channel length from
6um to below 5um, we could achieve the ~15% of
improvement in the output current, and also can cover
the variation of TFT characteristics which can occur
during the mass production. So, we experienced no
loss in the yield of the TFT-LCD production in this
14.1 WXGA TFT-LCD with DLS technologies.

C. Low resistance of metal line

In DLS structure, the number of pixel TFTs which


connected to 1 data line becomes twice. So, the data
line load increased. By decreasing the resistance of
data line metal, we could solve the data line delay
issues. And, also by adapting low-resistance gate line,
we could get a lower gate delay. Fig 5. shows the
measured output of gate driver of this work. By
adopting low resistance metal lines (gate line & data
Figure 4. (a) Schematic block diagram of gate line) we could reduce ~ 0.4us of falling time.
driver circuit with the dual pull-down (DAC) TFTs
structure and (b) timing diagram of two QB-nodes
of gate driver

TABLE 2. Comparison of the sharing type of DAC


and HDAC GD

Figure 5. The measured output characteristics of


integrated gate driver in 14.1” WXGA
TFT-LCD with DLS technologies.

With this HDAC gate driver, we could successfully


integrate gate driver into 50% area and operate faster
in double rates in 14.1 WXGA TFT-LCD. Via

IMID/IDMC/ASIA DISPLAY ‘08 DIGEST •


19-3 / K. S. Park

4. F.R. Libsch and J. Kanichik, Appl. Phys. Lett.,


p.1286 (1993)

5. Y.H. Jang, S.Y. Yoon, B. Kim, M.D. Chun, H.N.


Cho, N.W. Cho, C.Y. Sohn, S.H. Jo, S.C. Choi, C.-
D. Kim, and I.-J. Chung, IMID05 Digest, p.944
(2005).

6. B. Kim, Y.H. Jang, S.Y. Yoon, M.D. Chun, H.N.


Cho, N.W. Cho, C.Y. Sohn, S.H Jo, S. C. Choi, C.-
D. Kim, and I.-J. Chung, IDW Digest , (2005).

Figure 6. The comparison between the normal


LCD panel and the DLS LCD panel
(LG Display’s 14.1” WXGA NBPC : The
world 1st mass production)

Summary

We presented the integrated a-Si gate driver for


DLS(data line sharing), by which only three 640-
channel data driver ICs are needed in 14.1” WXGA
(1280X800) TFT-LCD Panel. The 14.1” WXGA panel
adopting the integrated gate driver was successfully
developed and it was the world’s 1st mass production
of TFT-LCD panel with a-Si TFT gate driver and
halved source driver ICs.

Acknowledgement

The authors would like to thank other members in


Anyang Lab & NBPC Panel Development for their
support in this work.

References
1. J. Jeon, K. Chu, W.K. Lee, J. Song, and H. Kim.,
SID Digest, p.10 (2004).

2. Y.H. Jang, S.Y. Yoon, B. Kim, M.D. Chun, H.N.


Cho, N.W. Cho, C.D. Kim, and I.J. Chung, IDW
Digest 04, p.333 (2004)

3. S.Y. Yoon, Y.H. Jang, B. Kim, M.D. Chun, H.N.


Cho, N.W. Cho, C.Y. Sohn, S.H. Jo, C.D. Kim and
I.J. Chung, SID Digest, p.348 (2005)

• IMID/IDMC/ASIA DISPLAY ‘08 DIGEST

You might also like