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Division Algorithms in Computer Organization and Architecture

The document discusses division algorithms in computer organization, focusing on Restoring Division, Non-Restoring Division, and SRT Division. It outlines the basic concepts of binary division, algorithm steps, advantages, disadvantages, and hardware implementations for each method. The conclusion highlights the trade-offs between simplicity, speed, and hardware complexity in selecting an appropriate division algorithm.

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0% found this document useful (0 votes)
101 views

Division Algorithms in Computer Organization and Architecture

The document discusses division algorithms in computer organization, focusing on Restoring Division, Non-Restoring Division, and SRT Division. It outlines the basic concepts of binary division, algorithm steps, advantages, disadvantages, and hardware implementations for each method. The conclusion highlights the trade-offs between simplicity, speed, and hardware complexity in selecting an appropriate division algorithm.

Uploaded by

deepuarumugam22
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Division Algorithms in Computer Organization and Architecture

Division in computer systems is more complex than multiplication and involves


iterative algorithms to compute the quotient and remainder. This document
covers the key division algorithms as discussed in Morris Mano's book,
including Restoring Division, Non-Restoring Division, and SRT Division.

1. Basic Concepts of Binary Division


 Division of two n-bit numbers produces:
o Quotient (Q): Result of division.
o Remainder (R): What is left after division.
 Dividend (N) = Divisor (D) × Quotient (Q) + Remainder (R), where 0 ≤
R < D.
 Division can be unsigned or signed (using Two’s Complement).

2. Restoring Division Algorithm


(A basic shift-and-subtract method)
2.1 Algorithm Steps
1. Initialization:
o Load Dividend (N) into A (Accumulator) and Q (Quotient
Register).
o Load Divisor (D) into M (Divisor Register).
o Initialize Count = n (number of bits).
2. Repeat for each bit:
o Left-shift AQ (concatenated register) by 1.
o Subtract M from A (A ← A - M).
o Check Sign of A:
 If A ≥ 0 (MSB = 0):
 Set LSB of Q = 1 (successful subtraction).
 If A < 0 (MSB = 1):
 Restore A by adding M back (A ← A + M).
 Set LSB of Q = 0 (subtraction failed).
o Decrement Count.
o Repeat until Count = 0.
3. Final Result:
o Quotient is in Q.
o Remainder is in A.
2.2 Example (4-bit division)
 Dividend (N) = 7 (0111), Divisor (D) = 3 (0011)
 Steps:

Cycle A Q Action

0 0000 0111 Initialization

1 0000-0011=1101 (Restore) 0110 Restore (Q₀=0)

2 0001-0011=1110 (Restore) 1100 Restore (Q₀=0)

100 Successful
3 0011-0011=0000
1 (Q₀=1)

001
4 0000-0011=1101 (Restore) Restore (Q₀=0)
0

 Final Result: Q = 2 (0010), R = 1 (0001).


2.3 Advantages & Disadvantages
 Advantage: Simple to understand.
 Disadvantage: Inefficient due to restoration steps.

3. Non-Restoring Division Algorithm


(Eliminates restoration steps for faster computation)
3.1 Algorithm Steps
1. Initialization (Same as Restoring Division).
2. Repeat for each bit:
o If A ≥ 0:
 Left-shift AQ.
 Subtract M from A (A ← A - M).
o If A < 0:
 Left-shift AQ.
 Add M to A (A ← A + M).
o Set LSB of Q based on A’s sign:
 A ≥ 0 → Q₀ = 1.
 A < 0 → Q₀ = 0.
o Decrement Count.
3. Final Adjustment:
o If A < 0, restore by adding M (A ← A + M).
4. Result:
o Quotient in Q, Remainder in A.
3.2 Example (4-bit division)
 Dividend (N) = 7 (0111), Divisor (D) = 3 (0011)
 Steps:

Cycle A Q Action

0 0000 0111 Initialization

1 0000-0011=1101 0110 A < 0 → Q₀=0

2 1101+0011=0000 1100 A ≥ 0 → Q₀=1

3 0000-0011=1101 1001 A < 0 → Q₀=0

4 1101+0011=0000 0010 Final A ≥ 0 → Done


 Final Result: Q = 2 (0010), R = 0 (0000) (adjusted).
3.3 Advantages & Disadvantages
 Advantage: Faster than Restoring Division (no intermediate
restorations).
 Disadvantage: Requires final adjustment if remainder is negative.

4. Comparison of Division Algorithms

Restoration
Algorithm Speed Hardware Complexity
Steps

Restoring Yes (every cycle) Slow Low

Non-Restoring Only at end Faster Moderate

SRT Division No (speculative) Fastest High

5. Hardware Implementation
5.1 Datapath for Division
 Registers:
o A (Accumulator): Stores remainder.
o Q (Quotient Register): Stores quotient.
o M (Divisor Register): Fixed during operation.
 ALU Operations:
o Addition/Subtraction controlled by A’s sign.
 Control Unit:
o Manages shifting, counting, and arithmetic operations.
5.2 Optimizations
 Carry-Lookahead Adders (CLA): Speed up subtraction/addition.
 Booth-like Techniques: Used in high-speed dividers.
6. Advanced Division Methods
6.1 SRT Division (Used in Modern CPUs)
 Named after Sweeney, Robertson, and Tocher.
 Uses a lookup table to predict quotient bits.
 Similar to Non-Restoring but with overlap in quotient selection.
 Used in Intel Pentium processors.
6.2 Newton-Raphson Division
 Uses multiplicative inverse approximation for fast floating-point
division.
 Common in GPUs and high-performance computing.

7. Conclusion
 Restoring Division is simple but slow.
 Non-Restoring Division is more efficient and widely used.
 SRT Division is used in high-performance processors.
 Choice depends on speed, hardware complexity, and power
constraints.

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