2008 International Conference on Electronic Design December 1-3, 2008, Penang, Malaysia

Analysis of Low Voltage Rail-to-rail CMOS Operational Amplifier

Design

Kavita Khare1, Nilay Khare2, Pawan Kumar Sethiya3

1. Asst. Professor, Dept. of E&C MANIT Bhopal, India.
2. Head, State Project Facilitation Unit, M.P. Govt. Technical Education, India.
3. Student, Dept. of E&C MANIT Bhopal, India.
Email- [email protected]

Abstract
As the supply voltage to a standard CMOS op- operational amplifier with power supply voltage
amp is reduced, the input common mode range of 1 V, current consumption of 3.1 µA.
and the output swing get reduced drastically.
Special circuits have to be used to raise them 2. CONVENTIONAL RAIL-TO-RAIL
up to rail-to-rail supply voltage. This paper CMOS OPERATIONAL
describes the design of a low-voltage CMOS
rail-to-rail input output operational amplifier.
AMPLIFIERS
Analysis of input signal compression circuitry Earlier rail-to-rail operational amplifiers being
that compresses rail-to-rail input signals to the designed using BJTs., now CMOS technology is
input range of the following folded-cascode used. Some of the conventional topologies for
operational amplifier is done. The input signal low voltage rail-to-rail operational amplifier are
compression circuitry and the following reviewed.
folded-cascode operational amplifier together 1) Complementary input differential pair circuits
comprise an input-output rail-to-rail Fig. 1, [3].
operational amplifier. It is concluded that
Cadence Spectre simulation tool with 0.18-µm
CMOS validates the operation of the rail-to-
rail CMOS amplifier with supply voltage of 1
V and bias current of 3.1 µA.
Keywords: CMOS, Operational Amplifier,
Low-Voltage, Rail-to-rail.

1. INTRODUCTION
In recent years, there has been significant interest
in analog integrated circuits operating with low Fig1: Complimentary input differential
supply voltages. OpAmp, one of the most widely circuits
used building blocks, is not an exception. The
input common-mode voltage of an Op Amp This topology uses both an nMOS differential
should be kept as wide as possible in many pair and a pMOS differential pair. The
applications to keep a high signal-to-noise ratio complimentary input stage helps to increase the
with a low supply voltage. Here we consider the input common mode voltage range, at the price of
design of a standard-CMOS operational amplifier some extra current. However, it is susceptible to a
which can handle rail-to-rail inputs and outputs dead-zone, where neither nMOS nor pMOS
and operate on a supply voltage of 1 V for differential pairs are in the active region. Because
applications in battery-operated handy mobile overall transconductance (gm) changes with input
equipment such as cellular phones and digital still common mode voltage, it is difficult to stabilize
cameras. Proposed input signal compression this operational amplifier. This circuit is also not
circuitry to compress rail-to-rail input signals to suitable for low-supply-voltage operation.
the input range of the following folded-cascode 2) Input differential pair circuit with depletion-
operational amplifier, which is capable of rail-to- type nMOS FETs, Fig. 2.
rail output. SPICE simulation was used to This circuit requires depletion-type MOSFETs,
validate the operation of the proposed rail-to-rail which cannot be fabricated by standard digital

978-1-4244-2315-6/08/$25.00 ©2008 IEEE.

CMOS processes. 3. PROPOSED OPERATIONAL
AMPLIFIER TOPOLOGY
Above mentioned topologies have some
drawbacks and sometimes not suitable for rail-to-
rail input and rail-to-rail output operation at low
supply voltages. Folded cascode differential input
stage with telescope load and common source
stage together compromise as two stage
Fig 2: Input Differential pair circuit with operational amplifier. This operational amplifier
depletion type nMOS FETs worked as gain stage and output buffer, and
provides rail-to-rail output swing but input is not
3) Input stage driven by floating gate pseudo rail-to-rail; input is limited to common mode
differential pair, Fig. 3. [2] range. A new input signal compression circuitry;
The FGCMOS input stage allows a rail-to-rail compresses rail-to-rail input signal to the
input common mode voltage range, at the cost of common mode range of the folded cascode
limited low frequency capabilities, and large, die amplifier is designed. The input-output transfer
area consuming capacitors. function of the input signal compression circuit is
shown in Fig. 5; even when the input signal
changes from gnd to Vdd, its output is within the
input range of the following operational amplifier,
and this is equivalent to expanding the input
common-mode range of the operational amplifier.
Folded cascode operational amplifier following
Fig. 3 Floating gate pseudo differential pair input signal compression circuit performs rail-to-
rail input-output operation. Input-output
4) Input differential pair circuit driven by characteristics of an input signal compression
substrate voltages, Fig. 4. circuit that compresses the rail-to-rail input to the
The substrate driven amplifier input stage allows input range of the following operational amplifier.
a rail-to-rail input common mode voltage range, Monotonicity must be guaranteed, but some
with substantial gain, at the cost of some extra nonlinearity is tolerable, because feedback is
power dissipation and a large substrate bias applied around the operational amplifier.
dependant input capacitor. The differential input
signals are fed into the bulk nodes of an nMOS
differential pair instead of their gate nodes.
Hence, input impedance is low; it may require
depletion-type MOSFET source follower circuits
to provide high-impedance input [2]. Also, a large
γ value is required to achieve sufficient bulk
conductance (gbs).

Fig. 5 Input-output characteristics of an input

signal compression circuit
Fig. 6 shows the overall topology of input-output
rail-to-rail operational amplifier, with input signal
compression circuit- whose input-output transfer
Fig. 4 Input differential pair circuit driven by function is shown in Fig. 5 added to each of the
substrate voltages. differential inputs of the folded cascode
operational amplifier.
 level is low, while Vo1 saturates to a constant
voltage (≈ 1V) when Vin is high (> 600 mV)

Fig.6 The input signal compression circuits (a)

and the output rail-to-rail operational
amplifier (A) together comprise a rail-to-rail
operational amplifier

4. ANALYSIS & SIMULATION

RESULTS Fig. 7 (b) Spectre simulation result for the
4.1 Input signal Compression Circuit circuit in panel (a).
Input signal compression circuitry, with input-
output transfer function as shown in Fig. 5, that
operates on supply voltage of 1 V and consumes
little power. Figure 7(a) shows a diagram of the
circuit, which consists of the three parts shown in
Figs. 7(a).

Fig. 7 (c) Spectre simulation result of upper

part of circuit in panel (a)

An nMOS source follower in the first stage and a

pMOS source follower in the second stage shift
the input voltage to a proper output voltage level.
The third-stage circuit inverts the signal and
operates as follows: When V4 is low, V5 follows
V4 by source follower operation of PM4 and
Fig.7 (a) Input signal compression circuit, PM5, and Vo2 output is constant because the
which corresponds to a in Fig 6 source-gate voltages of PM4 and PM11 are
almost the same. On the other hand, when V4 is
Fig. 7 (b) shows the results of spectre DC high, V5 saturates close to Vdd; and the third-
simulation of input output transfer function of the stage circuit (who’s input is V4 and output is
circuit of Fig. 7 (a). It is observed that the input Vo2) becomes a common-source amplifier and
signal is compressed. Upper part, lower part Vo2 is the inverted output of V4.
simulation results are shown in Fig.7(c) and (d). The inputs of the right part in panel (a) are Vo1
The right part in Fig. 7 (a) consists of a pMOS [which is the output of upper part shown in Fig.
source follower in the first stage, an nMOS source 7(c)] and Vo2 [which is the output of lower part
follower in the second stage, and a pMOS source in Fig. 7 (d)], and also its output is Vo3, which is
follower in the third stage. This cascade of three a compressed version of Vin.
source follower circuits shifts the output signal to When Vin is low (< ≈ Vdd/2), right part operates
the proper voltage level and also makes its small- as an nMOS source follower with an input of Vo1
signal gain less than one. The output signal Vo1 and output of Vo3, because Vo2 is constant, as
is shifted up by 500 mV when the input signal shown in Fig. 7(d). On the other hand, when Vin
is high (> ≈ Vdd/2), Vo3 is proportional to Vin.
 cascode Op-Amp has rail-to-rail output. DC
Simulation of folded cascode Op-Amp following
the input signal compression circuit using
cadence spectre shows that the rail-to-rail input
signal range is compressed to the common mode
range of the folded cascode amplifier.

Fig. 7 (d) Spectre simulation result of upper

part of circuit in panel (a)

This is because Vo1 is constant, as shown in Fig.

7(c), Vo2 and Vo1 – Vo3 (≈ 1 V – Vo3) are
almost equal, and so Vo2 is an inverted version of
Vin (the small signal gain of Vo2 with respect to Fig. 8 (a) Rail-to-rail operational amplifier
Vin is negative).

4.2 Simulation of operational amplifier circuit

Fig 8 shows the circuit of overall operational
amplifier. Fig. 8(b) shows its ramp response of its
voltage follower configuration obtained by
cadence Spectre transient simulation. It is
observed that the operational amplifier has input-
output rail-to-rail characteristics.With input signal
compression circuitFig 8 (b) Result of Spectre
simulations to check the input common-mode
range of the proposed operational amplifier of
Fig. 8 (a). A ramp signal input from 0 to Vdd (1
V) is applied to the voltage follower. It is Fig.8(b) Spectre simulation of overall
observed that input common-mode range is from operational circuit
0 to 1 V, which is rail-to-rail voltage.
6. REFERENCES
5. CONCLUSION [1] Yutaka Yukizaki, et.al “Low-Voltage Rail-to-
A novel input and output biasing circuit to extend Rail CMOS Operational Amplifier Design”
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electronic devices require designing analog Voltage CMOS op-amp with Rail-to-Rail
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input-output rail-to-rail Op-Amp topology using integrated circuits”. McGraw–Hill; 2001.
standard digital CMOS processes, operating with [5] Ron hogervorst, Johan H. Huijsing “Design of
supply voltage of 1 V. A newly designed input Low-Voltage, Low-Power Operational Amplifier
signal compression circuit was added to the input Cells” Kluwer publishers 2000.
of a folded-cascode Op-Amp. The compression
circuit enables rail-to-rail input, while the folded-