A B C D E F G H

P401-A02 -- G84-400, 700/100MHz, 256MB 16Mx32 BGA136 GDDR3,

DVI-I-DL, DVI-I-DL, VIVO/TV-Out/Stereo
1 1
SKU VARIANT NVPN ASSEMBLY
B BASE 600-10401-base-200 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
1 SKU0000 600-10401-0000-200 G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
2 SKU0010 600-10401-0010-200 G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO
3 SKU9100 600-10401-9100-200 G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO FOR SAMSUNG MEMORY
4 SKU9200 600-10401-9200-200 G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO FOR HYNIX MEMORY
5 <UNDEFINED> <UNDEFINED> <UNDEFINED>
6 <UNDEFINED> <UNDEFINED> <UNDEFINED>
7 <UNDEFINED> <UNDEFINED> <UNDEFINED>
8 <UNDEFINED> <UNDEFINED> <UNDEFINED>
9 <UNDEFINED> <UNDEFINED> <UNDEFINED>
10 <UNDEFINED> <UNDEFINED> <UNDEFINED>
11 <UNDEFINED> <UNDEFINED> <UNDEFINED>
12 <UNDEFINED> <UNDEFINED> <UNDEFINED>
13 <UNDEFINED> <UNDEFINED> <UNDEFINED>
14 <UNDEFINED> <UNDEFINED> <UNDEFINED>
15 <UNDEFINED> <UNDEFINED> <UNDEFINED>

2
Table of Contents: 2
Page 1: Title Page
Page 2: PEX Interface, NVVDD Decaps, PEX Decaps
Page 3: FrameBuffer - GPU Partition A and FBVDDQ Decaps
Page 4: FrameBuffer - Partition A 16Mx32 BGA136 GDDR3
Page 5: FrameBuffer - Partition A Decaps
Page 6: FrameBuffer - GPU Partition C and FBVDDQ Decaps
Page 7: FrameBuffer - Partition C 16Mx32 BGA136 GDDR3
Page 8: FrameBuffer - Partition C Decaps
Page 9: DACA Interface
Page 10: DACC Interface
Page 11: IFP A/B Interface
3 Page 12: IFP C/D Interface 3
Page 13: MIOA & MIOB and SLI Connector
Page 14: Video Capture (Philips 7115)
Page 15: DACB, TV-Out, and Stereo Interface
Page 16: XTAL/PLLVDD and SPDIF Connector
Page 17: GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-Pin/4-Pin Fan Control
Page 18: Strap Configuration and Mechnicals & Thermals
Page 19: PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5
Page 20: PowerSupply II - FBVDDQ and PEXVDD
Page 21: PowerSupply III - PEX12V & EXT12V and NVVDD VID Control
Page 22: PowerSupply IV - NVVDD

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL Title Page
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 1 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page2: PEX Interface,.NVVDD Decaps, PEX Decaps VALUES TBD

Place near balls PEXVDD
NET DIFFPAIR NV_IMPEDANCE NV_CRITICAL

PEX12V C23 C25 C26 G1 Place Close to GPU PEX_REFCLK PEX_REFCLK 100DIFF 1
G84-400-A1 BI
.01UF .1UF 10UF PEX_REFCLK* PEX_REFCLK 100DIFF 1
BGA820 BI

1
25V 16V 16V COMMON C649 C639 C610
10% 10% 20%
C606
1/14 PCI_EXPRESS .022UF .022UF 4.7UF 4.7UF
PEX3V3 CN2 X7R X7R X5R 16V 16V 6.3V 10% 6.3V 10%
0402 0603 1206
PEX_IOVDD AD23 10% 10% X5R X5R
CON_X16 NONPHY-X16 COMMON COMMON COMMON AF23 0603
PEX_IOVDD X7R X7R 0603 PEX_TX0 PEX_TX0
CON_PCIEXP_X16_EDGE AF24 0402 0402 COMMON COMMON BI 100DIFF 1
Place Close to fingers COMMON PEX_IOVDD AF25 COMMON COMMON BI
PEX_TX0* PEX_TX0 100DIFF 1
PEX_IOVDD AG24 BI
PEX_TX1 PEX_TX1 100DIFF 1
C825 C823 C814 B1 B9 GND PEX_IOVDD AG25 BI
PEX_TX1* PEX_TX1 100DIFF 1
1 +12V TRST* JTAG1 PEX_TRST*
OUT 17< PEX_IOVDD PEX_TX2 PEX_TX2 1
.01UF .1UF 10UF B2 A5 PEX_TCLK 17< PEXVDD BI 100DIFF 1
16V 16V 16V
A2 +12V TCLK JTAG2 A6 PEX_TDI
OUT
BI
PEX_TX2* PEX_TX2 100DIFF 1
10% 10% 20% +12V TDI JTAG3 OUT 17<
VALUES TBD GND PEX_TX3 PEX_TX3 100DIFF 1
X7R X7R X5R A3 +12V TDO JTAG4 A7 PEX_TDO 17< PEX_IOVDDQ AC16 Place Close to GPU BI
0402 0402 1206 B3 A8 PEX_TMS
OUT
17< AC17 Place near balls BI
PEX_TX3* PEX_TX3 100DIFF 1
COMMON COMMON COMMON
+12V/RSVD TMS JTAG5 OUT PEX_IOVDDQ AC21 BI
PEX_TX4 PEX_TX4 100DIFF 1
B8 R662 PEX_IOVDDQ AC22 C671 C698 C661 C665 C675 C655 C607 BI
PEX_TX4* PEX_TX4 100DIFF 1
A9 +3V3 0 PEX_IOVDDQ AE18 .022UF .022UF .01UF .01UF .01UF 22UF 22UF BI
PEX_TX5 PEX_TX5 100DIFF 1
A10 +3V3 5% PEX_IOVDDQ AE21 16V 16V 16V 16V 16V 6.3V 20% 6.3V 20% BI
PEX_TX5* PEX_TX5 100DIFF 1
+3V3 0402 PEX_IOVDDQ AE22 10% 10% 10% 10% 10% X5R X5R
BI
PEX_TX6 PEX_TX6 100DIFF 1
GND COMMON PEX_IOVDDQ X7R X7R X7R X7R X7R 0805 0805 PEX_TX6* PEX_TX6
B10 AF12 COMMON COMMON BI 100DIFF 1
0402 0402 0402 0402 0402
3V3AUX +3V3AUX PEX_IOVDDQ AF18 COMMON COMMON COMMON COMMON COMMON BI
PEX_TX7 PEX_TX7 100DIFF 1
C29 AH15 PEX_IOVDDQ AF21 PEX_TX7* PEX_TX7 100DIFF 1
R628 0 PEX_RST_GPU*
PEX_RST PEX_IOVDDQ
BI
PEX_TX8 PEX_TX8
.1UF PRSNT A1 B5 I2CS_SCL 17< 0402 5% COMMON AF22 BI 100DIFF 1
16V
SNN_PE_PRSNT2_A B17 PRSNT1 SMCLK B6 I2CS_SDA
OUT PEX_IOVDDQ BI
PEX_TX8* PEX_TX8 100DIFF 1
10% PRSNT2 SMDAT BI 17<> PEX_TX9 PEX_TX9
BI 100DIFF 1
X5R GND PEX_TX9* PEX_TX9
AG12 K16 BI 100DIFF 1
0402 SNN_PEXCAPD_VDDQ
COMMON SNN_PE_RSVD2 B12 AH13 RFU VDD K17 BI
PEX_TX10 PEX_TX10 100DIFF 1
SNN_PEXCALPD_GND
RSVD RFU VDD N13 BI
PEX_TX10* PEX_TX10 100DIFF 1
VDD NVVDD PEX_TX11 PEX_TX11
B4 B11 N14 100DIFF 1
GND GND WAKE SNN_PEX_WAKE*
VDD Place near balls BI
PEX_TX11* PEX_TX11 100DIFF 1
A4 GND VDD N16 BI
PEX_TX12 PEX_TX12
B7 N17 100DIFF 1
GND R38 200 VDD
BI
PEX_TX12* PEX_TX12
A12 A11 PEX_RST* 0402 5% COMMON N19 BI 100DIFF 1
GND PERST OUT 18< VDD PEX_TX13 PEX_TX13
B13 PEX_TEST_PLLCLK_OUT AM12 P13 C692 C691 C673 C654 C663 C687 C669 BI 100DIFF 1
A15 GND PEX_TEST_PLLCLK_OUT_N AM11 PEX_TSTCLK_OUT VDD P14 .1UF .1UF .1UF .1UF .1UF .1UF .1UF BI
PEX_TX13* PEX_TX13 100DIFF 1
B16 GND PEX_TSTCLK_OUT VDD P16 16V 16V 16V 16V 16V 16V 16V BI
PEX_TX14 PEX_TX14 100DIFF 1
B18 GND A13 PEX_REFCLK AH14 VDD P17 10% 10% 10% 10% 10% 10% 10%
BI
PEX_TX14* PEX_TX14 100DIFF 1
GND REFCLK PEX_REFCLK VDD X7R X7R X7R X7R X7R X7R X7R PEX_TX15 PEX_TX15
A18 A14 PEX_REFCLK* AJ14 P19 BI 100DIFF 1
0402 0402 0402 0402 0402 0402 0402
GND REFCLK PEX_REFCLK VDD R16 COMMON COMMON COMMON COMMON COMMON COMMON COMMON BI
PEX_TX15* PEX_TX15 100DIFF 1
A16 C757 .1UF C751 .1UF AJ15 VDD R17
2 PERP0 PEX_TXX0 PEX_TX0
PEX_TX0 VDD 2
PERN0 A17 PEX_TXX0* PEX_TX0* AK15 PEX_TX0 VDD T13
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON T14 C653 C684 C706 C670 C693 C643 C640 PEX_TXX0 PEX_TXX0 100DIFF 1
B14 PEX_RX0 AK13 VDD T15 .1UF .1UF .1UF .47UF .47UF .47UF .47UF BI
PEX_TXX0* PEX_TXX0
PETP0 PEX_RX0 VDD BI 100DIFF 1
16V 16V 16V 6.3V 6.3V 6.3V 6.3V
PETN0 B15 PEX_RX0* AK14 PEX_RX0 VDD T18 10% 10% 10% 10% 10% 10% 10% BI
PEX_TXX1 PEX_TXX1 100DIFF 1
END OF X1 T19 PEX_TXX1* PEX_TXX1 100DIFF 1
VDD X7R X7R X7R X5R X5R X5R X5R BI
SNN_PE_PRSNT2_B B31 A21 PEX_TXX1 C745 .1UF C741 .1UF PEX_TX1 AH16 U13 0402 0402 0402 0402 0402 0402 0402 PEX_TXX2 PEX_TXX2 100DIFF 1
SNN_PE_RSVD3 A19 PRSNT2 PERP1 A22 PEX_TXX1* PEX_TX1* AG16 PEX_TX1 VDD COMMON COMMON COMMON COMMON COMMON COMMON COMMON
BI
PEX_TXX2* PEX_TXX2
RSVD PERN1 PEX_TX1 BI 100DIFF 1
SNN_PE_RSVD4 B30 RSVD COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD U14 BI
PEX_TXX3 PEX_TXX3 100DIFF 1
SNN_PE_RSVD5 A32 RSVD PETP1 B19 PEX_RX1 AM14 PEX_RX1 VDD U15 BI
PEX_TXX3* PEX_TXX3 100DIFF 1
B20 PEX_RX1* AM15 U18 C703 C688 C689 C700 C642 C705 C679 PEX_TXX4 PEX_TXX4 100DIFF 1
A20 PETN1 PEX_RX1 VDD U19 .47UF .47UF .47UF .47UF .47UF .47UF 1UF BI
PEX_TXX4* PEX_TXX4
GND VDD BI 100DIFF 1
B21 A25 PEX_TXX2 C735 .1UF C728 .1UF PEX_TX2 AG17 V16 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PEX_TXX5 PEX_TXX5 100DIFF 1
B22 GND PERP2 A26 PEX_TXX2* PEX_TX2* AH17 PEX_TX2 VDD V17 10% 10% 10% 10% 10% 10% 10% BI
PEX_TXX5* PEX_TXX5
GND PERN2 PEX_TX2 VDD X5R X5R X5R X5R X5R X5R X5R BI 100DIFF 1
A23 GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD W13 0402 0402 0402 0402 0402 0402 0402 BI
PEX_TXX6 PEX_TXX6 100DIFF 1
A24 GND PETP2 B23 PEX_RX2 AL15 PEX_RX2 VDD W14 COMMON COMMON COMMON COMMON COMMON COMMON COMMON
BI
PEX_TXX6* PEX_TXX6 100DIFF 1
B25 GND PETN2 B24 PEX_RX2* AL16 PEX_RX2 VDD W16 BI
PEX_TXX7 PEX_TXX7 100DIFF 1
B26 GND VDD W17 BI
PEX_TXX7* PEX_TXX7 100DIFF 1
A27 A29 PEX_TXX3 C722 .1UF C713 .1UF PEX_TX3 AG18 W19 C678 C680 C656 C667 C709 C677 PEX_TXX8 PEX_TXX8 100DIFF 1
A28 GND PERP3 A30 PEX_TXX3* PEX_TX3* AH18 PEX_TX3 VDD Y13 1UF 1UF 1UF 10UF 10UF 10UF BI
PEX_TXX8* PEX_TXX8
GND PERN3 PEX_TX3 VDD BI 100DIFF 1
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
B29 GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD Y14 10% 10% 10% 20% 20% 20% BI
PEX_TXX9 PEX_TXX9 100DIFF 1
A31 GND PETP3 B27 PEX_RX3 AK16 PEX_RX3 VDD Y16 X5R X5R X5R X5R X5R X5R BI
PEX_TXX9* PEX_TXX9 100DIFF 1
B32 GND PETN3 B28 PEX_RX3* AK17 PEX_RX3 VDD Y17 0402 0402 0402 0805 0805 0805 BI
PEX_TXX10 PEX_TXX10 100DIFF 1
END OF X4 Y19 COMMON COMMON COMMON COMMON COMMON COMMON PEX_TXX10* PEX_TXX10 100DIFF 1
A35 PEX_TXX4 C704 .1UF C701 .1UF PEX_TX4 AK18 VDD Y20
BI
PEX_TXX11 PEX_TXX11
PERP4 PEX_TX4 VDD BI 100DIFF 1
GND A36 PEX_TXX4* PEX_TX4* AJ18 PEX_TXX11* PEX_TXX11
PERN4 PEX_TX4 BI 100DIFF 1
SNN_PE_PRSNT2_C B48 PRSNT2 COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON BI
PEX_TXX12 PEX_TXX12 100DIFF 1
SNN_PE_RSVD6 A33 RSVD PETP4 B33 PEX_RX4 AL17 PEX_RX4 VDD_LP P20 GND BI
PEX_TXX12* PEX_TXX12 100DIFF 1
PETN4 B34 PEX_RX4* AL18 PEX_RX4 VDD_LP T20 BI
PEX_TXX13 PEX_TXX13 100DIFF 1
A34 GND VDD_LP T23 BI
PEX_TXX13* PEX_TXX13 100DIFF 1
3 B35 A39 PEX_TXX5 C694 .1UF C686 .1UF PEX_TX5 AJ19 U20 PEX_TXX14 PEX_TXX14 100DIFF 1 3
B36 GND PERP5 A40 PEX_TXX5* PEX_TX5* AH19 PEX_TX5 VDD_LP U23
BI
PEX_TXX14* PEX_TXX14
GND PERN5 PEX_TX5 VDD_LP BI 100DIFF 1
A37 GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD_LP W20 BI
PEX_TXX15 PEX_TXX15 100DIFF 1
A38 GND PETP5 B37 PEX_RX5 AM18 PEX_RX5 BI
PEX_TXX15* PEX_TXX15 100DIFF 1
B39 GND PETN5 B38 PEX_RX5* AM19 PEX_RX5 VDD_SENSE N20 NVVDD_SENSE
OUT 22<
B40 GND GND_SENSE M21 NVVDD_GND_SENSE
OUT 22<
A41 A43 PEX_TXX6 C683 .1UF C676 .1UF PEX_TX6 AG20
A42 GND PERP6 A44 AH20 PEX_TX6
GND PERN6 PEX_TXX6* PEX_TX6*
PEX_TX6 PEX3V3 PEX_RX0 PEX_RX0
B43 BI 100DIFF 1
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON PEX_RX0* PEX_RX0
B44 B41 AK19 100DIFF 1
GND PETP6 PEX_RX6
PEX_RX6 Place near balls BI
PEX_RX1 PEX_RX1 100DIFF 1
A45 GND PETN6 B42 PEX_RX6* AK20 PEX_RX6 VDD33 AC11 BI
PEX_RX1* PEX_RX1
A46 AC12 BI 100DIFF 1
B47 GND A47 PEX_TXX7 C672 .1UF C668 .1UF PEX_TX7 AG21 VDD33 AC24 C710 C738 C634 C747 C764 BI
PEX_RX2 PEX_RX2 100DIFF 1
B49 GND PERP7 A48 PEX_TXX7* PEX_TX7* AH21 PEX_TX7 VDD33 AD24 .1UF 4700PF .022UF .022UF 1UF BI
PEX_RX2* PEX_RX2 100DIFF 1
A49 GND PERN7 PEX_TX7 VDD33 AE11 10V 25V 16V 16V 6.3V BI
PEX_RX3 PEX_RX3 100DIFF 1
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD33 10% 10% 10% 10% 10% PEX_RX3* PEX_RX3
B45 PEX_RX7 AL20 AE12 BI 100DIFF 1
PETP7 PEX_RX7 VDD33 X5R X7R X7R X7R X7R PEX_RX4 PEX_RX4
B46 PEX_RX7* AL21 H7 BI 100DIFF 1
0402 0402 0402 0402 0603
END OF X8 PETN7 PEX_RX7 VDD33 J7 COMMON COMMON COMMON COMMON COMMON BI
PEX_RX4* PEX_RX4 100DIFF 1
A52 PEX_TXX8 C662 .1UF C658 .1UF PEX_TX8 AK21 VDD33 K7 BI
PEX_RX5 PEX_RX5 100DIFF 1
GND PERP8 PEX_TX8 VDD33 PEX_RX5* PEX_RX5
A53 PEX_TXX8* PEX_TX8* AJ21 L10 BI 100DIFF 1
PRSNT B81 PERN8 PEX_TX8 VDD33 L7 BI
PEX_RX6 PEX_RX6 100DIFF 1
PRSNT2 COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON VDD33 PEX_RX6* PEX_RX6
SNN_PE_RSVD7 A50 B50 PEX_RX8 AM21 L8 C702 C724 C714 C630 BI 100DIFF 1
RSVD PETP8 PEX_RX8 VDD33 GND PEX_RX7 PEX_RX7
SNN_PE_RSVD8 B82 B51 PEX_RX8* AM22 M10 .1UF 4700PF .022UF .022UF BI 100DIFF 1
RSVD PETN8 PEX_RX8 VDD33 10V 25V 16V 16V BI
PEX_RX7* PEX_RX7 100DIFF 1
C651 .1UF C645 .1UF 10% 10% 10% 10% PEX_RX8 PEX_RX8 100DIFF 1
PERP9 A56 PEX_TXX9 PEX_TX9 AJ22 PEX_TX9 X5R X7R X7R X7R BI
PEX_RX8* PEX_RX8
A57 PEX_TXX9* PEX_TX9* AH22 AF15 BI 100DIFF 1
0402 0402 0402 0402
A51 PERN9 PEX_TX9 PEX_PLLAVDD AE15 COMMON COMMON COMMON COMMON BI
PEX_RX9 PEX_RX9 100DIFF 1
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON PEX_PLLDVDD PEX_RX9* PEX_RX9
B52 B54 PEX_RX9 AK22 AE16 BI 100DIFF 1
B53 GND PETP9 B55 PEX_RX9* AK23 PEX_RX9 PEX_PLLGND BI
PEX_RX10 PEX_RX10 100DIFF 1
A54 GND PETN9 PEX_RX9 BI
PEX_RX10* PEX_RX10 100DIFF 1
A55 GND A60 C635 .1UF C633 .1UF AG23 BI
PEX_RX11 PEX_RX11 100DIFF 1
4 GND PERP10 PEX_TXX10 PEX_TX10
PEX_TX10 GND PEX_RX11* PEX_RX11 100DIFF 1
4
B56 GND PERN10 A61 PEX_TXX10* PEX_TX10* AH23 PEX_TX10
BI
PEX_RX12 PEX_RX12
B57 BI 100DIFF 1
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON GND PEX_RX12* PEX_RX12
A58 B58 PEX_RX10 AL23 BI 100DIFF 1
A59 GND PETP10 B59 PEX_RX10* AL24 PEX_RX10 Place near balls Place Near BGA BI
PEX_RX13 PEX_RX13 100DIFF 1
GND PETN10 PEX_RX10 PEXVDD PEX_RX13* PEX_RX13
B60 100DIFF 1
GND 180R@100MHz BI
PEX_RX14 PEX_RX14
B61 A64 PEX_TXX11 C624 .1UF C621 .1UF PEX_TX11 AK24 BI 100DIFF 1
A62 GND PERP11 A65 AJ24 PEX_TX11 PEX_RX14* PEX_RX14 100DIFF 1
GND PERN11 PEX_TXX11* PEX_TX11*
PEX_TX11 PEX_PLLVDD LB502 BI
PEX_RX15 PEX_RX15
A63 BEAD_0603 COMMON BI 100DIFF 1
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON PEX_RX15* PEX_RX15
B64 B62 PEX_RX11 AM24 C696 C697 C685 C695 C650 BI 100DIFF 1
GND PETP11 PEX_RX11 4700PF 470PF .1UF .01UF C682 4.7UF
B65 GND PETN11 B63 PEX_RX11* AM25 PEX_RX11 4.7UF
25V 10% 16V 16V 10% 16V 6.3V 10%
A66 GND X7R 10% X7R 10%
6.3V 10% X5R NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT
A67 A68 PEX_TXX12 C619 .1UF C616 .1UF PEX_TX12 AJ25 0402 0402 X5R 0603
GND PERP12 PEX_TX12 X7R X7R PEX_PLLVDD 10MIL 1.2V 0.200A
B68 A69 PEX_TXX12* PEX_TX12* AH25 COMMON COMMON 0603 COMMON BI
0402 0402
B69 GND PERN12 PEX_TX12 COMMON COMMON
COMMON
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON
A70 GND PETP12 B66 PEX_RX12 AK25 PEX_RX12
A71 GND PETN12 B67 PEX_RX12* AK26 PEX_RX12 NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT
B72 GND PEX12V PEX12V 30MIL 12V 5.5A
B73 A72 PEX_TXX13 C615 .1UF C613 .1UF PEX_TX13 AH26 GND GND PEX3V3 20MIL 3.3V 3A
A74 GND PERP13 A73 PEX_TXX13* PEX_TX13* AG26 PEX_TX13 PEX3V3
A75 GND PERN13 PEX_TX13
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON
B76 GND PETP13 B70 PEX_RX13 AL26 PEX_RX13 SPDIF J6 F_SPDIFIN
IN 16< 16>
B77 GND PETN13 B71 PEX_RX13* AL27 PEX_RX13
A78 GND
A79 A76 PEX_TXX14 C605 .1UF C603 .1UF PEX_TX14 AK27
B80 GND PERP14 A77 PEX_TXX14* PEX_TX14* AJ27 PEX_TX14
A82 GND PERN14 PEX_TX14
GND COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON
PETP14 B74 PEX_RX14 AM27 PEX_RX14
PETN14 B75 PEX_RX14* AM28 PEX_RX14
5 GND A80 PEX_TXX15 C598 .1UF C595 .1UF PEX_TX15 AJ28 5
PERP15 A81 PEX_TXX15* PEX_TX15* AH27 PEX_TX15
PERN15 PEX_TX15
COMMON X7R 10% 0402 16V 0402 16V 10% X7R COMMON
PETP15 B78 PEX_RX15 AL28 PEX_RX15
PETN15 B79 PEX_RX15* AL29 PEX_RX15
END OF X16 NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL PEX Interface, NVVDD Decaps, PEX Decaps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 2 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page3: FrameBuffer - GPU Partition A and FBVDDQ Decaps BI

NET

H_PLLVDD
MIN_LINE_WIDTH

12MIL
VOLTAGE

1.2V
NV_NET_MAX_CURRENT

0.120A
FBA_VREF 12MIL
BI

2
4<> FBAD<63..0>
BI G1
G84-400-A1
BGA820 FBVDDQ
COMMON
1 1
2/14 FBA PLACE BELOW GPU
0 FBAD<0> N27 FBAD0 FBVDD A12
1 FBAD<1> M27 FBAD1 FBVDD A18
2 FBAD<2> N28 A21 C600 C674 C636 C608 C597 C644 C690 C599
L29 FBAD2 FBVDD A24 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
3 FBAD<3>
K27 FBAD3 FBVDD A27 16V 16V 16V 16V 16V 16V 16V 16V
4 FBAD<4>
K28 FBAD4 FBVDD A3 10% 10% 10% 10% 10% 10% 10% 10%
5 FBAD<5> X7R X7R X7R X7R X7R X7R X7R X7R
J29 FBAD5 FBVDD A30
6 FBAD<6>
FBAD6 FBVDD 0402 0402 0402 0402 0402 0402 0402 0402 FBVDDQ
7 FBAD<7> J28 FBAD7 FBVDD A6 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
8 FBAD<8> P30 FBAD8 FBVDD A9
9 FBAD<9> N31 FBAD9 FBVDD AA32
10 FBAD<10> N30 FBAD10 FBVDD AD32
11 FBAD<11> N32 AG32 C699 C627 C641 C659 C666 C628 C583 C586 C596 C800
L31 FBAD11 FBVDD AK32 .47UF .47UF .47UF .47UF .47UF .47UF 10UF 10UF 10UF 10UF
12 FBAD<12>
L30 FBAD12 FBVDD C32 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
13 FBAD<13>
J30 FBAD13 FBVDD F32 10% 10% 10% 10% 10% 10% 20% 20% 20% 20%
14 FBAD<14> X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
L32 FBAD14 FBVDD J32
15 FBAD<15> 0402 0402 0402 0402 0402 0402 0805 0805 0805 0805
H30 FBAD15 FBVDD M32 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
16 FBAD<16>
K30 FBAD16 FBVDD R32
17 FBAD<17>
H31 FBAD17 FBVDD
18 FBAD<18>
F30 FBAD18 C622 C768 C727 C707 C664 C746
19 FBAD<19>
H32 FBAD19 .47UF .47UF .47UF .47UF .47UF .47UF
20 FBAD<20>
FBAD20 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
GND
21 FBAD<21> E31 FBAD21 10% 10% 10% 10% 10% 10%
22 FBAD<22> D30 FBAD22 FBVDDQ AA25 X5R X5R X5R X5R X5R X5R PLACE MIDWAY BETWEEN GPU AND MEMORY
23 FBAD<23> E30 FBAD23 FBVDDQ AA26 0402 0402 0402 0402 0402 0402
24 FBAD<24> H28 FBAD24 FBVDDQ AB25 COMMON COMMON COMMON COMMON COMMON COMMON
25 FBAD<25> H29 FBAD25 FBVDDQ AB26
26 FBAD<26> E29 FBAD26 FBVDDQ G11
2 27 FBAD<27> J27 FBAD27 FBVDDQ G12 2
28 FBAD<28> F27 G15 C681 C625 C594 C725 C614
E27 FBAD28 FBVDDQ G18 1UF 1UF 1UF 1UF 1UF
29 FBAD<29>
E28 FBAD29 FBVDDQ G21 6.3V 6.3V 6.3V 6.3V 6.3V
30 FBAD<30>
F28 FBAD30 FBVDDQ G22 10% 10% 10% 10% 10%
31 FBAD<31> X7R X7R X7R X7R X7R
AD29 FBAD31 FBVDDQ H11
32 FBAD<32> 0603 0603 0603 0603 0603
AE29 FBAD32 FBVDDQ H12 COMMON COMMON COMMON COMMON COMMON
33 FBAD<33>
AD28 FBAD33 FBVDDQ H15
34 FBAD<34>
AC28 FBAD34 FBVDDQ H18
35 FBAD<35>
AB29 FBAD35 FBVDDQ H21
36 FBAD<36>
AA30 FBAD36 FBVDDQ H22 C631 C611 C657
37 FBAD<37>
Y28 FBAD37 FBVDDQ L25 4.7UF 4.7UF 4.7UF
38 FBAD<38>
AB30 FBAD38 FBVDDQ L26 6.3V 6.3V 6.3V
39 FBAD<39>
AM30 FBAD39 FBVDDQ M25 10% 10% 10%
40 FBAD<40> X5R X5R X5R
AF30 FBAD40 FBVDDQ M26
41 FBAD<41> 0603 0603 0603
AJ31 FBAD41 FBVDDQ R25 COMMON COMMON COMMON
42 FBAD<42>
AJ30 FBAD42 FBVDDQ R26
43 FBAD<43>
AJ32 FBAD43 FBVDDQ V25
44 FBAD<44>
AK29 FBAD44 FBVDDQ V26
45 FBAD<45>
AM31 FBAD45 FBVDDQ
46 FBAD<46>
FBAD46 GND
47 FBAD<47> AL30 FBAD47
48 FBAD<48> AE32 FBAD48
49 FBAD<49> AE30 FBAD49
50 FBAD<50> AE31 FBAD50
51 FBAD<51> AD30 FBAD51 FBA_CMD<26..0>
OUT 4< 4<>
52 FBAD<52> AC31 FBAD52 FBA_CMD0 P32 FBA_CMD<0> 0
53 FBAD<53> AC32 FBAD53 FBA_CMD1 U27 FBA_CMD<1> 1
54 FBAD<54> AB32 FBAD54 FBA_CMD2 P31 FBA_CMD<2> 2
55 FBAD<55> AB31 FBAD55 FBA_CMD3 U30 FBA_CMD<3> 3
56 FBAD<56> AG27 FBAD56 FBA_CMD4 Y31 FBA_CMD<4> 4
3 57 FBAD<57> AF28 FBAD57 FBA_CMD5 W32 FBA_CMD<5> 5 3
58 FBAD<58> AH28 FBAD58 FBA_CMD6 W31 FBA_CMD<6> 6
59 FBAD<59> AG28 FBAD59 FBA_CMD7 T32 FBA_CMD<7> 7
60 FBAD<60> AG29 FBAD60 FBA_CMD8 V27 FBA_CMD<8> 8
61 FBAD<61> AD27 FBAD61 FBA_CMD9 T28 FBA_CMD<9> 9
62 FBAD<62> AF27 FBAD62 FBA_CMD10 T31 FBA_CMD<10> 10
63 FBAD<63> AE28 FBAD63 FBA_CMD11 U32 FBA_CMD<11> 11
FBA_CMD12 W29 FBA_CMD<12> 12
4<> OUT
FBADQM<7..0>
FBA_CMD13 W30 FBA_CMD<13> 13
0 FBADQM<0> M29 FBADQM0 FBA_CMD14 T27 SNN_FBA_CMD<14>
1 FBADQM<1> M30 FBADQM1 FBA_CMD15 V28 FBA_CMD<15> 15
2 FBADQM<2> G30 FBADQM2 FBA_CMD16 V30 FBA_CMD<16> 16
3 FBADQM<3> F29 FBADQM3 FBA_CMD17 U31 FBA_CMD<17> 17
4 FBADQM<4> AA29 FBADQM4 FBA_CMD18 R27 FBA_CMD<18> 18
5 FBADQM<5> AK30 FBADQM5 FBA_CMD19 V29 FBA_CMD<19> 19
6 FBADQM<6> AC30 FBADQM6 FBA_CMD20 T30 FBA_CMD<20> 20
7 FBADQM<7> AG30 FBADQM7 FBA_CMD21 W28 FBA_CMD<21> 21
FBA_CMD22 R29 FBA_CMD<22> 22
4<> BI
FBADQS_WP<7..0>
FBA_CMD23 R30 FBA_CMD<23> 23
0 FBADQS_WP<0> L28 FBADQS_WP0 FBA_CMD24 P29 FBA_CMD<24> 24
1 FBADQS_WP<1> K31 FBADQS_WP1 FBA_CMD25 U28 FBA_CMD<25> 25
2 FBADQS_WP<2> G32 FBADQS_WP2 FBA_CMD26 Y32 SNN_FBA_CMD<26>
3 FBADQS_WP<3> G28 FBADQS_WP3 FBA_CMD27 Y30 SNN_FBA_CMD<27>
4 FBADQS_WP<4> AB28 FBADQS_WP4 FBA_CMD28 V32 SNN_FBA_CMD<28>
5 FBADQS_WP<5> AL32 FBADQS_WP5
6 FBADQS_WP<6> AF32 FBADQS_WP6 FBA_CLK0 P28 FBA_CLK0
OUT 4<
7 FBADQS_WP<7> AH30 FBADQS_WP7 FBA_CLK0 R28 FBA_CLK0*
OUT 4<
FBA_CLK1 Y27 FBA_CLK1
OUT 4<
4<> BI
FBADQS_RN<7..0>
FBA_CLK1 AA27 FBA_CLK1*
OUT 4<
0 FBADQS_RN<0> M28 FBADQS_RN0
4 1 FBADQS_RN<1> K32 FBADQS_RN1 FBA_DEBUG AC27 FBA_DEBUG
TP100 4
2 FBADQS_RN<2> G31 FBADQS_RN2
3 FBADQS_RN<3> G27 FBADQS_RN3
4 FBADQS_RN<4> AA28 FBADQS_RN4
5 FBADQS_RN<5> AL31 FBADQS_RN5
6 FBADQS_RN<6> AF31 FBADQS_RN6 PEXVDD
FBVDDQ 7 FBADQS_RN<7> AH29 FBADQS_RN7 PLACE close to balls 240R@100MHz
H_PLLAVDD G23 H_PLLVDD LB501
BEAD_0402 COMMON
FBA_PLLAVDD G25
C648 C647
NO STUFF

C646 C652
G24 .01UF .1UF 1UF 4.7UF
FBA_PLLGND 16V 16V 6.3V 6.3V
634

10% 10% 10% 10%

X7R X7R X5R X5R
0402 0402 0402 0603
Rtop
0402 1%

GND COMMON COMMON COMMON COMMON

R585

NC1 D31 SNN_GPU_NC1_D31 GND

NC2 D32 SNN_GPU_NC2_D32
NO STUFF
1.3K

C609
.1UF
16V
Rbot FBA_VREF E32 FB_VREF1
0402 1%

10%
X7R
R586

0402
5 NO STUFF 5

VREF = FBVDDQ * Rbot/(Rtop + Rbot)

GND VREF = 0.70 * FBVDDQ

NVIDIA CORPORATION
DDR3: 1.33V = 1.9V * 1.3K/(549 + 1.3K) 2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - GPU Partition A and FBVDDQ Decaps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 3 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

NET DIFFPAIR NV_IMPEDANCE NV_CRITICAL_NET

Page4: FrameBuffer - Partition A 16Mx32 BGA136 GDDR3 4< 3> IN
FBA_CLK0 FBA_CLK0 80DIFF 1
4< 3> FBA_CLK0* FBA_CLK0 80DIFF 1
IN
FBA_CLK1 FBA_CLK1 80DIFF 1
A-CS0-LOW-32bit A-CS0-HI-32bit 4<
4<
3>
3>
IN
FBA_CLK1* FBA_CLK1 80DIFF 1
M3
DDR3BGA136
FBA Partition M4
DDR3BGA136
IN

PACK_TYPE=BGA136 PACK_TYPE=BGA136
4<> 3> IN
FBA_CMD<26..0> VERSION=BGA136 FBVDDQ 136BGA CMD Mapping FBA_CMD<26..0> VERSION=BGA136 FBVDDQ
COMMON CMD ADDR COMMON 4<> 3<> FBAD<63..0> 40OHM 1
BI
1 FBA_CMD<1> H3 RAS BA2 VDD F1 CMD1 RAS* 7 FBA_CMD<7> H3 RAS BA2 VDD F1 4<> 3> BI
FBADQM<7..0> 40OHM 1
10 FBA_CMD<10> F4 CAS CS0 VDD M1 CMD10 CAS* 8 CS0 FBA_CMD<8> F4 CAS CS0 VDD M1 4<> 3<> BI
FBADQS_RN<7..0> 40OHM 1
11 FBA_CMD<11> H9 WE CKE VDD A2 CMD11 WE* 18 FBA_CMD<18> H9 WE CKE VDD A2 4<> 3<> BI
FBADQS_WP<7..0> 40OHM 1
1 8 CS0 FBA_CMD<8> F9 CS0 CAS VDD V2 CMD18 CKE 10 FBA_CMD<10> F9 CS0 CAS VDD V2 4< 3> BI
FBA_CMD<26..0> 40OHM 1 1
VDD A11 CMD15 RESET VDD A11
FBVDDQ 19 FBA_CMD<19> K4 A0 A4 VDD V11 CMD8 CS0* FBVDDQ 5 FBA_CMD<5> K4 A0 A4 VDD V11 MIN_LINE_WIDTH
25 FBA_CMD<25> H2 A1 A5 VDD F12 13 FBA_CMD<13> H2 A1 A5 VDD F12 BI
FBA_VREF0 12MIL
22 FBA_CMD<22> K3 M12 Hi Sub-Partition 21 FBA_CMD<21> K3 M12 12MIL
A2 A6 VDD A2 A6 VDD BI FBA_VREF1
Low Sub-Partition 24 FBA_CMD<24> M4 A3 A9 CMD19 A<0> 20 FBA_CMD<20> M4 A3 A9 BI FBA_VREF2 12MIL
R540 0 FBA_CMD<0> K9 A1 CMD25 A<1> R562 19 FBA_CMD<19> K9 A1 FBA_VREF3 12MIL
80.6 FBA_CMD<2> H11 A4 A0 VDDQ C1 80.6 FBA_CMD<25> H11 A4 A0 VDDQ C1
BI
2 25
1%
FBA_CMD<21> K10 A5 A1 VDDQ E1 CMD22 A<2> 1%
FBA_CMD<4> K10 A5 A1 VDDQ E1
21 4
0402
FBA_CMD<16> L9 A6 A2 VDDQ N1 CMD24 A<3> Low Sub-Partition 0402
FBA_CMD<9> L9 A6 A2 VDDQ N1
NO STUFF 16 NO STUFF 9
FBA_CLK0_TERM FBA_CMD<23> K11 A7 A11 VDDQ R1 CMD0 A<4> FBA_CLK1_TERM FBA_CMD<17> K11 A7 A11 VDDQ R1
23
A8/AP A10 VDDQ 17
A8/AP A10 VDDQ NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT
20 FBA_CMD<20> M9 V1 CMD2 A<5> 6 FBA_CMD<6> M9 V1
R547 C540 R548 FBA_CMD<17> K2 A9 A3 VDDQ C4 R563 C570 R561 FBA_CMD<23> K2 A9 A3 VDDQ C4
17 CMD4 A<2> 23 FBA_VDDA0 12MIL 2.1V 0.020A
121 .01UF 121 FBA_CMD<9> L4 A10 A8/AP VDDQ E4 121 .01UF 121 FBA_CMD<16> L4 A10 A8/AP VDDQ E4
BI
12MIL
9 CMD6 A<3> Hi Sub-Partition 16 FBA_VDDA1 2.1V 0.020A
1% 6.3V 1% A11 A7 VDDQ J4 1% 6.3V 1% A11 A7 VDDQ J4
BI
FBA_VDDA2 12MIL 2.1V 0.020A
0402 10% 0402 VDDQ CMD5 A<4> 0402 10% 0402 VDDQ BI
COMMON X5R COMMON VDDQ N4 CMD13 A<5> COMMON X5R COMMON VDDQ N4 BI FBA_VDDA3 12MIL 2.1V 0.020A
0402 12 FBA_CMD<12> G4 BA0 BA1 VDDQ R4 0402 3 FBA_CMD<3> G4 BA0 BA1 VDDQ R4
COMMON 3 FBA_CMD<3> G9 C9 CMD21 A<6> COMMON 12 FBA_CMD<12> G9 C9
FBA_CMD<7> H10 BA1 BA0 VDDQ E9 CMD16 A<7> FBA_CMD<1> H10 BA1 BA0 VDDQ E9
7 1
BA2 RAS VDDQ J9 CMD23 A<8> BA2 RAS VDDQ J9
FBA_CMD<18> H4 VDDQ N9 CMD20 A<9> FBA_CMD<11> H4 VDDQ N9
GND 18 GND 11
J11 CKE WE VDDQ R9 CMD17 A<10 4<
FBA_CLK1 J11 CKE WE VDDQ R9
4< 3> IN FBA_CLK0 CLK VDDQ 3> IN CLK VDDQ
FBA_CLK0* J10 A12 CMD9 A<11> FBA_CLK1* J10 A12
4< 3> IN CLK VDDQ 3> IN CLK VDDQ
VDDQ C12 4<
VDDQ C12
SNN_FBA0_NC1J2 E12 CMD12 BA0 SNN_FBA1_NC1 J2 E12
SNN_FBA0_NC2J3
NC/RFU VDDQ N12 CMD3 BA1 SNN_FBA1_NC2 J3 NC/RFU VDDQ N12
V4 NC/CS1 NC/CS1 VDDQ R12 CMD7 BA2 V4 NC/CS1 NC/CS1 VDDQ R12
SEN (GND) VDDQ V12 SEN (GND) VDDQ V12
VDDQ VDDQ
2 GND NONMIRROR MIRROR NONMIRROR MIRROR 2
VSSQ B1 FBVDDQ GND VSSQ B1
15 FBA_CMD<15> V9 RESET VSSQ D1 15 FBA_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MIRROR VSSQ T1 A9 MIRROR VSSQ T1
G2 G2 GND
A4
FBA_ZQ0
VSSQ L2 FBA_ZQ1 A4 VSSQ L2
ZQ VSSQ B4 ZQ VSSQ B4
R559 R555 R557 VSSQ GND R550 VSSQ
10K VSSQ D4 VSSQ D4
5% 10K 243 P4 243 P4
DDR3: ZQ = 6x desired output 0402 5% 1% VSSQ T4 1% VSSQ T4
Impedence of DQ drivers COMMON 0402 0402 VSSQ B9
0402 VSSQ B9
COMMON COMMON VSSQ COMMON VSSQ
Impedence = 240 / 6 = 40 ohm D9 D9
VSSQ P9 VSSQ P9
VSSQ DDR3: ZQ = 6x desired output VSSQ
DDR3: CKE DETERMINES THE ODT VALUE FOR CMD PINS VSSQ T9 impedence of DQ drivers VSSQ T9 FBVDDQ
CKE = 0 --> ODT = ZQ/2 VSSQ G11 FBVDDQ Impedence = 240 / 6 = 40 ohm VSSQ G11
CKE = 1 --> ODT = ZQ VSSQ L11 GND VSSQ L11
GND GND VSSQ B12 VSSQ B12
VSSQ D12 VSSQ D12
P12 P12 R44
VSSQ T12 R564 VSSQ T12 634
VSSQ VSSQ R1
634 1%
FBVDDQ R1 0402
1% FBVDDQ
0402 COMMON
COMMON
VSS G1 VSS G1
K1 L1 K1 L1 C43
K12 VDDA VSS A3 K12 VDDA VSS A3 R43 .1UF
VDDA VSS FBVDDQ VDDA VSS FBVDDQ
R565 C580 1.3K 16V
VSS V3 VSS V3 R2 10%
1.3K .1UF 1%
VSS A10 R2 VSS A10 0402 X7R
1% 16V
VSS V10 0402 10% VSS V10 COMMON 0402
3 C538 C581 G12 COMMON X7R
C582 C42 G12 COMMON 3
.047UF .047UF VSS L12 R41 .047UF .047UF VSS L12 R568
0402
16V 16V VSS COMMON 634 16V 16V VSS 634
10% 10% R1 10% 10% R1
1% 1%
X7R X7R 0402 X7R X7R 0402
0402 0402 COMMON 0402 0402 GND COMMON
COMMON COMMON J1 VSSA VREF H1 FBA_VREF0 GND COMMON COMMON J1 VSSA VREF H1 FBA_VREF2
J12 VSSA VREF H12FBA_VREF1 J12 VSSA VREF H12 FBA_VREF3

*CS1 is required 32Mx32 Memories

R42 C41 *CS1 is required 32Mx32 Memories
R567 C578
VREF = FBVDDQ * R2/(R1 + R2) 1.3K R2
.1UF 1.3K R2
.1UF
1% 16V VREF = FBVDDQ * R2/(R1 + R2) 1% 16V
DDR3: VREF = 0.70 * FBVDDQ 0402 10% 0402 10%
1.33V = 2.0V * 1.3K/(634 + 1.3K) COMMON X7R DDR3: VREF = 0.70 * FBVDDQ COMMON X7R
GND 0402
GND 0402
1.33V = 2.0V * 1.3K/(634 + 1.3K)
COMMON COMMON

GND GND
4<> 3<> FBAD<63..0>
BI

M3 M3 M3 M3
DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136 Termination for Sub-Partition and CLK
PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136 MUST BE PLACED as close as possible to
VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136
COMMON COMMON COMMON COMMON the BGA memory on the line BEFORE the
0 FBAD<0> R11 8 FBAD<8> T3 16 FBAD<16> B2 24 FBAD<24> F11 MEMORY pin!!
FBAD<1> T11 DQ0 FBAD<9> R2 DQ0 FBAD<17> E2 DQ0 FBAD<25> F10 DQ0 Minimize the stub length!!
1 9 17 25
FBAD<2> R10 DQ1 FBAD<10> R3 DQ1 FBAD<18> C2 DQ1 FBAD<26> B11 DQ1
2 10 18 26
FBAD<3> T10 DQ2 FBAD<11> T2 DQ2 FBAD<19> B3 DQ2 FBAD<27> B10 DQ2
3 11 19 27 FBVDDQ
FBADQM<7..0> FBAD<4> N11 DQ3 FBAD<12> M2 DQ3 FBAD<20> C3 DQ3 FBAD<28> C11 DQ3 FBA_CMD<26..0>
4 4<> 3> BI
4
DQ4 12
DQ4 20
DQ4 28
DQ4 4
0 FBADQM<0> 5 FBAD<5> M11 DQ5 13 FBAD<13> N2 DQ5 21 FBAD<21> F3 DQ5 29 FBAD<29> E11 DQ5
1 FBADQM<1> 6 FBAD<6> L10 DQ6 14 FBAD<14> L3 DQ6 22 FBAD<22> G3 DQ6 30 FBAD<30> G10 DQ6 2 FBA_CMD<2> 120 R546
2 FBADQM<2> 7 FBAD<7> M10 DQ7 15 FBAD<15> M3 DQ7 23 FBAD<23> F2 DQ7 31 FBAD<31> C10 DQ7 COMMON 5% 0402
3 FBADQM<3> 0 FBA_CMD<0> 120 R553
4 FBADQM<4> FBADQM<0> N10 DQM FBADQM<1> N3 DQM FBADQM<2> E3 DQM FBADQM<3> E10 DQM COMMON 5% 0402
5 FBADQM<5> FBADQS_RN<0> P10 FBADQS_RN<1> P3 FBADQS_RN<2> D3 FBADQS_RN<3> D10 24 FBA_CMD<24> 120 R558
FBADQM<6> FBADQS_WP<0> P11
RDQS FBADQS_WP<1> P2 RDQS FBADQS_WP<2> D2 RDQS FBADQS_WP<3> D11
RDQS
6 COMMON 5% 0402
WDQS WDQS WDQS WDQS
7 FBADQM<7> 22 FBA_CMD<22> 120 R554
COMMON 5% 0402
4<> 3<> BI
FBADQS_RN<7..0> 13 FBA_CMD<13> 120 R549
0 FBADQS_RN<0> COMMON 5% 0402
1 FBADQS_RN<1> 4 FBA_CMD<4> 120 R552
2 FBADQS_RN<2> COMMON 5% 0402
3 FBADQS_RN<3> 5 FBA_CMD<5> 120 R551
4 FBADQS_RN<4> COMMON 5% 0402
5 FBADQS_RN<5> 6 FBA_CMD<6> 120 R556
6 FBADQS_RN<6> COMMON 5% 0402
7 FBADQS_RN<7>
M4 M4 M4 M4
FBADQS_WP<7..0> DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136
4<> 3<> BI PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136
0 FBADQS_WP<0> VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136
1 FBADQS_WP<1> COMMON COMMON COMMON COMMON
2 FBADQS_WP<2> 32 FBAD<32> L3 DQ0 40 FBAD<40> B10 DQ0 48 FBAD<48> R10 DQ0 56 FBAD<56> B3 DQ0
3 FBADQS_WP<3> 33 FBAD<33> M2 DQ1 41 FBAD<41> G10 DQ1 49 FBAD<49> M11 DQ1 57 FBAD<57> F3 DQ1
4 FBADQS_WP<4> 34 FBAD<34> M3 DQ2 42 FBAD<42> F10 DQ2 50 FBAD<50> R11 DQ2 58 FBAD<58> C2 DQ2
5 FBADQS_WP<5> 35 FBAD<35> N2 DQ3 43 FBAD<43> E11 DQ3 51 FBAD<51> T11 DQ3 59 FBAD<59> C3 DQ3
6 FBADQS_WP<6> 36 FBAD<36> T3 DQ4 44 FBAD<44> F11 DQ4 52 FBAD<52> N11 DQ4 60 FBAD<60> F2 DQ4
7 FBADQS_WP<7> 37 FBAD<37> R2 DQ5 45 FBAD<45> C10 DQ5 53 FBAD<53> T10 DQ5 61 FBAD<61> E2 DQ5
38 FBAD<38> T2 DQ6 46 FBAD<46> C11 DQ6 54 FBAD<54> M10 DQ6 62 FBAD<62> B2 DQ6
5 39 FBAD<39> R3 DQ7 47 FBAD<47> B11 DQ7 55 FBAD<55> L10 DQ7 63 FBAD<63> G3 DQ7 5
FBADQM<4> N3 DQM FBADQM<5> E10 DQM FBADQM<6> N10 DQM FBADQM<7> E3 DQM
FBADQS_RN<4> P3 RDQS FBADQS_RN<5> D10
RDQS FBADQS_RN<6> P10
RDQS FBADQS_RN<7> D3 RDQS
FBADQS_WP<4> P2 WDQS FBADQS_WP<5> D11
WDQS FBADQS_WP<6> P11
WDQS FBADQS_WP<7> D2 WDQS
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Partition A 16Mx32 BGA136 GDDR3
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 4 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page5: FrameBuffer - GPU Partition A Decaps

1 1

Decoupling for FBA 32..0 Decoupling for FBA 63..32

FBVDDQ FBVDDQ
PLACE NEAR MEMORY FBVDD PINS PLACE NEAR MEMORY FBVDD PINS

C562 C543 C550 C579 C554 C549 C568 C556 C546 C575
2 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF 2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

C573 C572 C577 C547

.01UF .01UF .01UF .01UF
16V 25V 16V 25V
10% 10% 10% 10%
X7R X7R X7R X7R
0402 0402 0402 0402
COMMON COMMON COMMON COMMON

C552 C574 C555 C545 C559 C571 C542 C576

.01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF
25V 25V 25V 25V 25V 25V 25V 25V
10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

C544 C569 C563 C564 C548 C566 C560 C553 C567 C584 C561 C551
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

3 3
GND GND

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Partition A Decaps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 5 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page6: FrameBuffer - GPU Partition C and FBVDDQ Decaps BI

NET

FBC_PLLVDD
MIN_LINE_WIDTH

12MIL
VOLTAGE

2.1V
NV_NET_MAX_CURRENT

0.120A
FBC_PLLAVDD 12MIL 2.1V 0.120A
BI
FBC_VREF 12MIL
BI

7<> BI
FBCD<63..0>
G1
3
G84-400-A1
1 BGA820
COMMON
1
3/14 FBC
0 FBCD<0> B7 FBCD0 FBVTT AA23 SNN_FBVTT_AA23
1 FBCD<1> A7 FBCD1 FBVTT AB23 SNN_FBVTT_AB23
2 FBCD<2> C7 FBCD2 FBVTT H16 SNN_FBVTT_H16
3 FBCD<3> A2 FBCD3 FBVTT H17 SNN_FBVTT_H17
4 FBCD<4> B2 FBCD4 FBVTT J10 SNN_FBVTT_J10
5 FBCD<5> C4 FBCD5 FBVTT J23 SNN_FBVTT_J23
6 FBCD<6> A5 FBCD6 FBVTT J24 SNN_FBVTT_J24
7 FBCD<7> B5 FBCD7 FBVTT J9 SNN_FBVTT_J9
8 FBCD<8> F9 FBCD8 FBVTT K11 SNN_FBVTT_K11
9 FBCD<9> F10 FBCD9 FBVTT K12 SNN_FBVTT_K12
10 FBCD<10> D12 FBCD10 FBVTT K21 SNN_FBVTT_K21
11 FBCD<11> D9 FBCD11 FBVTT K22 SNN_FBVTT_K22
12 FBCD<12> E12 FBCD12 FBVTT K24 SNN_FBVTT_K24
13 FBCD<13> D11 FBCD13 FBVTT K9 SNN_FBVTT_K9
14 FBCD<14> E8 FBCD14 FBVTT L23 SNN_FBVTT_L23
15 FBCD<15> D8 FBCD15 FBVTT M23 SNN_FBVTT_M23
16 FBCD<16> E7 FBCD16 FBVTT T25 SNN_FBVTT_T25
17 FBCD<17> F7 FBCD17 FBVTT U25 SNN_FBVTT_U25
18 FBCD<18> D6 FBCD18
19 FBCD<19> D5 FBCD19
20 FBCD<20> D3 FBCD20
21 FBCD<21> E4 FBCD21
22 FBCD<22> C3 FBCD22
23 FBCD<23> B4 FBCD23
24 FBCD<24> C10 FBCD24
25 FBCD<25> B10 FBCD25
2 26 FBCD<26> C8 FBCD26 2
27 FBCD<27> A10 FBCD27
28 FBCD<28> C11 FBCD28
29 FBCD<29> C12 FBCD29
30 FBCD<30> A11 FBCD30
31 FBCD<31> B11 FBCD31
32 FBCD<32> B28 FBCD32
33 FBCD<33> C27 FBCD33
34 FBCD<34> C26 FBCD34
35 FBCD<35> B26 FBCD35
36 FBCD<36> C30 FBCD36
37 FBCD<37> B31 FBCD37
38 FBCD<38> C29 FBCD38
39 FBCD<39> A31 FBCD39
40 FBCD<40> D28 FBCD40
41 FBCD<41> D27 FBCD41
42 FBCD<42> F26 FBCD42
43 FBCD<43> D24 FBCD43
44 FBCD<44> E23 FBCD44
45 FBCD<45> E26 FBCD45
46 FBCD<46> E24 FBCD46
47 FBCD<47> F23 FBCD47
48 FBCD<48> B23 FBCD48
49 FBCD<49> A23 FBCD49
50 FBCD<50> C25 FBCD50 FBC_CMD<26..0>
51 FBCD<51> C23 FBCD51 OUT 7< 7<>
52 FBCD<52> A22 FBCD52 FBC_CMD0 C13 FBC_CMD<0> 0
53 FBCD<53> C22 FBCD53 FBC_CMD1 A16 FBC_CMD<1> 1
54 FBCD<54> C21 FBCD54 FBC_CMD2 A13 FBC_CMD<2> 2
55 FBCD<55> B22 FBCD55 FBC_CMD3 B17 FBC_CMD<3> 3
3 56 FBCD<56> E22 FBCD56 FBC_CMD4 B20 FBC_CMD<4> 4 3
57 FBCD<57> D22 FBCD57 FBC_CMD5 A19 FBC_CMD<5> 5
58 FBCD<58> D21 FBCD58 FBC_CMD6 B19 FBC_CMD<6> 6
59 FBCD<59> E21 FBCD59 FBC_CMD7 B14 FBC_CMD<7> 7
60 FBCD<60> E18 FBCD60 FBC_CMD8 E16 FBC_CMD<8> 8
61 FBCD<61> D19 FBCD61 FBC_CMD9 A14 FBC_CMD<9> 9
62 FBCD<62> D18 FBCD62 FBC_CMD10 C15 FBC_CMD<10> 10
63 FBCD<63> E19 FBCD63 FBC_CMD11 B16 FBC_CMD<11> 11
FBC_CMD12 F17 FBC_CMD<12> 12
7<> OUT
FBCDQM<7..0>
FBC_CMD13 C19 FBC_CMD<13> 13
0 FBCDQM<0> A4 FBCDQM0 FBC_CMD14 D15 SNN_FBC_CMD<14>
1 FBCDQM<1> E11 FBCDQM1 FBC_CMD15 C17 FBC_CMD<15> 15
2 FBCDQM<2> F5 FBCDQM2 FBC_CMD16 A17 FBC_CMD<16> 16
3 FBCDQM<3> C9 FBCDQM3 FBC_CMD17 C16 FBC_CMD<17> 17
4 FBCDQM<4> C28 FBCDQM4 FBC_CMD18 D14 FBC_CMD<18> 18
5 FBCDQM<5> F24 FBCDQM5 FBC_CMD19 F16 FBC_CMD<19> 19
6 FBCDQM<6> C24 FBCDQM6 FBC_CMD20 C14 FBC_CMD<20> 20
7 FBCDQM<7> E20 FBCDQM7 FBC_CMD21 C18 FBC_CMD<21> 21
FBC_CMD22 E14 FBC_CMD<22> 22
7<> BI
FBCDQS_WP<7..0>
FBC_CMD23 B13 FBC_CMD<23> 23
0 FBCDQS_WP<0> C5 FBCDQS_WP0 FBC_CMD24 E15 FBC_CMD<24> 24
1 FBCDQS_WP<1> E10 FBCDQS_WP1 FBC_CMD25 F15 FBC_CMD<25> 25
2 FBCDQS_WP<2> E5 FBCDQS_WP2 FBC_CMD26 A20 SNN_FBC_CMD<26>
3 FBCDQS_WP<3> B8 FBCDQS_WP3 FBC_CMD27 C20 SNN_FBC_CMD<27>
4 FBCDQS_WP<4> A29 FBCDQS_WP4 FBC_CMD28 A15 SNN_FBC_CMD<28>
5 FBCDQS_WP<5> D25 FBCDQS_WP5
6 FBCDQS_WP<6> B25 FBCDQS_WP6 FBC_CLK0 E13 FBC_CLK0
OUT 7<
7 FBCDQS_WP<7> F20 FBCDQS_WP7 FBC_CLK0 F13 FBC_CLK0*
OUT 7<
FBC_CLK1 F18 FBC_CLK1
OUT 7<
7<> BI
FBCDQS_RN<7..0>
FBC_CLK1 E17 FBC_CLK1*
OUT 7<
4 0 FBCDQS_RN<0> C6 FBCDQS_RN0 4
1 FBCDQS_RN<1> E9 FBCDQS_RN1 FBC_DEBUG F12 FBC_DEBUG
TP101
2 FBCDQS_RN<2> E6 FBCDQS_RN2 PEXVDD
3 FBCDQS_RN<3> A8 FBCDQS_RN3
4 FBCDQS_RN<4> B29 FBCDQS_RN4
5 FBCDQS_RN<5> E25 FBCDQS_RN5
6 FBCDQS_RN<6> A25 FBCDQS_RN6
7 FBCDQS_RN<7> F21 FBCDQS_RN7
FBVDDQ G8 SNN_FBC_PLLVDD
FBC_PLLVDD PLACE close to balls 240R@100MHz
FBC_PLLAVDD G10 FBC_PLLAVDD LB503
BEAD_0402 COMMON
G9 C717 C716 C715 C719
FBC_PLLGND
NO STUFF

.01UF .1UF 1UF 4.7UF

16V 16V 6.3V 6.3V
FBVDDQ
634

10% 10% 10% 10%

X7R X7R X5R X5R
GND 0402 0402 0402 0603
Rtop K26 FBCAL_PD R600 60.4 COMMON COMMON COMMON COMMON
0402 1%

FBCAL_PD_VDDQ 0402 1% COMMON

R592

FBCAL_PU_GND H26 FBCAL_PU R601 40.2

0402 1% COMMON
FBCAL_TERM_GND J26 FBCAL_TERM R599 40.2 GND
1 1%
0402 2
COMMON
NO STUFF

GND GND
1.3K

C617 FBC_VREF A28

.1UF FB_VREF2
16V
5 Rbot 5
0402 1%

10%
X7R
R591

0402
NO STUFF VREF = FBVDDQ * Rbot/(Rtop + Rbot)

DDR3:
VREF = 0.70 * FBVDDQ
1.33V = 1.9V * 1.3K/(549 + 1.3K) NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - GPU Partition C and FBVDDQ Decaps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 6 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

NET DIFFPAIR NV_IMPEDANCE NV_CRITICAL_NET

Page7: FrameBuffer - Partion C 16Mx32 BGA136 GDD3 7< 6> IN
FBC_CLK0 FBC_CLK0 80DIFF 1
7< 6> FBC_CLK0* FBC_CLK0 80DIFF 1
IN

A-CS0-LOW-32bit FBA Partition A-CS0-HI-32bit

7<
7< 6>
6> IN
IN
FBC_CLK1
FBC_CLK1*
FBC_CLK1
FBC_CLK1
80DIFF
80DIFF
1
1
M1 M2
DDR3BGA136 DDR3BGA136
PACK_TYPE=BGA136 PACK_TYPE=BGA136
7<> 6> IN
FBC_CMD<26..0> VERSION=BGA136 FBVDDQ FBC_CMD<26..0> VERSION=BGA136 FBVDDQ FBCD<63..0> 40OHM 1
COMMON COMMON 7<> 6<> BI
7<> 6> FBCDQM<7..0> 40OHM 1
1 FBC_CMD<1> H3 RAS BA2 VDD F1 136BGA CMD Mapping 7 FBC_CMD<7> H3 RAS BA2 VDD F1 BI
FBCDQS_RN<7..0> 40OHM 1
FBC_CMD<10> F4 M1 FBC_CMD<8> F4 M1 7<> 6<> BI
10 CMD ADDR 8 CS0
FBC_CMD<11> H9 CAS CS0 VDD A2 FBC_CMD<18> H9 CAS CS0 VDD A2 7<> 6<> BI
FBCDQS_WP<7..0> 40OHM 1
11 CMD1 RAS* 18
1 FBC_CMD<8> F9 WE CKE VDD V2 FBC_CMD<10> F9 WE CKE VDD V2 7< 6> BI
FBC_CMD<26..0> 40OHM 1 1
8 CS0 CMD10 CAS* 10
CS0 CAS VDD A11 CS0 CAS VDD A11
FBVDDQ VDD CMD11 WE* VDD
19 FBC_CMD<19> K4 V11 FBVDDQ 5 FBC_CMD<5> K4 V11 MIN_LINE_WIDTH
A0 A4 VDD CMD18 CKE A0 A4 VDD FBC_VREF0 12MIL
25 FBC_CMD<25> H2 A1 A5 VDD F12 CMD15 RESET 13 FBC_CMD<13> H2 A1 A5 VDD F12 BI
12MIL
22 FBC_CMD<22> K3 M12 Hi Sub-Partition 21 FBC_CMD<21> K3 M12 BI FBC_VREF1
A2 A6 VDD CMD8 CS0* A2 A6 VDD FBC_VREF2 12MIL
R622 Low Sub-Partition 24 FBC_CMD<24> M4 A3 A9 20 FBC_CMD<20> M4 A3 A9
BI
FBC_VREF3 12MIL
80.6 0 FBC_CMD<0> K9 A1 R597 19 FBC_CMD<19> K9 A1 BI
FBC_CMD<2> H11 A4 A0 VDDQ C1 80.6 FBC_CMD<25> H11 A4 A0 VDDQ C1
1% 2 CMD19 A<0> 25
0402 FBC_CMD<21> K10 A5 A1 VDDQ E1 1%
FBC_CMD<4> K10 A5 A1 VDDQ E1
21 CMD25 A<1> 4
NO STUFF FBC_CMD<16> L9 A6 A2 VDDQ N1
0402
FBC_CMD<9> L9 A6 A2 VDDQ N1
16 NO STUFF 9
FBC_CLK0_TERM
FBC_CMD<23> K11 A7 A11 VDDQ R1 CMD22 A<2> FBC_CLK1_TERM FBC_CMD<17> K11 A7 A11 VDDQ R1 NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT
23 17
FBC_CMD<20> M9 A8/AP A10 VDDQ V1 CMD24 A<3> Low Sub-Partition FBC_CMD<6> M9 A8/AP A10 VDDQ V1
R626 C771 R619 20 6
FBC_CMD<17> K2 A9 A3 VDDQ C4 CMD0 A<4> R596 C629 R595 FBC_CMD<23> K2 A9 A3 VDDQ C4 BI FBC_VDDA0 12MIL 2.1V 0.020A
121 .01UF 121 17 23
FBC_CMD<9> L4 A10 A8/AP VDDQ E4 CMD2 A<5> 121 .01UF 121 FBC_CMD<16> L4 A10 A8/AP VDDQ E4 BI FBC_VDDA1 12MIL 2.1V 0.020A
1% 6.3V 1% 9 16
0402 10% 0402
A11 A7 VDDQ J4 1% 6.3V 1% A11 A7 VDDQ J4 BI
FBC_VDDA2 12MIL 2.1V 0.020A
VDDQ CMD4 A<2> 0402 10% 0402 VDDQ FBC_VDDA3 12MIL 2.1V 0.020A
COMMON X5R COMMON N4 N4 BI
VDDQ CMD6 A<3> Hi Sub-Partition COMMON X5R COMMON VDDQ
0402
COMMON 12 FBC_CMD<12> G4 BA0 BA1 VDDQ R4 CMD5 A<4> 0402 3 FBC_CMD<3> G4 BA0 BA1 VDDQ R4
3 FBC_CMD<3> G9 BA1 BA0 VDDQ C9 CMD13 A<5>
COMMON 12 FBC_CMD<12> G9 BA1 BA0 VDDQ C9
7 FBC_CMD<7> H10 BA2 RAS VDDQ E9 1 FBC_CMD<1> H10 BA2 RAS VDDQ E9
J9 CMD21 A<6> J9
GND FBC_CMD<18> H4 VDDQ N9 CMD16 A<7> FBC_CMD<11> H4 VDDQ N9
18 GND 11
FBC_CLK0 J11 CKE WE VDDQ R9 CMD23 A<8> FBC_CLK1 J11 CKE WE VDDQ R9
7< 6> IN CLK VDDQ 7< 6> IN CLK VDDQ
FBC_CLK0* J10 A12 CMD20 A<9> FBC_CLK1* J10 A12
7< 6> IN CLK VDDQ 7< 6> IN CLK VDDQ
C12 CMD17 A<10 C12
SNN_FBC0_NC1 J2 VDDQ E12 CMD9 A<11> SNN_FBC1_NC1 J2 VDDQ E12
SNN_FBC0_NC2 J3 NC/RFU VDDQ N12 SNN_FBC1_NC2 J3 NC/RFU VDDQ N12
V4 NC/CS1 NC/CS1 VDDQ R12 CMD12 BA0 V4 NC/CS1 NC/CS1 VDDQ R12
SEN (GND) VDDQ V12 CMD3 BA1 SEN (GND) VDDQ V12
VDDQ CMD7 BA2 VDDQ
2 2
GND NONMIRROR MIRROR NONMIRROR MIRROR
VSSQ B1 FBVDDQ GND VSSQ B1
15 FBC_CMD<15> V9 RESET VSSQ D1 15 FBC_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MIRROR VSSQ T1 A9 MIRROR VSSQ T1
G2 G2 GND
A4
FBC_ZQ0
VSSQ L2 FBC_ZQ1 A4 VSSQ L2
ZQ VSSQ B4 ZQ VSSQ B4
R603 R602 R635 VSSQ GND R584 VSSQ
10K VSSQ D4 VSSQ D4
5% 10K 243 P4 243 P4
DDR3: ZQ = 6x desired output 0402 5% 1% VSSQ T4 1% VSSQ T4
Impedence of DQ drivers COMMON 0402 0402 VSSQ B9
0402 VSSQ B9
COMMON COMMON VSSQ COMMON VSSQ
Impedence = 240 / 6 = 40 ohm D9 D9
VSSQ P9 VSSQ P9
VSSQ DDR3: ZQ = 6x desired output VSSQ
DDR3: CKE DETERMINES THE ODT VALUE FOR CMD PINS VSSQ T9 impedence of DQ drivers VSSQ T9 FBVDDQ
CKE = 0 --> ODT = ZQ/2 VSSQ G11 FBVDDQ Impedence = 240 / 6 = 40 ohm VSSQ G11
CKE = 1 --> ODT = ZQ VSSQ L11 GND VSSQ L11
GND GND VSSQ B12 VSSQ B12
VSSQ D12 VSSQ D12
P12 P12 R40
VSSQ T12 R631 VSSQ T12 634
VSSQ VSSQ R1
634 1%
R1 0402
1% FBVDDQ
FBVDDQ 0402 COMMON
COMMON
VSS G1 VSS G1
K1 VDDA VSS L1 K1 VDDA VSS L1 C38
K12 A3 FBVDDQ K12 A3 R39 .1UF FBVDDQ
VDDA VSS V3 R627 C766 VDDA VSS V3 1.3K R2 16V
VSS A10 1.3K .1UF VSS A10 1%
10%
VSS R2 VSS 0402
1% 16V X7R
VSS V10 0402 VSS V10 COMMON
3 C754 C758 G12 COMMON
10%
C618 C37 G12 0402 3
VSS X7R VSS COMMON
.047UF .047UF L12 0402 R36 .047UF .047UF L12 R588
16V 16V VSS COMMON 634 16V 16V VSS 634
10% 10% R1 10% 10% R1
1% 1%
X7R X7R 0402 X7R X7R 0402
0402 0402 COMMON 0402 0402 GND COMMON
COMMON COMMON J1 VSSA VREF H1 FBC_VREF0 GND COMMON COMMON J1 VSSA VREF H1 FBC_VREF2
J12 VSSA VREF H12 FBC_VREF1 J12 VSSA VREF H12 FBC_VREF3

*CS1 is required 32Mx32 Memories

R37 C36 *CS1 is required 32Mx32 Memories
R587 C612
VREF = FBVDDQ * R2/(R1 + R2) 1.3K R2
.1UF VREF = FBVDDQ * R2/(R1 + R2) 1.3K R2
.1UF
1% 16V 1% 16V
DDR3: VREF = 0.70 * FBVDDQ 0402 10% DDR3: VREF = 0.70 * FBVDDQ 0402 10%
1.33V = 2.0V * 1.3K/(634 + 1.3K) COMMON X7R 1.33V = 2.0V * 1.3K/(634 + 1.3K) COMMON X7R
GND 0402
GND 0402
COMMON COMMON

GND GND
7<> 6<> FBCD<63..0>
BI

M1 M1 M1 M1
DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136
PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136
VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136
COMMON COMMON COMMON COMMON Termination for Sub-Partition and CLK
0 FBCD<0> B2 DQ0 8 FBCD<8> M11 DQ0 16 FBCD<16> B10 DQ0 24 FBCD<24> M2 DQ0 MUST BE PLACED as close as possible to
1 FBCD<1> C2 DQ1 9 FBCD<9> T10 DQ1 17 FBCD<17> G10 DQ1 25 FBCD<25> N2 DQ1 the BGA memory on the line BEFORE the
2 FBCD<2> E2 DQ2 10 FBCD<10> R11 DQ2 18 FBCD<18> F11 DQ2 26 FBCD<26> L3 DQ2 MEMORY pin!!
3 FBCD<3> F2 DQ3 11 FBCD<11> N11 DQ3 19 FBCD<19> F10 DQ3 27 FBCD<27> M3 DQ3 Minimize the stub length!!
4 7<> 6> FBCDQM<7..0> 4 FBCD<4> G3 12 FBCD<12> T11 20 FBCD<20> C11 28 FBCD<28> R2 4
BI
FBCDQM<0> FBCD<5> F3 DQ4 FBCD<13> R10 DQ4 FBCD<21> E11 DQ4 FBCD<29> R3 DQ4
0 5 13 21 29 FBVDDQ
FBCDQM<1> FBCD<6> C3 DQ5 FBCD<14> L10 DQ5 FBCD<22> B11 DQ5 FBCD<30> T2 DQ5 FBC_CMD<26..0>
1 6 14 22 30
FBCDQM<2> FBCD<7> B3 DQ6 FBCD<15> M10 DQ6 FBCD<23> C10 DQ6 FBCD<31> T3 DQ6
2 7 15 23 31
DQ7 DQ7 DQ7 DQ7
3 FBCDQM<3> 2 FBC_CMD<2> 120 R623
4 FBCDQM<4> FBCDQM<0> E3 DQM FBCDQM<1> N10 DQM FBCDQM<2> E10 DQM FBCDQM<3> N3 DQM COMMON 5% 0402
5 FBCDQM<5> FBCDQS_RN<0> D3 RDQS FBCDQS_RN<1> P10 RDQS FBCDQS_RN<2> D10 RDQS FBCDQS_RN<3> P3 RDQS 0 FBC_CMD<0> 120 R620
6 FBCDQM<6> FBCDQS_WP<0> D2 WDQS FBCDQS_WP<1> P11 WDQS FBCDQS_WP<2> D11 WDQS FBCDQS_WP<3> P2 WDQS COMMON 5% 0402
7 FBCDQM<7> 24 FBC_CMD<24> 120 R611
COMMON 5% 0402
7<> 6<> BI
FBCDQS_RN<7..0> 22 FBC_CMD<22> 120 R615
0 FBCDQS_RN<0> COMMON 5% 0402
1 FBCDQS_RN<1> 13 FBC_CMD<13> 120 R590
2 FBCDQS_RN<2> COMMON 5% 0402
3 FBCDQS_RN<3> 4 FBC_CMD<4> 120 R589
4 FBCDQS_RN<4> COMMON 5% 0402
5 FBCDQS_RN<5> 5 FBC_CMD<5> 120 R593
6 FBCDQS_RN<6> COMMON 5% 0402
7 FBCDQS_RN<7> 6 FBC_CMD<6> 120 R594
M2 M2 M2 M2 COMMON 5% 0402
FBCDQS_WP<7..0> DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136
7<> 6<> BI PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136 PACK_TYPE=BGA136
0 FBCDQS_WP<0> VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136
1 FBCDQS_WP<1> COMMON COMMON COMMON COMMON
2 FBCDQS_WP<2> 32 FBCD<32> E11 DQ0 40 FBCD<40> E2 DQ0 48 FBCD<48> T10 DQ0 56 FBCD<56> N2 DQ0
3 FBCDQS_WP<3> 33 FBCD<33> F11 DQ1 41 FBCD<41> B2 DQ1 49 FBCD<49> T11 DQ1 57 FBCD<57> M2 DQ1
4 FBCDQS_WP<4> 34 FBCD<34> F10 DQ2 42 FBCD<42> B3 DQ2 50 FBCD<50> M11 DQ2 58 FBCD<58> L3 DQ2
5 FBCDQS_WP<5> 35 FBCD<35> G10 DQ3 43 FBCD<43> F3 DQ3 51 FBCD<51> R11 DQ3 59 FBCD<59> M3 DQ3
6 FBCDQS_WP<6> 36 FBCD<36> B11 DQ4 44 FBCD<44> F2 DQ4 52 FBCD<52> N11 DQ4 60 FBCD<60> R2 DQ4
7 FBCDQS_WP<7> 37 FBCD<37> C10 DQ5 45 FBCD<45> C3 DQ5 53 FBCD<53> R10 DQ5 61 FBCD<61> R3 DQ5
38 FBCD<38> C11 DQ6 46 FBCD<46> C2 DQ6 54 FBCD<54> L10 DQ6 62 FBCD<62> T2 DQ6
5 39 FBCD<39> B10 47 FBCD<47> G3 55 FBCD<55> M10 63 FBCD<63> T3 5
DQ7 DQ7 DQ7 DQ7
FBCDQM<4> E10 DQM FBCDQM<5> E3 DQM FBCDQM<6> N10 DQM FBCDQM<7> N3 DQM
FBCDQS_RN<4> D10 RDQS FBCDQS_RN<5> D3 RDQS FBCDQS_RN<6> P10 RDQS FBCDQS_RN<7> P3 RDQS
FBCDQS_WP<4> D11 FBCDQS_WP<5> D2 FBCDQS_WP<6> P11 FBCDQS_WP<7> P2
WDQS WDQS WDQS WDQS
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Partition C 16MX32 BGA136 GDDR3
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 7 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page8: FrameBuffer - Partion C Decaps

14
G1
G84-400-A1
BGA820
COMMON
14/14 _GND_
AA12 GND GND K10
AA2 GND GND K23
1 AA21 GND GND K29 1
AA31 GND GND K4
AB27 GND GND L27
AB6 GND GND L6
AC10 GND GND M12
AC23 GND GND M2
AC29 GND GND M31
AC4 GND GND N15
AD16 GND GND N18
AD17 GND GND N29
AD2 GND GND N4
AD31 GND GND P15
AE17 GND GND P18
AE27 GND GND P27
AE6 GND GND P6
AF11 GND GND R13
AF26 GND GND R14
AF29 GND GND R15
AF4 GND GND R18
AF7 GND GND R19
AG10 GND GND R2
AG11 GND GND R20
AG14 GND GND R31
AG15 GND GND T16
AG19 GND GND T17
AG2 GND GND T24
AG22 GND GND T29
AG31 GND GND T4
2 AG8 GND GND U16 2
AH24 U17
Decoupling for FBC 32..0 Decoupling for FBC 63..32 AJ10
AJ13
GND
GND
GND
GND
GND
GND
U24
U29
AJ16 GND GND U8
FBVDDQ FBVDDQ AJ17 GND GND V13
PLACE NEAR MEMORY FBVDD PINS PLACE NEAR MEMORY FBVDD PINS AJ20 GND GND V14
AJ23 GND GND V15
AJ26 GND GND V18
AJ29 GND GND V19
C742 C730 C787 C789 C734 C620 C590 C637 C593 C626
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF AJ4 V2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
AJ7 GND GND V20
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
AK2 GND GND V31
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R GND GND
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 AK28 GND GND W15
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON AK31 GND GND W18
AL11 GND GND W27
AL14 GND GND W6
C726 C740 C601 C589 AL19 Y15
.01UF .01UF .01UF .01UF AL22 GND GND Y18
16V 25V 16V 25V
AL25 GND GND Y29
10% 10% 10% 10%
AL3 GND GND Y4
X7R X7R X7R X7R GND GND
0402 0402 0402 0402 AL6 GND GND AL10
COMMON COMMON COMMON COMMON AL9 GND GND AM10
AM13 GND GND AG13
AM16 GND
C781 C779 C790 C744 C632 C592 C602 C623 AM17
.01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF AM20 GND
25V 25V 25V 25V 25V 25V 25V 25V
AM23 GND
10% 10% 10% 10% 10% 10% 10% 10%
AM26 GND
X7R X7R X7R X7R X7R X7R X7R X7R GND
3 0402 0402 0402 0402 0402 0402 0402 0402 AM29 GND 3
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
B12 GND
B15 GND
C796 C795 C708 C712 C780 C759 C638 C660 C587 C588 C591 C604 B18 GND
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF B21 GND
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
B24 GND
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
B27 GND
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R GND
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 B3 GND
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON B30 GND
B6 GND
B9 GND
C2 GND
GND GND C31 GND
D10 GND
D13 GND
D16 GND
D17 GND
D20 GND
D23 GND
D26 GND
D29 GND
D4 GND
D7 GND
F11 GND
F14 GND
F19 GND
F2 GND
F22 GND
4 F25 GND 4
F31 GND
F8 GND
G26 GND
G29 GND
G4 GND
G7 GND
H27 GND
H6 GND
J16 GND
J17 GND
J2 GND
J31 GND

GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Partition C Decaps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 8 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page9: DACA Interface 5V

L507 0
0603 CHANGED

C879 .1UF
0603 16V
10%
X7R
NO STUFF
DACA RGB-FILTER
1 1

OUT 9> 9<> 11< 9> 9<> 11<

R693 33 I2CA_SDA_T LB522 180R@100MHz I2CA_SDA_C

0402 5% COMMON BEAD_0603 COMMON

R698 C882
2.2K 22PF
5% 50V
0402 5%
COMMON C0G
0402
I2CA_PU_5V COMMON

R695
2.2K
5%
0402
COMMON OUT 9> 9<> 11< 9> 9<> 11<

R691 33 I2CA_SCL_T LB523 180R@100MHz I2CA_SCL_C

0402 5% COMMON BEAD_0603 COMMON

C887
22PF
50V
5%
C0G
2 0402 2
COMMON

5V

OUT 9> 9<> 11< 9> 9<> 11<

LB504 220R@100MHz TMDS_PLLVDD_REG 10< 15< 19< 19> 14 U510
IN
BEAD_0402 NO STUFF 13 74ACT08
11DACA_VS_BUF R699 33 DACA_VS_BUF_R L510 27nH DACA_VS_DVI

PEX3V3
G1
G84-400-A1
BGA820
COMMON
4 12
7
74ACT_SO
COMMON
5V
0402 5% COMMON
5V
0603 COMMON

2
C885
4/14 DACA 47PF
DACA_VDD AD10 K2 D521 50V
LB508 180R@100MHz DACA_VDD I2CA_SCL I2CA_SCL BAV99 5%
BEAD_0603 COMMON J3 I2CA_SDA C862 3
SOT23 C0G
DACA_VREF AH10 I2CA_SDA .1UF 100V 0603
DACA_VREF 16V 100MA COMMON
10% COMMON
DACA_RSET AH9 DACA_RSET DACA_HSYNC AF10 DACA_HSYNC X5R 1
C718 AK10 DACA_VSYNC 5V 0402
C711 .1UF R608 DACA_VSYNC COMMON
470PF 10V 124
50V 10% 10% 1% 9> 9<> 11< 9> 9<> 11<
X7R X5R 0402 DACA_RED AH11 PLACE NEAR SYNC BUFFER OUT
0402 0402 COMMON 14 U510
COMMON COMMON
DACA_GREEN AJ12 10 74ACT08
8 DACA_HS_BUF
R694 33 DACA_HS_BUF_R L511 27nH DACA_HS_DVI
0402 5% COMMON 0603 COMMON
DACA_BLUE AH12 9 74ACT_SO
C773 C723 COMMON 5V
4.7UF 4700PF GND 7 C886
6.3V 10% 25V 10% 47PF
3 X5R X7R DACA_IDUMP AG9 2 3
50V
0603 0402 D522 5%
COMMON COMMON BAV99 C0G
3
SOT23 0603
100V COMMON SOUTH
GND 100MA
COMMON
GND 1
Route DAC RGB with ~37.5ohm Impedence DDC_5V
J2
CON_DSUB15HD
9<> 11< VGA_SLIM
OUT NO STUFF
OUT 9<> 11< 16 SHIELD
DACA_RED L5 27nH OUT 9<> 11<
0603 COMMON 6 GND-R 6
DACA_RED_C 1 R 1 11
ID0 11 SNN_A_MON_ID0
R606 R7 C13 C6 7 GND-G
150 150 22PF 22PF 2 G SDA 12 I2CA_SDA_C
1% 1% 50V 50V
0402 0402 5% 5%
8 GND_B
COMMON COMMON C0G C0G 3 B HSYNC 13 DACA_HS_DVI
0402 0402 9 5V
COMMON COMMON SNN_A_MON_ID2 4 ID2 VSYNC 14 DACA_VS_DVI
10 GND 10
5 GND 5 15
SCL 15 I2CA_SCL_C

17 SHIELD

DACA_GREEN L6 27nH DACA_GREEN_C

NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT 0603 COMMON
C14 C7
4 DACA_VDD 12MIL 3.3V 0.100A R604 R8 22PF 22PF 4
IN
IN DACA_VREF 12MIL 150
1%
150
1%
50V
5%
50V
5%
FOR ESD DIODES
DACA_RSET 12MIL C0G
IN 0402 0402 C0G
COMMON COMMON 0402 0402 5V
I2CA_PU_5V 12MIL 5V COMMON COMMON
IN

NET NV_CRITICAL_NET IMPEDANCE MIN_LINE_WIDTH

C873
4.7UF
6.3V
DACA_RED 1 75OHM 10%
BI
DACA_GREEN 1 75OHM X5R
BI
DACA_BLUE 1 75OHM 0603
BI COMMON
11< 9> DACA_RED_C 1 75OHM
BI Place in output filter section!
11< 9> DACA_GREEN_C 1 75OHM
BI
DACA_BLUE_C 1 75OHM
DACA_BLUE L4 27nH DACA_BLUE_C
11< 9> BI 0603 COMMON
C12 C5
R605 22PF 22PF
150 50V
DACA_HSYNC 2 50OHM 50V
BI 1% R6 5%
DACA_HS_BUF 2 50OHM 150 5% C0G
BI 0402
DACA_HS_BUF_R 2 50OHM 1% C0G 0402
BI COMMON
0402 0402 COMMON
11< 9> DACA_HS_DVI 2 50OHM
BI COMMON COMMON

DACA_VSYNC 2 50OHM
BI
DACA_VS_BUF 2 50OHM
BI
DACA_VS_BUF_R 2 50OHM
BI
11< 9> DACA_VS_DVI 2 50OHM
BI

I2CA_SDA 2 50OHM
BI
I2CA_SDA_T 2 50OHM
BI
5 11< 9> BI
I2CA_SDA_C 2 50OHM 5
I2CA_SCL 2 50OHM
BI
I2CA_SCL_T 2 50OHM
BI
11< 9> I2CA_SCL_C 2 50OHM
BI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL DACA Interface
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 9 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page10: DACC Interface

5V

L506
0603
0
CHANGED
DACC RGB-FILTER
1 OUT 10<> 12< 1
C880 .1UF
0603 16V R692 33 I2CB_SDA_T LB521 180R@100MHz I2CB_SDA_C
10% 0402 5% COMMON BEAD_0603 COMMON
X7R C881
NO STUFF
R696 22PF
2.2K 50V
5% 5%
0402 C0G
COMMON 0402
COMMON

I2CB_PU_5V

R700
2.2K
5%
0402 OUT 10<> 12<
COMMON

R701 33 I2CB_SCL_T LB524 180R@100MHz I2CB_SCL_C

0402 5% COMMON BEAD_0603 COMMON
C888
22PF
50V
5%
C0G
0402
COMMON

2 2
5V
5V OUT 10<> 12<
14 U510
4 74ACT08
6 DACC_VS_BUF R682 33 DACC_VS_BUF_R L508 27nH DACC_VS_DVI
5 74ACT_SO 0402 5% COMMON 2 0603 COMMON
COMMON D518 C883
7 BAV99 47PF
3
SOT23 50V
100V 5%
100mA C0G
COMMON 0603
1 COMMON

5V

OUT 10<> 12<

14 U510 5V
1 74ACT08
LB506 220R@100MHz TMDS_PLLVDD_REG IN 9< 15< 19< 19> 3 DACC_HS_BUF R687 33 DACC_HS_BUF_R L509 27nH DACC_HS_DVI
BEAD_0402 NO STUFF 2 74ACT_SO 0402 5% COMMON 0603 COMMON
C884

PEX3V3
G1
G84-400-A1
BGA820
6 7
COMMON

3
2

D519
BAV99
SOT23
47PF
50V
5%
C0G
COMMON 100V 0603
100mA COMMON
6/14 DACC COMMON MIDDLE
3 LB509 180R@100MHz DACC_VDD AD7 DACC_VDD I2CB_SCL H4 I2CB_SCL 1 3
BEAD_0603 COMMON
I2CB_SDA J4 I2CB_SDA
DACC_VREF AH4 DACC_VREF DDC_5V
C750 DACC_RSET AF5 AG7 DACC_HSYNC
470PF C765 DACC_RSET DACC_HSYNC AG5 DACC_VSYNC J1
DACC_VSYNC OUT 10<> 12< CON_DSUB15HD
50V 10% .1UF R621
X7R 10<> 12< VGA_SLIM
16V 124 OUT NO STUFF
0402 10% OUT 10<> 12< 16 SHIELD
1%
COMMON X5R 0402 DACC_RED AF6 DACC_RED DACC_RED L2 27nH
0402 COMMON 0603 COMMON 6 GND-R 6
COMMON AG6 DACC_GREEN DACC_RED_C 1 R ID0 11
SNN_C_MON_ID0
DACC_GREEN R614 R4 C10 C2 7 GND-G
1 11

AE5 DACC_BLUE 150 150 22PF 22PF 2 G SDA 12

C783 C772 DACC_BLUE 1% 1% 50V 50V
8 GND_B
0402 0402 5% 5%
4.7UF 4700PF GND COMMON COMMON C0G C0G 3 B HSYNC 13
6.3V 10% 25V 10%
X5R X7R DACC_IDUMP AG4 0402 0402 9 5V
0603 0402 COMMON COMMON SNN_C_MON_ID2 4 ID2 VSYNC 14
COMMON COMMON 10 GND 10
5 GND 5 15
SCL 15
GND
GND GND 17 SHIELD

DACC_GREEN L3 27nH DACC_GREEN_C

0603 COMMON GND
R618 C11
150 R5 22PF C3
1% 150 50V 22PF
0402 1% 5% 50V
COMMON 0402 C0G 5%
4 COMMON 0402 C0G 4
COMMON 0402
NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT COMMON

IN DACC_VDD 12MIL 3.3V 0.100A FOR ESD DIODES

IN DACC_VREF 12MIL GND 5V
DACC_RSET 12MIL
IN

C872
4.7UF
NET NV_CRITICAL_NET IMPEDANCE MIN_LINE_WIDTH DACC_BLUE L1 27nH DACC_BLUE_C 6.3V
0603 COMMON 10%
DACC_RED 1 75OHM R630 R3 C9 C1 X5R
BI 150 150 22PF 22PF 0603
DACC_GREEN 1 75OHM
BI 1% 1% 50V 50V COMMON
DACC_BLUE 1 75OHM
BI 0402 0402 5% 5%
COMMON COMMON C0G C0G
DACC_RED_C 1 75OHM 0402 0402
Place in output filter section!
12< 10> BI
12< 10> DACC_GREEN_C 1 75OHM COMMON COMMON
BI
12< 10> DACC_BLUE_C 1 75OHM
BI

BI
DACC_HSYNC 2 50OHM GND
DACC_HS_BUF 2 50OHM
BI
DACC_HS_BUF_R 2 50OHM
BI
12< 10> DACC_HS_DVI 2 50OHM
BI
DACC_VSYNC 2 50OHM
BI
DACC_VS_BUF 2 50OHM
BI
DACC_VS_BUF_R 2 50OHM
BI
12< 10> DACC_VS_DVI 2 50OHM
BI
5 5
I2CB_SDA 2 50OHM
BI
I2CB_SDA_T 2 50OHM
BI
12< 10> I2CB_SDA_C 2 50OHM
BI

BI
I2CB_SCL 2 50OHM
NVIDIA CORPORATION
BI
I2CB_SCL_T 2 50OHM 2701 SAN TOMAS EXPRESSWAY
12< 10> I2CB_SCL_C 2 50OHM
BI
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL DACC Interface
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 10 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page11: IFP A/B Interface NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT

IFPAB_PLLVDD 12MIL 1.8V 0.035A

BI
IFPAB_IOVDD 12MIL 3.3V 0.145A
BI
IFPAB_RSET 12MIL
BI

1 1

DDC_5V

C4
4700PF
7 25V
10%
X7R
0402
NETNAME DIFF PAIR NAME NV_CRITICAL_NET NV_IMPEDANCE COMMON
G1 25 SHIELD1
G84-400-A1
2 BGA820 GND 26 SHIELD2 2
COMMON 27 SHIELD3
7/14 IFPAB 28 SHIELD4
SNN_VPROBEAB AM4 IFPAB_VPROBE IFPA_TXC AJ9 ATXC* ATXC 1 100DIFF
IFPA_TXC AK9 ATXC ATXC 1 100DIFF 17 TX0-
18 TX0+ J5
IFPAB_RSET AL5 9 TX1- DVI-I
IFPAB_RSET AJ6 10 17 9 1 DVI_I_(SLIM_)SHLD_MOLEX
TMDS_PLLVDD IFPA_TXD0 ATXD0* ATXD0 1 100DIFF TX1+
AH6 1 DVI_I
IFPA_TXD0 ATXD0 ATXD0 1 100DIFF TX2-
2 CHANGED
TX2+
3 SHLD24
LB516 180R@100MHz IFPAB_PLLVDD AC9 IFPAB_PLLVDD IFPA_TXD1 AH7 ATXD1* ATXD1 1 100DIFF 11 SHLD13
C805 BEAD_0603 COMMON
IFPA_TXD1 AH8 ATXD1 ATXD1 1 100DIFF 19 SHLD05
4.7UF C803 C732 C731 C804 12 TX3-
6.3V 4.7UF 1000PF 4700PF 470PF R612 13 TX3+
6.3V 16V 25V 50V 1K
10%
10% 10% 10% 10% IFPA_TXD2 AK8 ATXD2* ATXD2 1 100DIFF 4 TX4-
X5R 1%
X5R X7R X7R X7R 0402 IFPA_TXD2 AJ8 ATXD2 ATXD2 1 100DIFF 5 TX4+
0603
COMMON 0603 0402 0402 0402 COMMON 20 TX5-
COMMON COMMON COMMON COMMON AD9 IFPAB_PLLGND 21 TX5+
IFPA_TXD3 AH5 SNN_ATXD3* 9<> 9> IN
I2CA_SCL_C 6 DDCC
IFPA_TXD3 AJ5 SNN_ATXD3 9<> 9> IN
I2CA_SDA_C 7 DDCD
GND 14 VDDC
15 GND
TMDS_IOVDD GND AL4 SNN_BTXC* 22 SHLDC
IFPB_TXC AK4 24
IFPB_TXC SNN_BTXC TXC-
23 TXC+
9<> 9> IN
DACA_VS_DVI 8 VSYNC
LB507 180R@100MHz IFPAB_IOVDD AF9 IFPA_IOVDD IFPB_TXD4 AM5 BTXD4* BTXD4 1 100DIFF DVI_A_HPD_C 16 HPD 24 16 8
BEAD_0603 COMMON
IFPB_TXD4 AM6 BTXD4 BTXD4 1 100DIFF
C770 AF8 9<> 9> DACA_RED_C C1 R
3 4.7UF C784 C767 C774 IFPB_IOVDD IN
C2 3
6.3V
9<> 9> IN
DACA_GREEN_C G
4.7UF 4700PF 470PF AL7 BTXD5* BTXD5 1 100DIFF 9<> 9> DACA_BLUE_C C3 B
10% 6.3V 25V 50V IFPB_TXD5 AM7
IN
C5 C3 C1
X5R 10% 10% 10% IFPB_TXD5 BTXD5 BTXD5 1 100DIFF AGND1
0603 X5R X7R X7R C5 C5A
COMMON 0603 0402 0402 C5A AGND2
COMMON COMMON COMMON
IFPB_TXD6 AK5 BTXD6* BTXD6 1 100DIFF 9<> 9> IN
DACA_HS_DVI C4 HSYNC C4 C2
IFPB_TXD6 AK6 BTXD6 BTXD6 1 100DIFF
GND 29 SHIELD5
30 SHIELD6
IFPB_TXD7 AL8 SNN_BTXD7* 31 SHIELD7
C753 C739 IFPB_TXD7 AK7 SNN_BTXD7 32 SHIELD8
4700PF 470PF
GND
25V 50V
10% 10%
X7R X7R
0402 0402
COMMON COMMON

GND
GND

4 4

Hotplug Detection
PEX3V3
17< OUT
GPIO0_DVI_A_HPD R704 1K DVI_A_HPD_R LB526 180R@100MHz
2 0402 5% COMMON BEAD_0603 COMMON
D520 C890
R703 BAV99
220PF
10K 3 50V
SOT23
5% 100V 5%
0402 100MA C0G
COMMON COMMON 0402
1
COMMON

GND

5 GND 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL IFP A/B Interface
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 11 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page12: IFP C/D Interface NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT

IFPCD_PLLVDD 12MIL 1.8V 0.035A

BI
IFPCD_IOVDD 12MIL 3.3V 0.145A
BI
IFPCD_RSET 12MIL
BI

1 1

DDC_5V

8 C8
4700PF
25V
10%
X7R
0402
COMMON
G1 25 SHIELD1
G84-400-A1 NETNAME DIFF PAIR NAME NV_CRITICAL_NET NV_IMPEDANCE
2 BGA820 GND 26 SHIELD2 2
COMMON 27 SHIELD3
8/14 IFPCD 28 SHIELD4
SNN_VPROBECD AK3 IFPCD_VPROBE IFPC_TXC AM3 CTXC* CTXC 1 100DIFF
IFPC_TXC AM2 CTXC CTXC 1 100DIFF 17 TX0-
18 TX0+ J4
IFPCD_RSET AH3 9 TX1- DVI-I
IFPCD_RSET AE1 10 17 9 1 DVI_I_(SLIM_)SHLD_MOLEX
TMDS_PLLVDD IFPC_TXD0 CTXD0* CTXD0 1 100DIFF TX1+
AE2 1 DVI_I
IFPC_TXD0 CTXD0 CTXD0 1 100DIFF TX2-
2 CHANGED
TX2+
3 SHLD24
LB511 180R@100MHz IFPCD_PLLVDD AA10 IFPCD_PLLVDD IFPC_TXD1 AF2 CTXD1* CTXD1 1 100DIFF 11 SHLD13
BEAD_0603 COMMON
IFPC_TXD1 AF1 CTXD1 CTXD1 1 100DIFF 19 SHLD05
C801 C786 C748 C721 12 TX3-
4.7UF 4.7UF 4700PF 470PF R634 13 TX3+
6.3V 6.3V 25V 50V 1K
10% 10% 10% 10% IFPC_TXD2 AH1 CTXD2* CTXD2 1 100DIFF 4 TX4-
1%
X5R X5R X7R X7R 0402 IFPC_TXD2 AG1 CTXD2 CTXD2 1 100DIFF 5 TX4+
0603 0603 0402 0402 COMMON 20 TX5-
COMMON COMMON COMMON COMMON AB10 IFPCD_PLLGND 21 TX5+
10<> 10> IN
I2CB_SCL_C 6 DDCC
10<> 10> I2CB_SDA_C 7 DDCD
GND IN
14 VDDC
15 GND
TMDS_IOVDD GND AH2 SNN_DTXC* 22 SHLDC
IFPD_TXC AG3 24
IFPD_TXC SNN_DTXC TXC-
23 TXC+
10<> 10> IN
DACC_VS_DVI 8 VSYNC
LB514 180R@100MHz IFPCD_IOVDD AD6 IFPC_IOVDD IFPD_TXD4 AJ1 DTXD4* DTXD4 1 100DIFF DVI_C_HPD_C 16 HPD 24 16 8
BEAD_0603 COMMON
IFPD_TXD4 AK1 DTXD4 DTXD4 1 100DIFF
C797 C793 C763 C749 AE7 10<> 10> DACC_RED_C C1 R
3 4.7UF 4700PF 470PF IFPD_IOVDD IN
C2 3
4.7UF 6.3V 25V 50V
10<> 10> IN
DACC_GREEN_C G
6.3V
10% 10% 10% IFPD_TXD5 AL1 DTXD5* DTXD5 1 100DIFF 10<> 10> IN
DACC_BLUE_C C3 B C3 C1
10% X5R X7R X7R IFPD_TXD5 AL2 DTXD5 DTXD5 1 100DIFF C5 AGND1
X5R 0603 0402 0402
0603 C5 C5A
COMMON
COMMON COMMON COMMON C5A AGND2
IFPD_TXD6 AJ3 DTXD6* DTXD6 1 100DIFF 10<> 10> IN
DACC_HS_DVI C4 HSYNC C4 C2
IFPD_TXD6 AJ2 DTXD6 DTXD6 1 100DIFF
GND 29 SHIELD5
C743 C737 30 SHIELD6
4700PF 470PF GND 31 SHIELD7
25V 50V
10% 10%
32 SHIELD8
X7R X7R
0402 0402
COMMON COMMON

GND
GND

4 4

Hotplug Detection
PEX3V3

17< OUT
GPIO1_DVI_C_HPD R702 1K DVI_C_HPD_R LB525 180R@100MHz
2 0402 5% COMMON BEAD_0603 COMMON
D517 C889
R697 BAV99
220PF
10K 3 50V
SOT23
5% 100V 5%
0402 100MA C0G
COMMON COMMON 0402
1
COMMON

GND

5 GND 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL IFP C/D Interface
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 12 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page13: MIOA & MIOB Interface and SLI Connector 14>

14<>
13<>
13<>
18>
BI
BI
NET
MIOBD<7..0>
VIPPCLK
NV_CRITICAL_NET
2
2
IMPEDANCE
50OHM
50OHM
MIN_LINE_WIDTH

18> 13<> SLI_D<14..0> 2 50OHM

G3 VIP/MIOB
BI
SLI_DR_CMD 2 50OHM
BI
SLI_DR_CLK 2 50OHM
BI
SLI_EXT_REFCLK 2 50OHM
BI

1 1
PEX3V3
NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT

LB515
180R@100MHz
12 MIOB_VDDQ
IN
IN
MIOB_VDDQ
MIOB_VREF
MIOBCAL_PD_VDDQ
12MIL
12MIL
12MIL
3.3V

3.3V
0.100A

COMMON PLACE CAPS CLOSE TO GPU PINS IN MIOBCAL_PU_GND 12MIL

BEAD_0603
MIOB_VDDQ
MIOA_VDDQ 12MIL 2.5V 0.100A
C794 C752 C733 G1 MIOA_VDDQ 12MIL
G84-400-A1 IN MIOA_VREF
4.7UF .1UF 100PF BGA820 MIOACAL_PD_VDDQ 12MIL 2.5V
6.3V 16V 50V COMMON IN
10% 10% IN MIOACAL_PU_GND 12MIL
5%
X5R X7R C0G 12/14 DRB/MIOB
0603 0402 0402
COMMON COMMON COMMON
AA8 MIOB_VDDQ MIOBD<11..0> 13<> 14<> 18>
AB7 DR MIO BI
AB8 MIOB_VDDQ AC3 MIOBD<0> 0
AC6 MIOB_VDDQ DRB_D0 MIOBD0 AC1
GND MIOB_VDDQ DRB_D1 MIOBD1 MIOBD<1> 1
AC7 MIOB_VDDQ DRB_D2 MIOBD2 AC2 MIOBD<2> 2
DRB_D3 MIOBD3 AB2 MIOBD<3> 3
DRB_D4 MIOBD4 AB1 MIOBD<4> 4
R26 AA1 MIOBD<5> 5
49.9 DRB_D5 MIOBD5 AB3 MIOBD<6> 6
1% DRB_D6 MIOBD6 AA3
0402 MIOBD<7> 7
DRB_D7 MIOBD7 AC5
COMMON MIOBD<8> 8
Y1 DRB_D8 MIOBD8 AB5
MIOBCAL_PD_VDDQ MIOBD<9> 9
2 MIOBCAL_PD_VDDQ DRB_D9 MIOBD9 AB4 STRAP ONLY 2
SNN_MIOBD<10>
MIOBCAL_PU_GND Y3 DRB_D10 MIOBD10 AA5 MIOBD<11> 11
MIOBCAL_PU_GND DRB_D11 MIOBD11 W3 SNN_MIOBD<12>
R31 MIOB_VDDQ RFU V1 SNN_MIOBD<13>
49.9 MIOB_VREF
RFU Y5 SNN_MIOBD<14>
1%
Y2 RFU W1 SNN_MIOBD<15>
0402 MIOB_VREF RFU
COMMON
R27
1K W4 SNN_VIPHAD<4>
1% RFU W5 SNN_VIPHAD<5>
0402 RFU V5
GND COMMON RFU SNN_VIPHAD<6>
RFU Y6 SNN_VIPHAD<7>

R32 C34
1K .1UF AD3 MIOB_CTL3 18>
1% 16V DRB_D12 MIOB_CTL3 AF3
BI
SNN_MIOB_HSYNC
0402 10% DRB_D13 MIOB_HSYNC AE3
COMMON VIPPCLK 13<> 14>
X7R DRB_D14 MIOB_VSYNC AD1
BI
0402 SNN_MIOB_DE
COMMON
DRB_CMD MIOB_DE

DRB_CLK MIOB_CLKOUT AD4 SNN_MIOB_CLKOUT

NC MIOB_CLKOUT AD5 SNN_MIOB_CLKOUT*
GND DR_REFCLK MIOB_CLKIN AE4 SLI_EXT_REFCLK

3 3

G3 MIOA SLI Connector

MIOA_2V5
11 SLI_D<14..0>
BI 13<> 18>

LB512
180R@100MHz CN1
COMMON
BEAD_0603
CON_MIO_26_EDGE
NONPHY
MIOA_VDDQ COMMON
G1
G84-400-A1 SLI - G80/NVIO
C791 C775 C788 C782 C769 C720 C736 BGA820 0 SLI_D<0> A2 B3
4.7UF .1UF 100PF 100PF 1000PF 1000PF 1000PF COMMON B4 DR<0> GND B7
1 SLI_D<1>
6.3V 16V 50V 50V 16V 16V 16V
A4 DR<1> GND B11
10% 10% 5% 5% 10% 10% 10% 11/14 DRA/MIOA 2 SLI_D<2>
DR<2> GND
X5R X7R C0G C0G X7R X7R X7R 3 SLI_D<3> A5 DR<3> GND A3
0603 0402 0402 0402 0402 0402 0402 4 SLI_D<4> B6 DR<4> GND A7
COMMON COMMON COMMON COMMON COMMON COMMON COMMON M7 5 SLI_D<5> A6 A11
M8 MIOA_VDDQ DR MIO A8 DR<5> GND
6 SLI_D<6>
R8 MIOA_VDDQ P2 B9 DR<6>
SLI_D<0> 0 7 SLI_D<7>
T8 MIOA_VDDQ DRA_D0 MIOAD0 N2 B10 DR<7>
SLI_D<1> 1 8 SLI_D<8>
U9 MIOA_VDDQ DRA_D1 MIOAD1 N1 A10 DR<8>
SLI_D<2> 2 9 SLI_D<9>
4 MIOA_VDDQ DRA_D2 MIOAD2 N3 B12 DR<9> GND 4
SLI_D<3> 3 10 SLI_D<10>
DRA_D3 MIOAD3 M1 A12 DR<10>
SLI_D<4> 4 11 SLI_D<11>
R33 DRA_D4 MIOAD4 M3 A13 DR<11>
SLI_D<5> 5 12 SLI_D<12>
49.9 DRA_D5 MIOAD5 P5 B5 DR<12>
SLI_D<6> 6 13 SLI_D<13>
1% PLACE CAPS & RES CLOSE TO GPU PINS DRA_D6 MIOAD6 N6 A9 DR<13>
SLI_D<7> 7 14 SLI_D<14>
0402 DRA_D7 MIOAD7 N5 DR<14>
COMMON SLI_D<8> 8
MIOACAL_PD_VDDQ L1 DRA_D8 MIOAD8 M4 B13
SLI_D<9> 9
MIOACAL_PD_VDDQ DRA_D9 MIOAD9 L4 B8 DR_CMD
SLI_D<10> 10
MIOACAL_PU_GND L3 DRA_D10 MIOAD10 L5 DR_CLK
SLI_D<11> 11
MIOACAL_PU_GND DRA_D11 MIOAD11 A1
17> GPIO11_SLI_SYNC0
R28 IN
B1 RASTER_SYNC
MIOA_VDDQ 17<> OUT SWAPRDY_A
SWAP_RDY
49.9
1%
0402
MIOA_VREF L2 MIOA_VREF SLI_EXT_REFCLK B2 EXT_REFCLK
COMMON
R34
1K
1%
0402
COMMON
GND
R35 C35
1K .1UF P3 SLI_D<12> 12
1% 16V DRA_D12 MIOA_CTL3 R3 SLI_D<13> 13
0402 10% DRA_D13 MIOA_HSYNC R1
COMMON X7R SLI_D<14> 14
DRA_D14 MIOA_VSYNC P1
0402 SLI_DR_CMD
COMMON
DRA_CMD MIOA_DE

DRA_CLK MIOA_CLKOUT R4 SLI_DR_CLK

GND NC MIOA_CLKOUT P4 SNN_MIOA_CLKOUT*

RFU M5 SNN_RFU_M5
5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL MIOA & MIOB and SLI Connector
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 13 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page14: Video Capture (Phillips 7115) 7115_VDD

NET
7115_VDD
MIN_LINE_WIDTH
18MIL
VOLTAGE
3.3V
NV_NET_MAX_CURRENT
0.300A

7115_VDDA 16MIL 3.3V 0.090A

IN
7115_VDDE 16MIL 3.3V 0.080A
IN
7115_VDDX 16MIL 3.3V 0.010A
IN

1 1

U509
SAA7115HL
15_QFP100
NO STUFF
7114H,7115HL (QFP100) 7115_VDD

Video In
SNN_7115_AOUT 22 23 7115_VDDA LB518 600R@100MHZ
AOUT VDDA0 17 BEAD_0603 NO STUFF
VDDA1 11 C834 C828 C841 C827 C821 C820
MINIDIN_Y_CVBSin C830 .047UF 7115_A11 20 VDDA2 2200PF 2200PF 2200PF .1UF 4.7UF 4.7UF
15<> 15> IN AI11 50V 50V 50V 16V 6.3V 6.3V
0402 16V 7115_A12 18 AI12 10% 10% 10% 10% 10% 10%
10% 7115_A1D 19 21
To 4/5/12-Pin Tuner/Video header AI1D AGND X7R X7R X7R X7R X5R X5R
X7R
NO STUFF VSSA0 24 0402 0402 0402 0402 0603 0603
VSSA1 15 NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
15<> 15> IN
MINIDIN_Cin C835 .047UF 7115_A21 16 AI21 VSSA2 9
0402 16V 7115_A22 14 AI22
10% 7115_A23 12
X7R
7115_A24 10 AI23
NO STUFF
7115_A2D 13 AI24
AI2D 2 SNN_7115_TDO
C833 C836 C840 C843 C24 C22 TDO 99 SNN_7115_TMS
.047UF .047UF .047UF .047UF .047UF .047UF TMS 3 SNN_7115_TDI
16V 16V 16V 16V 16V 16V TDI 97
2 10% 10% 10% 10% 10% 10% TRST 7115_TRST* R681 1K 2
X7R X7R X7R X7R X7R X7R SNN_7115_AMCLK 37 AMCLK TCK 98 7115_TCK 0402 5% NO STUFF
40 JTAG disabled
0402 0402 0402 0402 0402 0402 SNN_7115_ALRCLK
ALRCLK R680 1K
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF SNN_7115_ASCLK 39 ASCLK 0402 5% NO STUFF
41 AMXCLK
TEST0 44 SNN_7115_TEST0
TEST1 73 SNN_7115_TEST1
TEST2 74 SNN_7115_TEST2
SNN_7115_24576 4 XTOUT TEST3 77 SNN_7115_TEST3
7115Xout 6 XTALO TEST4 78 SNN_7115_TEST4
XTAL_6X24500143 7115Xin 7 XTALI TEST5 79 SNN_7115_TEST5
Y501 24.576MHZ
CER_SMD +/-30PPM
C856 NO STUFF C850
22PF 22PF 36 7115_RTCO
50V 50V RTCO 34 SNN_7115_RTS0
5% 5% RTS0 35 R657
C0G C0G SNN_7115_RTS1
RTS1 28 1K
0402 0402 SNN_7115_LLC
NO STUFF NO STUFF
LLC 29 5%
SNN_7115_LLC2
LLC2 0402
NO STUFF
32 SDA
31 SCL X-Port
7115_VDD RESET_7114 27 RES (CE) XPD0 90 SNN_7115_XPD0
SNN_7115_RESOUT 30 RES_OUT XPD1 89 SNN_7115_XPD1
XPD2 87 SNN_7115_XPD2

I-Port
XPD3
XPD4
XPD5
86
85
84
SNN_7115_XPD3
SNN_7115_XPD4
SNN_7115_XPD5
SAA 7115
3
Stuff Pull-Up for 7115
R656
10K
5%
0
1
2
MIOBD<0>
MIOBD<1>
MIOBD<2>
62
61
60
IPD0
IPD1
IPD2
XPD6
XPD7
82
81
SNN_7115_XPD6
SNN_7115_XPD7 I2C ADDRESS 0X42 3
Stuff 0ohm for 7114 0402 3 MIOBD<3> 59 IPD3 XCLK 94 SNN_7115_XCLK
NO STUFF 4 MIOBD<4> 57 IPD4 XDQ 95 SNN_7115_XDQ
5 MIOBD<5> 56 IPD5 XRH 92 SNN_7115_XRH
17<> 15<> BI
I2CC_SDA 6 MIOBD<6> 55 IPD6 XRV 91 SNN_7115_XRV
17< 15< IN
I2CC_SCL 7 MIOBD<7> 54 IPD7 XRDY 96 SNN_7115_XRDY
XTRI 80 SNN_7115_XTRI
17> IN
RESET_BUF* R655 0 SNN_7115_HPD0 72 HPD0
0402 5% NO STUFF SNN_7115_HPD1 71 HPD1 7115_VDD
SNN_7115_HPD2 70 HPD2
VDD
SNN_7115_HPD3 69 HPD3
18> 13<> BI
MIOBD<7..0> SNN_7115_HPD4 67 HPD4 VDD_XTAL 8 7115_VDDX LB519 600R@100MHZ
SNN_7115_HPD5 66 HPD5 VDDDE1 1 BEAD_0603 NO STUFF
SNN_7115_HPD6 65 25 C846 C845 C838 C848
SNN_7115_HPD7 64 HPD6 VDDDE2 51 2200PF 2200PF 4.7UF 4.7UF
HPD7 VDDDE3 75 50V 50V 6.3V 6.3V
VDDDE4 33 10% 10% 10% 10%
VDDDI1 X7R X7R X5R X5R
13<> OUT VIPPCLK R650 0 VIPPCLK_R 45 ICLK VDDDI2 43 0402 0402 0603 0603
0402 5% NO STUFF SNN_7115_IDQ 46 IDQ VDDDI3 58 NO STUFF NO STUFF NO STUFF NO STUFF
SNN_7115_IGPH 53 IGPH VDDDI4 68
SNN_7115_IGPV 52 IGPV VDDDI5 83
SNN_7115_ITRDY 42 ITRDY VDDDI6 93 7115_VDDE LB520 600R@100MHZ
R651 4.7K RESET_7115 47 ITRI BEAD_0603 NO STUFF
0402 5% NO STUFF SNN_7115_IGP0 48 C860 C815 C847 C857 C831 C859 C819 C858 C851
SAA7115 RESET (100US DELAY) C813 SNN_7115_IGP1 49 IGP0 D-GND 2200PF 2200PF 2200PF 2200PF 2200PF .1UF .1UF 4.7UF 4.7UF
.047UF IGP1 5 50V 50V 50V 50V 50V 16V 16V 6.3V 6.3V
16V VSS_XTAL 26 10% 10% 10% 10% 10% 10% 10% 10% 10%
10% VSSDE1 X7R X7R X7R X7R X7R X7R X7R X5R X5R
X7R VSSDE2 50 0402 0402 0402 0402 0402 0402 0402 0603 0603
0402
VSSDE3 76 NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
4 NO STUFF
VSSDE4 100 4
VSSDI1 38
VSSDI2 63
VSSDI3 88

C824 C816 C822 C853 C852 C855 C854 C817

2200PF 2200PF 2200PF 2200PF 2200PF .1UF .1UF .1UF
50V 50V 50V 50V 50V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R
PEX12V_IN 0402 0402 0402 0402 0402 0402 0402 0402
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF

R525
1210 5%
3.6
NO STUFF
7115_VDD REGULATOR
PEX3V3 7115_VDD
12VDROP_1

R518 3.6 U3
1210 5% NO STUFF AZ1117T-3.3 LB4
FIX3.3V
GOI,IGOI,TO263 180R@100MHz
12VDROP_2 TO263 NO STUFF
NO STUFF
BEAD_0603
R511 3.6 12VDROP_3 3 IN OUT
2
1210 5% NO STUFF 4
GND/ADJ

TAB
C510 C508 C51 C530 C529
10UF .1UF .1UF 47UF 47UF
16V 16V 16V 6.3V 6.3V
10% 10% 10% 20% 20%
1

X5R X7R X7R X5R X5R

5 1206 0402 0402 1206 1206 5
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF

GND GND GND GND GND GND NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL Video Capture (Philips 7115)
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 14 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page15: DACB, TV-Out, and Stereo Interface

STEREO GLASSES BUFFER
Place close to MiniDIN connector!
1 5V 1

R10 5V
10K
5%
0402
NO STUFF
5 U1
17> IN
STEREO R1 0 STEREO_5V 1 SN74LVC1G08
0402 5% NO STUFF 4 STEREO_BUF R11 33 SCL_C_STEREO
2 SC70-5 0402 5% NO STUFF
5V NO STUFF
3

C20
.1UF
16V
10%
X7R
0402
NO STUFF

FOR DEBUG PURPOSES ONLY .. DEFAULT IS NO STUFF

2 2

For STEREO GLASSES 3pin MiniDIN only:

Stuff bead!
And replace 0 Ohm resistor with 220PF cap!

MDIN_SCL_C_STEREO LB1 180R@100MHz SCL_C_STEREO R9 0 I2CC_SCL IN 14< 17<

BEAD_0603 COMMON 0402 5% COMMON
C15
220PF
50V
5%
C0G
0402
COMMON DDC_5V
3 C866 8.2PF 3
0603 50V
+/-0.5PF
NPO C18
LB505 220R@100MHz TMDS_PLLVDD_REG IN 9< 10< 19< 19> COMMON
BEAD_0402 NO STUFF 1UF MDIN_SDA_C LB2 180R@100MHz I2CC_SDA 14<> 17<>
10V BI
L504 0.56uH MDIN_PBOUT_C
10%
BEAD_0603 COMMON
0603 COMMON X5R C16
G1 R609 R689 C861 C874 220PF
PEX3V3 G84-400-A1
BGA820
COMMON 5 150
1%
0402
150
1%
0402
82PF
50V
5%
82PF
50V
5%
0603
COMMON 50V
5%
C0G
5/14 DACB(TV) COMMON COMMON C0G C0G 0402
LB510 180R@100MHz DACB_VDD V8 DACB_VDD 0402 0402 COMMON
BEAD_0603 COMMON COMMON COMMON J3
DACB_VREF R5 DACB_VREF
CON_MINIDIN_7
7P_SCART_IN
C869 8.2PF CHANGED C867 8.2PF
C785 DACB_RSET R7 DACB_RSET 0603 50V 7 SCL 5V+ 10 0603 50V
C778 C761 C760 U5 SNN_DACB_CSYNC +/-0.5PF +/-0.5PF
4.7UF 4700PF 470PF .1UF R607 DACB_CSYNC NPO Pb out NPO
6.3V 10% COMMON
9 out SDA 4 COMMON
X5R
25V 10% 50V 10% 16V 124
X7R X7R 10% 1% C/Pr Y/CVBS
DACB_CVBS_OUT
0603 R6 DACB_C_OUT DACB_C_OUT L501 0.56uH MDIN_COUT_C 8 out out 6 MDIN_YOUT_C L505 0.56uH
0402 0402 X5R 0402 DACB_RED
COMMON
COMMON COMMON 0402 COMMON 0603 COMMON 0603 COMMON
COMMON T5 DACB_CVBS_OUT R610 R688 C863 C875 MINIDIN_GND1 5 GND GND 3 MINIDIN_GND2 C878 C868 R690 R613
DACB_GREEN 150 150 82PF 82PF 82PF 82PF 150 150
1% 50V 50V C 50V 50V 1% 1%
DACB_BLUE T6 DACB_PB_OUT 0402
1%
0402 5% 5%
1 Y/CVBS
in in 2 5% 5% 0402 0402
COMMON COMMON C0G C0G C0G C0G COMMON COMMON
GND 0402 0402 11 12 13 0402 0402
V7 COMMON COMMON R2 COMMON COMMON
DACB_IDUMP 0
5%
C871 22PF 0603
C870 22PF
0603 50V COMMON 0603 50V
5% 5%
4 C0G C0G
4
GND NO STUFF NO STUFF

15<> 14< OUT

MINIDIN_Y_CVBSIN R686 18 MDIN_YIN_CLAMP L503 1.8uH MDIN_YIN_C MDIN_CIN_C L502 1.8uH MDIN_CIN_CLAMP R685 18 MINIDIN_CIN
OUT 14<
0402 5% NO STUFF 0603 NO STUFF 0603 NO STUFF 0402 5% NO STUFF 15<>
R684 PEX3V3 C865 C877 C876 C864 PEX3V3 R683
56 330PF 270PF keep stub short 270PF 330PF 56
5% 50V 50V 50V 50V 5%
0402 5% 5% 5% 5% 2 0402
NO STUFF 2 C0G C0G R12 0 C0G C0G D516 NO STUFF
0402 0402 0402 5% NO STUFF 0402 0402 BAV99
D515 NO STUFF NO STUFF NO STUFF NO STUFF 3
BAV99 SOT23
3
SOT23 100V
100V 100MA
100MA NO STUFF
NO STUFF 1
1
NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT DDC_5V keep stub short from the pin
IN DACB_VDD 12MIL 3.3V 0.200A
IN DACB_VREF 12MIL LB3
DACB_RSET 12MIL BEAD_0402 NO STUFF
IN
240R@100MHz
NET NV_CRITICAL_NET IMPEDANCE MIN_LINE_WIDTH
DACB_C_OUT 1 75OHM
OUT C17
DACB_CVBS_OUT 1 75OHM
OUT 0
OUT DACB_PB_OUT 1 75OHM
10V
5%
BI MDIN_PBOUT_C 1 75OHM X5R
MDIN_COUT_C 1 75OHM 0603
BI CHANGED
BI MDIN_YOUT_C 1 75OHM
5 5
15> 14< BI MINIDIN_Y_CVBSIN 1 75OHM
BI MDIN_YIN_C 1 75OHM
BI MDIN_YIN_CLAMP 1 75OHM

15> 14<
BI
BI
MDIN_CIN_C
MINIDIN_CIN
1
1
75OHM
75OHM
NVIDIA CORPORATION
BI MDIN_CIN_CLAMP 1 75OHM 2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL DACB, TV-Out, and Stereo Interface
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 15 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page16: XTAL/PLLVDD and SPDIF Connector NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT

PLLAVDD 12MIL 1.2V 0.140A

IN

NET IMPEDANCE NV_CRITICAL_NET MIN_LINE_WIDTH

IN SPDIFIN 75OHM 1
IN SPDIFIN_C 75OHM 1
IN SPDIFIN_C2 75OHM 1
1 IN SPDIFIN_COMP 75OHM 1 1
IN SPDIFIN_COMP_R 75OHM 1
IN SPDIFIN_COMP_R1 75OHM 1
PEX3V3 IN SPDIFIN_C3 75OHM 1
IN SPDIFIN_COMP2 75OHM 1
IN SPDIFIN_COMP2_Q 75OHM 1
2 2< IN F_SPDIFIN 75OHM 1
D1
BAV99
3
SOT23 XTALIN 50OHM 1
100V OUT
XTALOUT 50OHM 1
100MA OUT
COMMON
1 XTALSSIN 50OHM 1
OUT
XTALOUTBUFF 50OHM 1
OUT

GND
J8 1 C30 .01UF
SPDIF IN HDR_1X2
MALE
2.54MM
0
2
SPDIFIN
0402 16V
10%
X7R
F_SPDIFIN OUT 2< 16<

COMMON
NORM
COMMON
GND

2 2

PEX3V3

R629 PEX3V3
7.15K
1%
0402
COMMON
SPDIFIN_C3 R638
PEX3V3 R625 7.15K D513 1N4148 10K
5%
0402 1% COMMON SOT23 1 3
COMMON R624 0402
R617 1K PEX3V3 COMMON
1K 1%
1% PEX3V3 0402
R19 0402 COMMON
7.15K COMMON
1% U503
0402 1G1D1S 3
U503 8 AZ358 D
COMMON
AZ358 SO8 Q516
8
SO8 GND 6 V+ COMMON RHK003N06
SOT23_1G1D1S R639
GND SPDIFIN_C2 2 V+ COMMON 7 SPDIFIN_COMP2 1G COMMON 76.8
1 SPDIFIN_COMP R616 7.15K SPDIFIN_COMP_R R636 1K SPDIFIN_COMP_R15 S 2 1%
C806 .01UF SPDIFIN_C 3 0402 1% COMMON 0402 1% COMMON V- MAX_VOLTAGE=60V 0402
0402 16V V- C762 4 C1000 CONTINUOUS_CURRENT=0.3A@25C
SPDIFIN_COMP2_Q R_DS_ON=1.5R
MAX_CURRENT=1.2A
NO STUFF
10% R20 4 .01UF .01UF MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
X7R 1K 16V 16V
COMMON 1% 10% 10%
0402 X7R X7R
R25
COMMON 0402 GND 0402 76.8 GND
COMMON 1%
3 GND COMMON
0402 3
R637 7.15K COMMON
0402 1% COMMON GND
GND GND
GND

XTAL/PLLVDD 13

G1
G84-400-A1
BGA820
COMMON
PEXVDD
13/14 XTAL_PLL
4 4
LB513 240R@100MHz PLLAVDD T9 PLLAVDD
BEAD_0402 COMMON T10 VID_PLLVDD
C802 C777 C729 C776
4.7UF 4.7UF .1UF 4700PF U10
10% 6.3V 6.3V 16V 10% 25V 10% PLLGND
X5R 10% X7R X7R
0603 X5R 0402 0402
COMMON 0603 COMMON COMMON
COMMON
GND

GND XTALSSIN T1 XTALSSIN XTALOUTBUFF T2 XTALOUTBUFF

GND R30
10K U1 U2
5% XTALIN XTALOUT
0402
COMMON

XTAL_4PIN_TXC
GND XTALIN Y1 27 MHZ XTALOUT
H10SSMD 10 PPM 85C
COMMON
C32 C33 R29
18PF 18PF 330
50V 50V 5%
5% 5% 0402
C0G C0G COMMON
0402 0402
COMMON COMMON

5 GND GND GND 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL XTAL/PLLVDD and SPDIF Connector
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 16 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page17: GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-pin/4-pin Fan Control
PEX3V3

R649
200 PEX3V3
5%
0402
COMMON
R24
10K
1 C812 5% 1
GPIO & JTAG THERM_PEX3V3_R
.1UF
10V
10%
0402
COMMON

X5R
0402
U2 COMMON
MAX6646MUA
SO8_122MIL
COMMON
THERM_DP 2 D+ VDD 1 GND
THERM_DN 3 D- GPIO8_THERM_ALERT*
OUT 17> 18< 17> 18<
THERM 4 GPIO8_THERM_ALERT_R R23 0
C31 5V 6 ALERT_NVVDD_EN 0402 5% COMMON 18> 22<
2200PF I2CC_SCL 8 ALERT OUT
17< 15< 14< 17< 15< 14< IN SCL
50V
10% 17<> 15<> 14<> 17<> 15<> 14<> BI
I2CC_SDA 7 SDA GND 5
X7R
0402
COMMON C756 C755
.1UF .1UF GND
10V 10V
10% 10%
X5R X5R
0402 0402
NO STUFF NO STUFF
5V 5V

PEX3V3
G1
G84-400-A1
BGA820
COMMON
9 GND
R647 R645 R13 R644
9/14 MISC1 2.2K 2.2K 2.2K 2.2K
2 F6 5% 5% 5% 5% 2
CLAMP 0402 0402 0402 0402
COMMON COMMON COMMON COMMON

R665 R652 R658 C826 SNN_TH_BOS V6 C1 I2CS_SCL_G R648 33 I2CS_SCL 2>

180 10K 10K 1UF THERMALSENSOR_OBS I2CS_SCL B1
IN
5% 6.3V I2CS_SDA I2CS_SDA_G 0402 5% COMMON R641 33 I2CS_SDA
BI 2<> PEX3V3
5% 5% 0402 5% COMMON
0402 0402 0402 10%
COMMON COMMON COMMON X5R THERM_DN J1 THERMDN I2CC_SCL G2 I2CC_SCL_G R21 33 I2CC_SCL
0402
I2CC_SDA G1 I2CC_SDA_G 0402 5% COMMON R22 33 I2CC_SDA
COMMON THERM_DP K1 THERMDP 0402 5% COMMON
R1000 PEX12V
GND K3 GPIO0_DVI_A_HPD 11>
10K
JTAG_TCLK AJ11 GPIO0 H1 GPIO1_DVI_C_HPD
IN 5%
JTAG_TCK GPIO1 IN 12> 0402
JTAG_TMS AK11 JTAG_TMS GPIO2 K5 SNN_GPIO2 COMMON
JTAG_TDI AK12 JTAG_TDI GPIO3 G5 SNN_GPIO3 1 J6
JTAG_TDO AL12 E2 GPIO4_NVFAN_TACH 2 HDR_1M4
R666 JTAG_TDO GPIO4 MALE
270 JTAG_TRST* AL13 JTAG_TRST GPIO5 J5 GPIO5_VSEL0
OUT 21< 3 2MM
5%
GPIO6 G6 GPIO6_VSEL1
OUT 21< 4 0
0402 R653 K6 SNN_GPIO7 NORM
COMMON 10K J501 GPIO7 E1 COMMON
5%
PEX3V3 GPIO8 GPIO8_THERM_ALERT*
HDR_2F4 D2 GPIO9_NVFAN_PWM
0402 FEMALE GPIO9 H5
COMMON 1.274MM GPIO10 SNN_GPIO10 GND
0
DRA_SYNC/GPIO11 F4 GPIO11_SLI_SYNC0
OUT 13<
KEY6_JTAG_SMALL E3 GPIO12_EXT12V_PRSNT
NO STUFF GPIO12 IN 21>
1 TMS TRST* 2 GPIO13 U3 SNN_GPIO13
3 TDI GND 4
DRB_SYNC/GPIO14 U4 SNN_GPIO14
GND 5 VCC KEY
7 TDO TCK 8 R1001
10K
5%
0402
COMMON
3 GND 3
2-pin/4-pin Fan Control
RP501
1
8 0 PEX_TRST* IN 2> GND
0402X4 NO STUFF
0.05R_MAX RP501 7 0 PEX_TCLK
IN 2>
2
RP501 6 0 0402X4 NO STUFF
0.05R_MAX PEX_TDI
IN 2> PEX12V
3
0402X4 NO STUFF
0.05R_MAX RP501 5 0 PEX_TDO
IN 2> FAN
4 1 +12V
R654 0 0402X4 NO STUFF
0.05R_MAX PEX_TMS
IN 2> J7
0402 5% NO STUFF PEX3V3 2 GND HDR_1M2_FAN
C849 1 D514 C837 C832 MALE
BAT43 2.5MM
1UF SOD323 1UF 10UF 0
25V 40V 16V 16V NORM
10% 400MA 10% 20% NO STUFF
X7R 2 NO STUFF X7R X7R
0805 0805 1206
R679 R676 NO STUFF L7 NO FAN_PWM_D
STUFF NO STUFF

HDCP ROM (serial) FAN_PWM_C 22uH

1K 1K SMD_4_5X4_0MM NO STUFF
5% 5%
0402 0402 1G1D1S 3
COMMON NO STUFF GND D Q519
PEX3V3 IRLML2502
SOT23_1G1D1S
FAN_PWM_B 1G NO STUFF
PEX3V3 U506 S 2
HDCP_KEYROM_PROGD_V2 R670
SO8 MAX_VOLTAGE=20V
COMMON 10K 1G1D1S 3 CONTINUOUS_CURRENT=3.4A
R_DS_ON=0.08R
5% D MAX_CURRENT=20A
0402 Q520 MAX_WATTAGE=0.8W@70C
8 VCC SCL 6 COMMON BSS138 V_BE_GS=+/-12V
SOT23_1G1D1S
7 VCC R678 0 GPIO9_NVFAN_PWM_R 1G NO STUFF
SDA 5 0402 5% NO STUFF S 2

4
10 G1
4
1 GND
GND
SDA
NC
3
2 SNN_CRYPTO
R677
1K
5%
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND 4
G84-400-A1 COMMON 0402
BGA820 0402 NO STUFF
COMMON 5%
10K
10/14 MISC2 R668
ROMCS AA4 ROMCS* 17<> GND
SNN_STRAP F1
OUT GND GND
STRAP W2 ROM_SI
ROM_SI OUT 17<> 18>
SNN_MEMSTRAPSEL0 AE26 MEMSTRAPSEL0 ROM_SO AA6 ROM_SO 17<>

BIOS ROM(serial)
OUT
SNN_MEMSTRAPSEL1 AD26 MEMSTRAPSEL1 ROM_SCLK AA7 ROM_SCLK
OUT 17<> GND
SNN_LOFBVDDQSEL_ AH31 MEMSTRAPSEL2
SNN_LOFBVDDSEL_ AH32 MEMSTRAPSEL3
I2CH_SCL G3 I2CH_SCL
STRAP pins are only used for MAP/MEP packages I2CH_SDA H3 I2CH_SDA
PEX3V3
PEX3V3
SNN_GPU_U3_RFU V3 RFU
SNN_GPU_V4_RFU V4 RFU
SNN_GPU_AM8_RFU AM8 F3 RESET_BUF* 14< R18
SNN_GPU_AM9_RFU AM9 RFU BUFRST OUT 10K
SNN_GPU_B32_RFU B32 RFU T3 STEREO
5%
R664 U507
RFU STEREO OUT 15< 0402
10K AT25F512AN
SNN_GPU_U6_RFU U6 RFU
COMMON
SO8
5%
SNN_GPU_AC26_RFU AC26 RFU SWAPRDY_A M6 SWAPRDY_A
BI 13> 0402 SO8 NETNAME MIN_LINE_WIDTH VOLTAGE
SNN_GPU_D16_RFU D1 RFU COMMON COMMON
A26 TESTMEMCLK 7 8
TESTMEMCLK H2 TESTMODE 3 HOLD VCC
TESTMODE ROMCS* 1 WP BI
THERMDC 10MIL
17> BI CS C829 THERMDA 10MIL
COMMON
COMMON

.1UF BI
10K

5
10K

17> ROM_SI 16V

18>
BI
ROM_SO 2 SI 10% BI FAN_PWM_B 12MIL
17> BI
ROM_SCLK 6 SO 4 X7R BI FAN_PWM_C 12MIL
17>
0402 5%

5 BI SCK GND 12MIL 5

0402 5%

0402 BI FAN_PWM_D
COMMON
R598
R632

GND NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
GND SANTA CLARA, CA 95050, USA
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO
PAGE DETAIL GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-pin/4-pin Fan Control
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 17 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page18: Strap Configuration and Mechanicals & Thermals

Strap Configuration Mechanical & Thermals

1 1
MIOBD<11..0> STUFF 2.0K
14<> 13<>
13<>
OUT
MIOB_CTL3 REG: NV_PEXTDEV_BOOT_0
OUT
SLI_D<14..0> BOND OPTION 0 = DISCRETE BKT1
13<> OUT Bit Signal VALUE_ID VALUEs DVI3152_DVI1552_MDIN490_TEXT_1_2_TAB MEC5
17<> 17> OUT
ROM_SI ATX_1X_TOP
COMMON
BOARD STIFFENER EDGE_STIFFENER_07375
2PIN
PEX3V3 COMMON
1 2 connected mounting pins

1
2
R675 2K MIOBD<0> R674 2K
RAM_CFG_0 RAM_CFG[3:0] 0000 RFU 1000 RFU
0402 5% NO STUFF 0402 5% COMMON 0001 128-bit - QIMONDA 16Mx32 1001 64-bit - QIMONDA 16Mx32
R672 2K MIOBD<1> R673 2K 0010 128-bit - HYNIX 16Mx32 1010 64-bit - HYNIX 16Mx32
GND

MECH. MOUNTING TOP

RAM_CFG_1 0011 128-bit - SAMSUNG 16Mx32 1011 64-bit - SAMSUNG 16Mx32
0402 5% NO STUFF 0402 5% COMMON 0100
0001
RFU
128-bit - QIMONDA 8Mx32
1100
1101
RFU
64-bit - QIMONDA 8Mx32
GND
R660 2K MIOBD<8> R661 2K 0110 128-bit - HYNIX 8Mx32 1110 64-bit - HYNIX 8Mx32
RAM_CFG_2 0111 128-bit - SAMSUNG 8Mx32 1111 64-bit - SAMSUNG 8Mx32
0402 5% COMMON 0402 5% NO STUFF
R16 2K MIOBD<9> R669 2K
RAM_CFG_3
0402 5% COMMON 0402 5% NO STUFF MEC6
SPECIAL MECHANIC PEX_RET_BRKOFF
NOPIN
PCI_DEVID_0 No connected mounting pins COMMON

PCI_DEVID_1

PCI_DEVID_2
MEC8
R14 2K MIOBD<11> R671 2K
PCI_DEVID_3
COOLING SOLUTION TM48
4PIN
0402 5% COMMON 0402 5% NO STUFF
4 connected mounting pins COMMON
R17 2K MIOB_CTL3 R667 2K
PCI_DEVID_EXT (4)
0402 5% COMMON 0402 5% NO STUFF
2 2

1
2
3
4
R663 2K SLI_D<0>
PEX_PLL_EN_TERM100
SCREW HEX JACK 4-40 x 12.1MM STANDARD
0402 5% COMMON
MEC1
HEX_JACK_SCREW
GND
STD
R646 2K ROM_SI MIOA_2V5
MIOA_EN_3.3V COMMON
0402 5% COMMON

SLI_D<13> R15 2K SLOT_CLK_CONFIG MEC2

0402 5% COMMON HEX_JACK_SCREW
STD
COMMON

GND
MEC3
HEX_JACK_SCREW
STD
COMMON

MEC4
HEX_JACK_SCREW
STD MEC10
COMMON MXM_MB_MH
X1
COMMON
1

3
Thermal Protection 154-0003-007 MEC11 3
MXM_MB_MH
PEX3V3 MEC7
X1
COMMON
PH_4_40X.1875_SCREW
STD 1
COMMON

R2000 C2001 R2001 C2000 MEC12

MXM_MB_MH
2K .1UF 2K .47UF X1
5% 16V 5% 6.3V COMMON
0402 10% 0603 10%
NO STUFF X7R NO STUFF X5R 1
0402 0402
NO STUFF NO STUFF
2> IN
PEX_RST* R2006 0 PEX_RST_P_C
0402 5% NO STUFF GND
2 1B1C1E GND
Q2000 E
MMBT4403
SOT23_1B1C1E
B1 THERMAL_P* R2004 2K
NO STUFF 0402 5% NO STUFF
3 C
1B1C1E 3 GPIO8_THERM_ALERT*
IN 17>
C Q2001
THERMAL_NB R2003 10K THERMAL_N 1B MMBT2222A
SOT23_1B1C1E
0402 5% NO STUFF NO STUFF
C2002 E 2
1000PF
50V
R2002 10%
X7R
33K 0603
5%
4 NO STUFF 4
0402
NO STUFF

GND
1B1C1E 3ALERT_NVVDD_EN OUT 17>
C Q2002 22<
R2005 10K THERMAL_N_C 1B MMBT2222A
SOT23_1B1C1E
GND 0402 5% NO STUFF NO STUFF
C2003 E 2
1000PF
50V
10%
X7R
0603
NO STUFF

GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL Strap Configuration and Mechanicals & Thermals
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 18 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page19: PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5

NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT

5V 18MIL 5V 0.400A
5V 5V_REG_IN 20MIL
IN
DDC_5V 12MIL 5V 0.100A
DDC_5V 5V_FUSED 10MIL
IN
1 1
TMDS_PLLVDD 16MIL 1.8V 0.100A
TMDS_PLLVDD TMDS_PLLVDD_REG 10MIL
15< 10< 9< IN
19>
TMDS_IOVDD 16MIL 3.3V 0.200A
TMDS_IOVDD TMDS_SEQ 10MIL
IN
TMDS_IOVDD_EN 10MIL
IN
MIOA_2V5 16MIL 2.5V 0.300A
MIOA_2V5

5V
U508
DDC 5V
AZ7805DE1
VR=5V F1
PEX12V IGO,IGOI 5V 200mA DDC_5V
COMBINED_IGO 1206
COMMON COMMON

2 1 IN OUT
3 1 2 2

GND/ADJ
C842 C839 C844 C21 POLYSWITCH C19
10UF .1UF .1UF 4.7UF 220PF

TAB
16V 16V 16V 6.3V 50V
20% 10% 10% 10% 5%
X5R X7R X7R X5R C0G
2
4
1206 0603 0402 0805 0603
COMMON COMMON COMMON COMMON COMMON

GND GND GND GND

3 3

TMDS_PLLVDD TMDS_IOVDD BACKDRIVE PREVENTION

MIOA_2V5
FBVDDQ TMDS_PLLVDD
CONTINUOUS_CURRENT=6.2A
R_DS_ON=0.024 at 4.5V
MAX_WATTAGE=1.6W
MAX_VOLTAGE=20V

MAX_CURRENT=20A

LB517
TSOP6_1G4D1S

V_BE_GS=+/-8V

PEX3V3 U504
FDC637AN

5V PEX3V3 220R@100MHz PEXVDD TMDS_IOVDD AZ2940D-2.5

NO STUFF
PEXVDD SELECTED FOR
PEX3V3 FIXED 2.5V MIOA_2V5
IGO,IGOI
COMMON

BEAD_0805
Q518

EASE OF ROUTING COMBINED_IGO

COMMON
R633
6
5
2
1

C810 1 3
R659 C27 C818 C792 C807 10K 1G1D1S 3 IN OUT
1K 4.7UF .047UF .047UF 4.7UF 220UF 5% D

GND/ADJ
Q517 C811
D

5% 6.3V 16V 16V 6.3V COMMON 0402

0402 +/-20% COMMON SI2305DS C808 C799 C798 C28 C809 47UF
10% 10% 10% 10% .47UF .047UF

TAB
3TMDS_IOVDD_EN 1G SOT23_1G1D1S 6.3V
3G

COMMON X5R X7R X7R X5R 2.5V 1B1C1E 10UF 10UF 47UF
1G4D1S

COMMON 6.3V 10V

0805 0402 0402 0805 POSCAP C Q515 S 2 MAX_VOLTAGE=-8V 6.3V 6.3V 6.3V 20%
2.4A@45C 10% 10% X5R
COMMON COMMON COMMON COMMON 1B MMBT2222A CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR 20% X5R X5R 20% 20%

2
4
.035R SOT23_1B1C1E 1206
SMD_3528 TMDS_SEQ COMMON
R640 MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
X5R 0402 0402 X5R X5R
COMMON
10K 0805 0805 1206
Rtop E 2 V_BE_GS=+/-8V
COMMON
COMMON COMMON
COMMON COMMON
5%
GND GND 0402
R642 GND GND GND COMMON
442 GND GND GND GND
GND
GND GND
1%
TMDS_PLLVDD_EN MIN RECOMMENDED CAP = .47UF MIN ESR = 50mOHMS
0402
4 COMMON GND FOR STABILITY 4
U505 2
SC431L TMDS_PLLVDD_REG OUT 9< 10< 15< 19<
VR=1.240V 1
SOT23
SOT23
COMMON 3 R643
1K
1%
0402
COMMON
Rbot

GND GND

Vout = VRef * (1+Rtop/Rbot)

1.8V = 1.25V * (1+(442/1K))

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 19 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page20: PowerSupply II - FBVDDQ and PEXVDD VOLTAGE NV_NET_MAX_CURRENT

NET MIN_LINE_WIDTH
FBVDDQ 30MIL 2.1V 12A
FBVDDQ FB_BOOT 25MIL
IN
FB_UGATE 30MIL
IN
FB_UGATE1 30MIL
IN
FB_PHASE 30MIL 12A
IN
FB_LGATE 30MIL
IN
FB_LGATE1 30MIL
IN
FB_FDBACK 12MIL
IN
1 IN
FB_COMP 12MIL 1
FB_COMP1 12MIL
IN
FB_SNUB 20MIL
IN
FB_RC 12MIL
IN
5V_PVCC5 20MIL
IN
VCC5 20MIL
IN
ISL6549_FS_DIS 12MIL
IN
FBVDDQ_SEQ 12MIL
IN
FBVDDQ_EN 12MIL
IN

PEXVDD 30MIL 1.2V 2A

PEXVDD FILT_FBVDDQ_PEXVDD 30MIL
IN
DRIVE3_PEXVDD 20MIL
IN
FB_PEXVDD 20MIL
IN
FB_PEXVDD_RC 20MIL
IN

PEX12V_IN
ALTERNATES

C65 C61
C67
10UF 82UF 330UF
16V NO STUFF COMMON
10% +/-20% 20%
2 X5R 16V 16V 2
1206 OSCON ALE
FBVDDQ COMMON 2.12A@105C 6.1A@105C, 6.5A@85C
0.040R 0.010R
SMD_D80 COMBI_TH_D80_D100

GND GND GND

LB5 30R@100MHz
BEAD_0805 COMMON
CONTINUOUS_CURRENT=6A PEX12V_IN
C50 C54
100UF 100UF R45 0
COMMON 1206 N/A NO STUFF
+/-20% NO STUFF MAX_WATTAGE=1/4W FILT_FBVDDQ_PEXVDD
10V 20%
ALE 25V C521
0.14A@85C ALE 1UF C68
0.3A 16V 4.7UF
N/A D2 RSX201L-30
TH_D50P20 0.34R@105C 2 1 R514 10 10% 16V
SMD_D60 SMA 0402 5% COMMON X7R 10%
30V 0805 X7R
2A COMMON 1206
GND GND NO STUFF C513 COMMON
1UF
ALTERNATES ALTERNATES
16V GND PLACE CLOSE TO DRAIN OF UPPER FET
10% U501 5V_PVCC5 C511 4.7UF
RT9259PS
X5R
0603
COMMON
VR_SW=0.8V, VR_LD=0.8V
SO14
0603 6.3V
10%
X5R
GND FBVDDQ - [email protected]
SO14 COMMON
PEXVDD 4 5
GND
PEXVDD = 1.2V @ 2A 2
Q2
D 1G2D1S
GND
VCC5 9
CHANGED

8
LFPAK D
Q507
IRF7821 FBVDDQ
AOD420
VCC5 VCC12 10 4G SO8_1G4D3S
COMBI_MONO_1G2D1S PVCC5 R535 2.2 FB_UGATE1
CHANGED
3 COMMON G1 DRIVE3_PEXVDD 5 LDO_DR 0402 5% COMMON S 1 3
3 S 1 FB_BOOT 2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=13.6A ALTERNATES
BOOT 3
R_DS_ON=.0091R
MAX_CURRENT=100A
MAX_VOLTAGE=30V MAX_WATTAGE=2.5@25C
C64 C63 CONTINUOUS_CURRENT=10A@25C
14 FB_UGATE C534 .1UF V_BE_GS=+/- 20V C53 C52
C58 C59 C55 C60 R_DS_ON=0.028@10V
UGATE C539 C535 C532 C531
100UF 100UF 1UF .1UF .01UF
MAX_CURRENT=30A
FB_PEXVDD 6 LDO_FB 0603 25V 10UF 1UF .1UF .01UF 1200UF
100UF COMMON 6.3V 6.3V 16V 16V
MAX_WATTAGE=60W@25C
V_BE_GS=+/-20V
13 FB_PHASE 10% 1UH 6.3V 6.3V 16V 16V NO STUFF
1000UF
NO STUFF +/-20% PHASE X7R +/-20% COMMON
20% 10V
20% 10% 10% 10%
COMMON
FB_PHASE L8 20% 10% 10% 10%
4V +/-20%
25V X5R X7R X7R X7R 11 FB_LGATE SMD_420X400 COMMON X5R X7R X7R X7R
ALE R509 LGATE OSCON 4V
1210 0603 0402 0402 R536 0805 0603 0402 0402
ALE 0.14A@85C COMMON COMMON COMMON COMMON 2.7K ISL6549_FS_DIS 2 FS_DIS LFPAK D 5 3.0mOhm MAX COMMON COMMON COMMON COMMON 5.44A@105C OSCON
0.280A@105C N/A 5% 4 FB_FDBACK Q509 2.2 18A R513 0.012R 5.04A@45C
0.34R TH_D50P20 0402
SW_FB 5% 33 0.012R
SMD_D60 IRF7832 D503 0805
COMBI_7343D80D1001812

R508 COMMON 12 3 FB_COMP R507 0 FB_LGATE1 4G SO8_1G4D3S 1 IR10MQ040N COMMON

5% COMBI_TH_D80_D100

1.07K PGND COMP CHANGED 0402

FB_SNUB
0402 5% COMMON S 1 MAX_VOLTAGE=30V SMA COMMON
Rt 1% 40V
7 GND C527 2 CONTINUOUS_CURRENT=20A
R512 GND
GND GND 0402
COMMON R506 1000PF 3
R_DS_ON=0.004R
MAX_CURRENT=160A
2
2.1A
1.37K
GND 47.5K
MAX_WATTAGE=2.5@25C COMMON C533 Rt
1%
16V
V_BE_GS=+/- 20V
2200PF 1% GND
C512 1000PF FB_PEXVDD_RC 10% 50V 0402

FB_RC
ALTERNATES 0402
0402 50V X7R 10% COMMON
COMMON
10% 0402 X7R
VOUT = REFIN * (1 + Rt/Rb)
X7R NO STUFF GND 0402
1.2V = 0.8V * (1 + 1.07k/2.0k) R510
2K
COMMON GND COMMON
Rb C509
1% GND GND .022UF
0402
COMMON 16V
GND 10%
X7R
C502 .1UF FB_COMP1 R505 2.1K 0402
0402 16V 0402 1% COMMON COMMON
10%
GND X7R
COMMON
R504
4 C507 1000PF Rb
931 4
1%
0402 50V
0402
10%
CHANGED
FBVDDQ POWER SEQUENCING X7R
COMMON

PEX3V3 PEX12V
GND

VOUT = REFIN * (1 + Rt/Rb)

R501 R503 1.896V = 0.8 * (1 + 1.37K/1K)
10K 10K 1G1D1S 3
5% 5%
0402 0402
D Q503
COMMON COMMON BSS138
SOT23_1G1D1S
1G1D1S 3 FBVDDQ_EN 1G COMMON
D Q501 S 2
BSS138 MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
SOT23_1G1D1S
22> IN
NVVDD_PGOOD 1G COMMON
R_DS_ON=3.5R
MAX_CURRENT=0.88A
S 2 MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL PowerSupply II - FBVDDQ and PEXVDD
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 20 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page21: PowerSupply III - PEX12V & EXT12V Power and NVVDD VID Control
INPUT FILTER FOR PEX12V
PEX12V

L12 1uH PEX12V_IN

C70 C69 7_6x7_6 COMMON
MAX_CURRENT=8.0A
1 47UF 100UF 1
COMMON NO STUFF DC_RESISTANCE=0.012R
+/-20% 20%
16V 25V
ALE ALE
0.099A@85C 0.3A
7.06R 0.34R@105C
TH_D50P20 SMD_D60

GND GND

Input Selection for NVVDD INPUT FILTER FOR EXT12V

EXT12V

EXT12V PEX12V
L11 1uH EXT12V_IN
C71 C72 7_6x7_6 COMMON
MAX_CURRENT=8.0A
47UF 100UF
COMMON NO STUFF DC_RESISTANCE=0.012R
+/-20% 20%
16V 25V
2 1 D501 ALE ALE
BAT54C 0.099A@85C 0.3A
25V PEX12V EXT12V 7.06R 0.34R@105C
200MA TH_D50P20 SMD_D60
SOT23
COMMON GND GND
3

2 EXT12V_PEX12V_SEL 2
R46
10K
R502 R47 5%
0402
10K 10K COMMON
5% 5%
0402 0402
8 6
COMMON COMMON 1G2D1S D 7 5 D 1G2D1S
Q1 Q1
IRF7328 IRF7328
J9 EN_EXT12V_PRSNT 2G SO8_DUAL_1G2D1S SO8_DUAL_1G2D1S G4
HDR_2M3 COMMON COMMON
MALE
EXT12V S 1 MAX_VOLTAGE=-30V MAX_VOLTAGE=-30V 3 S
CONTINUOUS_CURRENT=-8A CONTINUOUS_CURRENT=-8A
4.2MM R_DS_ON=0.021R R_DS_ON=0.021R
90 MAX_CURRENT=-32A MAX_CURRENT=-32A

PCIEPWR
MAX_WATTAGE=1.3W@70C MAX_WATTAGE=1.3W@70C D511
COMMON 1G1D1S 3 V_BE_GS=+/-20V V_BE_GS=+/-20V
BAT54C
GND
12V
6
3
D Q502
BSS138
SOT23_1G1D1S
12V_NVVDD_Q
NVVDD VID CONTROL 25V
200MA
SOT23
Voltage1
PRSNT* 5 EXT12V_PRSNT* 1G COMMON COMMON
VID1_VOL1
12V 2 S 2 2 R582 0 NVVDD_VID1 22<>
OUT
GND 4 MAX_VOLTAGE=50V VOL_1 3
0402 5% NO STUFF
12V 1 CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R 1 R580 0 NVVDD_VID2 22<>
MAX_CURRENT=0.88A OUT
MAX_WATTAGE=0.36W@25C 0402 5% COMMON
C505 C501 V_BE_GS=+/-20V
D510 VID2_VOL1
4.7UF .1UF PEX3V3 BAT54C
16V 16V 25V
20% 10% GND
200MA
X7R X7R SOT23
1206 0603
COMMON
VID3_VOL1
COMMON COMMON R48 1G1D1S 2 R576 0 NVVDD_VID3 22<>
10K OUT
5%
3 3
0402 5% NO STUFF
0402
D Q513 1 R575 0 NVVDD_VID4 22<>
OUT
3 GND GND GND COMMON RHK003N06
SOT23_1G1D1S
0402 5% COMMON 3
GPIO12_EXT12V_PRSNT
OUT 17< 1G COMMON VID4_VOL1
1G1D1S 3 S 2 MAX_VOLTAGE=60V
D Q3 CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
BSS138 R581 10K MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
SOT23_1G1D1S
1G COMMON 0402 5% COMMON V_BE_GS=+/-20V

S 2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
GPIO12 GND D506
MAX_WATTAGE=0.36W@25C 0 = EXT12V PRSNT BAT54C
V_BE_GS=+/-20V
1 = EXT12V NOT PRSNT 25V
200MA
Voltage2
SOT23
COMMON
VID1_VOL2
GND EMERENCY MODE 2 R572 0
3
(NO EXT_12V 1 VOL_2 0402 5% NO STUFF
and BRICK_12V) 1 R571 0
0402 5% NO STUFF
D508 VID2_VOL2
BAT54C
25V
NVVDD Voltage Select
200MA
150W POWER MODE 0 SOT23 NVVDD range 0.8V-1.55V
COMMON
VID3_VOL2
1G1D1S 2 R577 0
3 3
0402 5% NO STUFF
D Q514 1 R573 0 Regulator: ISL6568
RHK003N06 0402 5% COMMON Control via NV_GPIOs NV_VSEL[2..0] :
SOT23_1G1D1S
1G COMMON VID4_VOL2 VID NVVDD
S 2 MAX_VOLTAGE=60V 4 3 2 1 Vout G84
CONTINUOUS_CURRENT=0.3A@25C
17> GPIO5_VSEL0 R_DS_ON=1.5R 1 1 1 1 0.80V
IN
17> IN
GPIO6_VSEL1 R583 10K MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C 1 1 1 0 0.85V
4 0402 5% COMMON V_BE_GS=+/-20V
1 1 0 1 0.90V 4
1 1 0 0 0.95V
1 0 1 1 1.00V
1 0 1 0 1.05V
GND D507 1 0 0 1 1.10V => Default
BAT54C 1 0 0 0 1.15V
2 1
D512 25V
200MA
Default 0 1 1 1 1.20V => Voltage1
BAT54A 0 1 1 0 1.25V
30V SOT23
COMMON
VID1_VOL_DEF 0 1 0 1 1.30V => Voltage2
200MA
SOT23 2 R569 0 0 1 0 0 1.35V
3
PEX3V3 COMMON
VOL_DEF 0402 5% NO STUFF 0 0 1 1 1.40V
1 R570 0 0 0 1 0 1.45V
3
0402 5% COMMON 0 0 0 1 1.50V
D509 VID2_VOL_DEF 0 0 0 0 1.55V
BAT54C
R579 D505 25V
Note: ISL6568 Controller can support
10K 200MA
5%
BAT54A SOT23 AMD HAMMER VID codes and
30V VID3_VOL_DEF
0402 COMMON Intel VRM9/10 VID codes
200MA
COMMON SOT23 1G1D1S 2 R578 0 The above uses AMD Hammer VID codes
COMMON
3 3
0402 5% COMMON
1 SNN_GATE_NC D Q512 1 R574 0
3
GATE_DEF 0402 5% NO STUFF
2 GATE_DEF_R 1G RHK003N06 VID4_VOL_DEF
SOT23_1G1D1S
S 2 COMMON
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
R560 0 R566 10K MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
0402 5% NO STUFF 0402 5% NO STUFF
bridge diode additional PD
NET MIN_LINE_WIDTH VOLTAGE NV_NET_MAX_CURRENT Default selection for NVVDD_VID[4..1]
5 GND 5
EXT12V 50MIL 12V 6.25A
EXT12V 50MIL 12V 5.5A
PEX12V_IN PEX12V_IN
EXT12V_IN EXT12V_IN 50MIL 12V 6.25A
12V_NVVDD_Q 24MIL 12V 3A
IN
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO SANTA CLARA, CA 95050, USA
PAGE DETAIL Power Supply III: PEX12V & EXT12V Power and NVVDD VID Control
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 21 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H
 A B C D E F G H

Page22: PowerSupply IV - NVVDD NVVDD NET RULES

NET VOLTAGE MAX_CURRENT MIN_WIDTH

NVVDD 1.3V 40A 20MIL

NVVDD
NVVDD_PVCC 12V 0.003A 20MIL
IN
NVVDD_VCC 5V 0.02A 20MIL
IN
NVVDD_BOOT1 20MIL
IN
1 NVVDD_UGATE1 20MIL 1
IN
EXT12V_IN NVVDD_UG1_RG 20MIL
IN
22< NVVDD_PHASE1 20A 20MIL
IN
NVVDD_LGATE1 20MIL
IN
Input Ripple = ~ 7.5A IN
NVVDD_LG1_AC 20MIL
NVVDD_BOOT2 20MIL
IN
NVVDD_UGATE2 20MIL
IN
C45 C46 C62 C66 NVVDD_UG2_RG 20MIL
IN
1 C503 C514 22< NVVDD_PHASE2 20A 20MIL
330UF 330UF 330UF 330UF 10UF 10UF IN
NVVDD_LGATE2 20MIL
COMMON NO STUFF COMMON NO STUFF 16V 16V IN
20% +/-20% 20% +/-20% NVVDD_LG2_AC 20MIL
2 20% 20% IN
16V 16V 16V 16V X5R X5R NVVDD_ISEN1 20MIL
IN
ALE OSCON ALE OSCON 1206 1206 NVVDD_ISEN2 20MIL
5.05A/105C 4.72A@105C 5.05A/105C 4.72A@105C IN
COMMON COMMON NVVDD_SNUB1 12MIL
0.014R 0.016R 0.014R 0.016R IN
COMBI_TH_D80_D100 COMBI_7343_D80_D100 COMBI_TH_D80_D100 COMBI_7343_D80_D100 NVVDD_SNUB2 12MIL
IN
NVVDD_COMP 12MIL
IN
GND GND GND GND GND GND NVVDD_FB 12MIL
IN
ALTERNATES ALTERNATES *Default = No Stuff NVVDD_COMP_RC 12MIL
IN
NVVDD_FB_RC 12MIL
IN
NVVDD_VDIFF 12MIL
IN
NVVDD_ISUM 12MIL
IN
*Note: SMD OSCONs are $0.06 extra per cap. NVVDD_ICOMP 12MIL
IN
NVVDD_OCSET 12MIL
IN
NVVDD_REF 10MIL
IN

Compensation
2 2
C506
Place Compensation Components Close to IC
4.7UF
16V
20%
Cc Rc NVVDD_PVCC R539 0 X7R
0603 5% COMMON 1206
C517 .047UF NVVDD_COMP_RC R516 5.9K COMMON
0603 50V 0603 1% COMMON
10%
X7R
GND
COMMON C3 Switching Freq = 300KHz/channel
C519 1000PF 5V C541 .1UF
0603 50V Change C3 to 100pF if 0603 25V
10% 10% 5
1200uF OSCONs are stuffed LFPAK D
X7R X7R
COMMON on output & C1/R3 NOSTUFF R515
0 COMMON Q505 NVVDD
C537 BSC119N03S
5% 4.7UF LFPAK
0603 R537 2.2 NVVDD_UG1_RG 4G COMMON
16V
C1 R3 COMMON 10%
0402 5% COMMON S 1 MAX_VOLTAGE=30V
2 CONTINUOUS_CURRENT=30A

C516 .01UF
0603 25V
NVVDD_FB_RC R517
0603 1%
33.2
COMMON
NVVDD_VCC
X7R
1206
COMMON R532 1.8K
3
[email protected]
MAX_CURRENT=120A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
CONTINUOUS_CURRENT=32A
DC_RESISTANCE=0.0015 MAX
NVVDD = 1.0V..1.3V (30..45A)
10%
Cf1 C518 0603 5% COMMON L10 1uH
X7R 1UF
Rfb GND Place near ISEN1 Pin SMD_590x530 COMMON
COMMON 16V
R520 1K U502 C504 C48
10% ISL6568CRZ 47UF 47UF
0603 1% COMMON C57 C39 C44
X5R DYNAMIC VID(0.8V..1.85V) 1 D502 R531 6.3V 6.3V
0603 QFN32 LFPAK D 5 LFPAK D 5 RSX201L-30
COMMON SMA 2.2 20% 20% 1200UF 1200UF 1200UF
QFN32 Q504 Q506 5% X5R X5R NO STUFF NO STUFF NO STUFF
COMMON BSC032N03S BSC032N03S 30V 1206 1206
2A 0805 +/-20% +/-20% +/-20%
4G LFPAK 4G LFPAK NO STUFF NO STUFF
GND 2 Phase PWM NO STUFF COMMON 2 COMMON COMMON 4V 4V 4V
4 VCC PVCC 15 S 1 S 1 MAX_VOLTAGE=30V
OSCON OSCON OSCON
2 2 CONTINUOUS_CURRENT=50A 5.44A@105C 5.44A@105C 5.44A@105C
3 MAX_VOLTAGE=30V R_DS_ON=3.2mR NVVDD_SNUB1
0.012R 0.012R 0.012R 3
NVVDD_COMP 5 COMP 3 CONTINUOUS_CURRENT=50A
R_DS_ON=3.2mR 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W COMBI_7343D80D1001812 COMBI_7343D80D1001812 COMBI_7343D80D1001812
NVVDD_FB 6 MAX_CURRENT=200A V_BE_GS=+/-20V C525
NVVDD_VDIFF 7 FB 24 NVVDD_BOOT1
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V 1500PF
VDIFF BOOT1 50V
GND GND GND
10% ALTERNATES ALTERNATES ALTERNATES
Vofs = Rofs X7R
(0.5*Rfb)/Rofs R522 10K NVVDD_OFS 3 OFS UGATE1 25 NVVDD_UGATE1 GND 0603 C40 C47
Open = No Offset 0402 5% NO STUFF COMMON C56
R530 42.2K NVVDD_FS 29 23 NVVDD_PHASE1 1000UF 1000UF
0603 1% COMMON
FS PHASE1 C515 1000UF COMMON COMMON
COMMON +/-20% +/-20%
C523 .022UF NVVDD_REF 2 26 NVVDD_ISEN1 1000PF GND GND GND +/-20% 4V 4V
0603 50V
REF ISEN1 50V
OSCON OSCON
For AMD Hammer Code 5V 10% Place near Low Side Mosfet 4V
10% 27 NVVDD_LGATE1 OSCON 5.04A@45C 5.04A@45C
5K Res to +5V on VID12.5 Pin LGATE1 X7R
X7R 5.04A@45C 0.012R 0.012R
COMMON 0402 COMBI_TH_D80_D100 COMBI_TH_D80_D100
COMMON 0.012R
GND COMBI_TH_D80_D100
R521 4.99K NVVDD_VID12_5 1 VID12_5
PEX3V3 0603 1% COMMON NVVDD_VID0 32 VID0 BOOT2 18 NVVDD_BOOT2 GND GND GND
R526 21> NVVDD_VID1 31 GND
0 BI
NVVDD_VID2 30 VID1
21> BI VID2 EXT12V_IN
5%
0402 21> BI
NVVDD_VID3 21 VID3 UGATE2 17 NVVDD_UGATE2 Stuff cap to improve Cgs/Cgd ratio! Place in same location as SMD
Enable pin: R542 COMMON 21> NVVDD_VID4 22
1K BI VID4 19 NVVDD_PHASE2
ENLL has a 0.66V PHASE2
5%
precision threshold 0402
COMMON GND 20< NVVDD_PGOOD 28 16 NVVDD_ISEN2 C522
OUT
NVVDD_ENLL 20 PGOOD ISEN2 4.7UF
Rtherm ENLL 16V
17> IN
ALERT_NVVDD_EN 0 R544 LGATE2 14 NVVDD_LGATE2 20%
18> COMMON 5% 0402 NVVDD_SENSE_ISL 9 VSEN X7R
NVVDD_GND_SENSE_ISL 8 RGND 1206
COMMON
13 IREF ISUM 12
4 NVVDD_OCSET 10 OCSET ICOMP 11 GND 4
C536 .1UF
C528 TP 0603 25V
R543 1000PF GND 10%
1K 50V X7R
10% COMMON LFPAK D 5
5%
0402 X7R Q510
COMMON 0603 BSC119N03S
NO STUFF R541 2.2 NVVDD_UG2_RG 4G LFPAK
GND COMMON
NVVDD_ICOMP 0402 5% COMMON S 1 MAX_VOLTAGE=30V
GND 2 CONTINUOUS_CURRENT=30A
[email protected]
NVVDD_ISUM 3 MAX_CURRENT=120A
MAX_WATTAGE=2.8W CONTINUOUS_CURRENT=32A
V_BE_GS=+/-20V
GND DC_RESISTANCE=0.0015 MAX
L9 1uH
SMD_590x530 COMMON
R538 1.8K C565 C558 C585 C49
NVVDD R529 0603 5% COMMON 47UF 47UF 47UF 47UF
3.57K 1 D504 R545 6.3V 6.3V 6.3V 6.3V
Place near ISEN2 Pin LFPAK D 5 LFPAK D 5 RSX201L-30 20% 20% 20% 20%
1% 2.2
Rcomp Q508 Q511 SMA X5R X5R X5R X5R
0402 5%
BSC032N03S BSC032N03S 30V 1206 1206 1206 1206
COMMON 0805
LFPAK LFPAK 2A
R528 66.5K 4G COMMON
4G NO STUFF 2 COMMON COMMON NO STUFF NO STUFF NO STUFF NO STUFF
R527 0402 1% COMMON Rs1 S 1 S 1 MAX_VOLTAGE=30V NVVDD_SNUB2 Place on Bottom Place on Bottom
0 R533 82.5K NVVDD_PHASE1 22< 2 MAX_VOLTAGE=30V 2 CONTINUOUS_CURRENT=50A
R_DS_ON=3.2mR *Default = No Stuff
5% IN
0402
0402 1% COMMON C520 3 CONTINUOUS_CURRENT=50A
R_DS_ON=3.2mR 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W
C557
COMMON C524 .01UF 1000PF MAX_CURRENT=200A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V 1500PF
50V V_BE_GS=+/-20V 50V
0603 25V
10% 10% 10%
2> IN
NVVDD_SENSE R524 0 X7R
R534 82.5K NVVDD_PHASE2
IN 22< X7R X7R
0402 5% COMMON 0402 1% COMMON 0402 0603
COMMON
2> NVVDD_GND_SENSE R523 0 Rs2 COMMON GND COMMON
IN
0402 5% COMMON Ccomp C526
.01UF
25V
5 Place Rcomp, Ccomp, Rs 10% 5
R519 near thier respective pins X7R GND
0 on the ISL6568 0603 GND GND GND
5% COMMON
0402
COMMON NVVDD
Place near Low Side Mosfet
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
DROOP SANTA CLARA, CA 95050, USA
GND ASSEMBLY G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO
PAGE DETAIL Power Supply IV - NVVDD
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10401-0010-200 B
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p401_a02 PAGE 22 OF 22
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME APATEL DATE 03-JAN-2007
A B C D E F G H