TAS3251 Evaluation Module (Rev. B)
TAS3251 Evaluation Module (Rev. B)
This user's guide describes the characteristics, operation, and use of the TAS3251 evaluation module. A
complete printed-circuit board (PCB) description, schematic diagram, and bill of materials (BOM) are also
included. For questions and support go to the E2E forums (e2e.ti.com).
The main contents of this document are:
• Hardware descriptions and implementation
• Design information
Related documents:
• TAS3251 175-W Stereo, 350-W Mono Ultra-HD Digital-Input Class-D Amplifier with Advanced DSP
Processing data sheet
Contents
1 Quick Start (BTL Mode) ..................................................................................................... 3
2 Setup By Mode ............................................................................................................... 7
3 Hardware Configuration ................................................................................................... 10
4 Software Overview ......................................................................................................... 18
5 MSP430 ..................................................................................................................... 28
6 Schematic and Bill of Materials ........................................................................................... 30
List of Figures
1 Output Configuration BTL .................................................................................................. 3
2 EVM Board (Top Side) ...................................................................................................... 4
3 EVM Board (Bottom Side) .................................................................................................. 5
4 PSIA Input: THD+N vs Frequency......................................................................................... 7
5 PSIA Input: THD+N vs Power .............................................................................................. 7
6 SPDIF Input: THD+N vs Frequency ....................................................................................... 7
7 SPDIF Input: THD+N vs Power ............................................................................................ 7
8 PBTL Output Configuration ................................................................................................. 8
9 PSIA Input: THD+N vs Frequency......................................................................................... 9
10 PSIA Input: THD+N vs Power .............................................................................................. 9
11 SPDIF Input: THD+N vs Frequency ....................................................................................... 9
12 SPDIF Input: THD+N vs Power ............................................................................................ 9
13 PPC3 Audio I/O Configuration for TAS3251EVM ...................................................................... 11
14 TAS3251EVM 2.2 Configuration ......................................................................................... 13
15 TAS3251EVM Power Tree ................................................................................................ 15
16 LC Output filter response.................................................................................................. 15
17 TAS3251EVM Reset Circuit .............................................................................................. 16
18 TAS3251EVM AIB Connector ............................................................................................ 16
19 PPC3 App page ............................................................................................................ 18
20 TAS3251 Home page ...................................................................................................... 19
21 TAS3251EVM System Checks ........................................................................................... 20
22 Direct I2C Interface ........................................................................................................ 21
23 Direct I2C Example Script ................................................................................................. 22
24 Audio I/O Page ............................................................................................................. 23
25 TAS3251 PPC3 Register Map Interface ................................................................................ 24
26 PPC3 End System Integration ............................................................................................ 25
27 PPC3 Register Dump ...................................................................................................... 26
28 PPC3 In-System Debugging .............................................................................................. 27
29 PPC3 In-System Tuning ................................................................................................... 28
30 TAS3251EVM Schematics (1 of 5) ...................................................................................... 30
31 TAS3251EVM Schematics (2 of 5) ...................................................................................... 31
32 TAS3251EVM Schematics (3 of 5) ...................................................................................... 32
33 TAS3251EVM Schematics (4 of 5) ...................................................................................... 33
34 TAS3251EVM Schematics (5 of 5) ...................................................................................... 34
List of Tables
1 Jumper and Switch Configurations (USB BTL Mode) .................................................................. 6
2 Jumper and Switch Configurations (USB PBTL Mode) ................................................................. 9
3 Fault and Clip Overteperature Status.................................................................................... 10
4 USB and SPDIF Indicators................................................................................................ 10
MCLK PWM A
BCLK
LRCLK I2S Input
Data
PWM B
TAS32xx
PWM C
PWM D
Use the following when connecting and configuring the board for 48-kHz USB BTL mode:
1. Ensure the power supply is OFF. Connect the power supply positive terminal to J24 PVDD (red) and
negative to J1 GND (black).
2. Connect the left channel speaker or power resistor load (3–8 Ω) to the TAS3251EVM J10 OUTA+
terminal (red) and the other side of the speaker or resistor load to the TPA3251EVM J10 OUTA-
terminal (black).
3. Connect the right channel speaker or power resistor load (3–8 Ω) to the TAS3251EVM J15 OUTB+
terminal (red) and the other side of the speaker or resistor load to the TPA3251EVM J15 OUTB-
terminal (black).
4. Check to make sure that the power supply is connected to J24 only, and the speakers or resistor loads
are connected to J10 or J15 only, as their colors are the same.
5. Connect USB cable from the PC to the TAS3251EVM.
6. Ensure that DAC MUTE S1 and AMP RESET S3 are in the lower positions of MUTE and RESET.
7. Check Table 1 for all jumper and switch configurations.
1.3 Power Up
Ensure that the required connections and configurations have been checked. The TAS3251EVM board
can now be powered on.
1. Enable the power supply at 15 V to 36 V and ensure that D13 and D14 illuminates. LEDs D9 and D10
should not be illuminated.
2. Bring the DAC out of MUTE by switching DAC MUTE (S1) to NORMAL.
3. Bring the Power Stage out of RESET by switching AMP RESET (S3) to the high position. You should
see the FAULT LED (D10) blink once quickly, then remain unilluminated.
2 Setup By Mode
The following sections describe the setup and configuration for each output mode. The TAS3251EVM
allows for two output modes: Stereo BTL and Mono PBTL.
10 10
1W
20 W
1 75 W
1
THD+N (%)
THD+N (%)
0.1
0.1
0.01
0.01
0.001
0.0001 0.001
20 100 1k 10k 20k 0.01 0.1 1 10 100 200
Frequency (Hz) Power (W) D002
D001
Figure 4. PSIA Input: THD+N vs Frequency Figure 5. PSIA Input: THD+N vs Power
10 10
1W
20 W
1 75 W
1
THD+N (%)
THD+N (%)
0.1
0.1
0.01
0.01
0.001
0.0001 0.001
20 100 1k 10k 20k 0.01 0.1 1 10 100 200
Frequency (Hz) D003
Power (W) D004
Figure 6. SPDIF Input: THD+N vs Frequency Figure 7. SPDIF Input: THD+N vs Power
MCLK PWM A
BCLK
LRCLK I2S Input
Data
PWM B
TAS32xx
PWM C
PWM D
Use the following when connection and configuring the board for 48 kHz USB PBTL MODE:
1. Ensure the power supply is OFF. Connect the power supply positive terminal to J24 PVDD (red) and
negative to J1 GND (black).
2. Connect the J10 OUTA+ (red) to J15 OUTB+ (red) and J10 OUTA- (black) to J15 OUTB- (black) with
banana cables or speaker wire.
3. Connect the speaker or power resistor load (2-8Ω) to the TAS3251EVM OUTA+ J10 terminal (red) and
the other side of the speaker or resistor load to the TPA3251EVM J10 OUTA- terminal (black).
4. Check to make sure that the power supply is connected to J24 only, and the speakers or resistor loads
are connected to J10 or J15 only, as their colors are the same.
5. Connect USB cable from the PC to TAS3251EVM.
6. Ensure that DAC MUTE S1 and AMP RESET S3 are in the lower positions of MUTE and RESET.
7. Check Table 2 for all jumper and switch configurations.
10 10
5 1W
20 W
1 75 W
0.5 1
THD+N (%)
THD+N (%)
0.1
0.05
0.1
0.01
0.005
0.01
0.001
0.0005
0.0001 0.001
20 100 1k 10k 20k 0.01 0.1 1 10 100 200
Frequency (Hz) D005
Power (W) D006
Figure 9. PSIA Input: THD+N vs Frequency Figure 10. PSIA Input: THD+N vs Power
10 10
1W
20 W
1 75 W
1
THD+N (%)
THD+N (%)
0.1
0.1
0.01
0.01
0.001
0.0001 0.001
20 100 1k 10k 20k 0.01 0.1 1 10 100 200
Frequency (Hz) D007
Power (W) D008
Figure 11. SPDIF Input: THD+N vs Frequency Figure 12. SPDIF Input: THD+N vs Power
3 Hardware Configuration
3.1 Indicators
This section will describe the LED indicators on the TAS3251EVM.
In addition to the states above, while the amplifier is operating, the CLIP_OTW pin can indicate clipping or
pre-clipping. To discern the difference between an OTW indication from a clip or pre-clip indication, look at
the signal with an oscilloscope. If the signal is toggling during operation, this is clipping or pre-clipping. If
the signal is a constant low then this will be overtemperature warning.
3.1.3 Power
If a direct audio input is desired without sample rate conversion, the sample rate conversion block of the
SRC4392 can be bypassed with the optical or coax inputs. Select BypassSRC in the PPC3 I/O page, and
set MCLK-SEL (J1) to the correct setting.
The XMOS device can be shut down or reset by the use of the XMOS Disable (J33) jumper shown in
Table 10.
In order for the slave board to function correctly, jumpers must also be correctly configured on both the
master and the slave. This would include setting the Slave Enable jumper (J35) and the I2C address
jumper (J19) correctly. The Master device should be set to the I2C 0x94 address, with SLAVE ENABLE
J14 removed, the slave device should have I2C address 0x96 with SLAVE ENABLE J14 installed.
Selecting Slave Mode configures the OSC_I/O pins as inputs to be slaved from an external differential
clock. In a master or slave system, inter-channel delay is automatically set up between the switching
phases of the audio channels, which can be illustrated by no idle channels switching at the same time.
This will not influence the audio output, but only the switch timing to minimize noise coupling between
audio channels through the power supply. This will optimize audio performance and result in better
operating conditions for the power supply. The inter-channel delay will be set up for a slave device
depending on the polarity of the OSC_I/O connection such that slave mode 1 is selected by connecting
the OSC_I/O of the master device with the OSC_I/O of the slave device with the same polarity (+ to +
and – to –), while slave mode 2 is selected by connecting the OSC_I/Os with the inverse polarity (+ to –
and – to +).
When in PBTL mode, the B channel input pins must be pulled to ground. This is done with J31 and J32.
15V 12V
PVDD J26 LM5010 J27 LM2940 J20 GVDD
3.3V
5V TPS7A8801
TPA62163 J29 1.8V
J8
USB 5V
TPS62085 1.0V
The TAS3251EVM power tree consists of 5 power ICs and series of jumpers allowing the user to provide
their own supply or for current measurement. The 5V supply can be sourced from the USB 5V or from
PVDD.
Figure 16 is taken directly from the LC Filter Calculator tool available on TI.com. The tool is configured for
BTL common mode with values of 7 µH and 0.68 µF for the filter. This tool is also helpful when designing
a different board featuring one of TI’s class-D amplifiers.
The Coilcraft inductor used (MA5173) has a saturation current of 54 A (10%). The saturation current of the
MA5173 is well above the requirements of the TAS3251 which has an OC limit of 14A. The inductance
versus current curve for a selected inductor is very important. It is essential for the inductor to maintain at
least 5 µH of inductance at the maximum short-circuit current of the power amplifier. This was selected for
the EVM since the saturation current met the requirements of the OC limit of the TAS3251 but also
provides great performance in THD vs Power and THD vs Frequency.
To find more information on a variety of inductors see the LC Filter Design application note.
4 Software Overview
The Log tab in the Direct I 2C displays the I 2C command history, if the record option is enabled. The log
tab has a search option to search for a particular command. The search key is found at the top left of the
window with the search icon. ‘Save to a file’ is used to save the log as a .cfg file. ‘Delete Output’ clears the
log history. ‘Copy to a Clipboard’ copies the log text to the clipboard. Clicking the ‘Start Recording’ button
starts recording the I 2C transactions and displays them in the log window. ‘Stop Recording’ stops
recording I 2C transactions.
5 MSP430
This section describes the use of the MSP430 on the TAS3251EVM.
5.1 Startup
The MSP430 comes preprogramed and will stay in a low power state until it is woken with input. To bring
the MSP430 out of the low power state press “PROG_SEL” twice. This will trigger the MSP430 to run
Program 0 which will bring the DSP out of standby and Mute the DAC. The Audio Input can then be
selected
5.2 Programs
The MSP430G2955 has 56 kB of internal flash allowing multiple process flows and sets of coefficients to
be stored in memory. These programs can be cycled through by using the “PROG_SEL” button, once on
the desired program, pressing load will mute the TAS3251 and load the program. Programs can be loaded
by flashing the MSP430 code with the use of a JTAG debugger and the output from PPC3.
5.3 Inputs
The “INPUT” button will cycle through the three digital audio inputs: USB, OPTICAL, and COAX. When the
INPUT button is pressed the SRC4392 will be configured by the MSP430 for that input.
0x07ECA9CD, //24dB --
0x064B6CAE, //22dB --
0x05000000, //20dB --
0x03F8BD7A, //18dB --
0x0327A01A, //16dB --
0x02818508, //14dB --
0x01FD93C2, //12dB --
0x0194C584, //10dB --
0x0141857F, //8dB --
0x00FF64C1, //6dB --
0x00CADDC8, //4dB --
0x00A12478, //2dB --
0x00800000, //0dB -- default volume
0x0065AC8C, //-2dB --
0x0050C336, //-4dB --
0x004026E7, //-6dB --
0x0032F52D, //-8dB --
0x00241347, //-11dB --
0x00198A13, //-14dB --
0x0012149A, //-17dB --
0x000CCCCD, //-20dB --
0x00081385, //-24dB --
0x00051884, //-28dB --
0x00033718, //-32dB --
0x00019C86, //-38dB --
0x0000CEC1, //-44dB --
0x00004161, //-54dB --
0x000014AD, //-64dB --
0x00000347, //-80dB --
0x000000A7, //-94dB --
0x0000001B, //-110dB --
};
6.1 Schematic
Figure 30 to Figure 34 display the EVM schematics.
1.0V
3.3V
5V U1 L1 1.0V
C127 C128 C129 C130 C131 C132 C133 C134 C135 C136 C137 C138 C139 C140
0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 7
VIN SW
6
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V R80 470nH
10.0k R63 4
VOS
J33 C124 0 R1 C125 C126
22µF 1 2 R2 40.2k 22µF 0.1µF
EN PG
3.3V 1.00M
GND FB 3
GND GND
5 GND GND
3.3V R167 GND R3
0 162k
TPS62085RLTR
XMOS-ENABLE R164 R159 GND
C17 C27 C37 C40 C45 C54 C58 C74 C80 C99 C100 C101 C102
0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF
0 0 5V to 1V BUCK
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V GND
GND
3.3V
XMOS AND I/Os 3.3V 3.3V 3.3V 3.3V
XEF216-512-TQ128-C20 XEF216-512-TQ128-C20
XEF216-512-TQ128-C20
GND
A2 B2 XOUT
2 5 R153 8
X-TCK GND VCC Y3
JTAG 33.2 2
X-TMS S0
3
2A 2Y
4 3.3V 4
OE GND
5 13
SDA/S1 GND
5
X-TDI X-SDA
GND Y1 12 SCL/S2 GND 10
X-TDO X-SCL
SN74LVC2G07DSFR 4 3 J18
6
X-TRSTN VDD OUT
3.3V SN74AVC2T244DQMR CDCE913PWR USB 5V-USB
GND R154 1 2 GND GND
10.0k
OE/STANDBY GND
GND GND VBUS
1 USB I/O
1.0V 24MHz
3.3V R155 2 USB_D_M
D-
U30 10.0k 3.3V 3.3V GND
6
VCC D+
3 USB_D_P 5V-USB
R156 4 5V-USB
SENSE_OUT
25.5k 1 C148 C149 4 USB_ID
ENABLE ID
0.1µF 0.1µF 3.3V 3.3V 3.3V 1.8V 1.8V
3 16V 16V 5 R157
SENSE GND
C142 47.0k
5 2 C143 C144 C145 C146 C147 2.2µF
CT GND
R158 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF
7
51.0k TPS3897ADRYR GND GND 16V 16V 16V 16V 16V
C150 L2
GND-USB
470pF GND GND GND
CLOCK GENERATION
GND GND GND GND GND GND
GND
GND
JTAG
PVDD VDD-RST U5
GVDD
4 3
VDD RESET RESET-AMP
R32 S3
100k R56 6 1
GND
8.06k VDD-RST 5 5 2
MR GND
4
C46
1µF 3 1 TPS3802K33DCKR
100V GND
C64 C96 AMP RESET 3.3V TO DUT
0.1uF 0.1uF
C97 GND GND
1µF R60
100V 3.30k R92
GND GND S1 10.0k
6
5
DAC_MUTE
4
GND GND C151
3 1 0.1µF
DAC MUTE
GND GND
GND
AIB
RST-AIB
MUTE-AIB
GPIO_AIB-2
GPIO_AIB-1
MODE
SPI BI-WIRE JTAG J36 JTAG-RA 3.3V
J11
DUT CLIP_OTW
FAULT
3.3V
6
5
4
3
2
1
3.3V JTAG POWER
S9 INPUT R41
SW-INPUT 47.0k J12
GND 6
C57 R38 5
VCC TOOL
470pF 25.5k SBWTCK R43 49.9 TCK 4
TCK
SBWTDIO SBWTDIO 3
TDIO
S4 MUTE 2
GND
SW-MUTE 3.3V C52 1
2200pF
C48 R39 FREQUENCY JTAG
470pF GND
25.5k
SELECT R129 GND
S5 VOL UP 10.0k
SW-VOLUP J2
41 R47 R49
PAD
R62 0
DUT ADR
MSP430G2955IRHA40R
560
D5
560
D7
3.3V 3.3V Blue Blue
GND P2-LED R51 P0-LED R53
MCLK SELECT MCLK-SEL R114
2.00k Q3 2.00k Q5
10.0k P2 P0
C56 C109 C55
0.1µF 0.1µF 1µF 3.3V 3.3V
J35
SLAVE
GND GND
ENABLE
SLAVE ENABLE GND GND GND R46 R48
560 560
GND OUT = NORMAL MODE D4 D6
IN = SLAVE MODE Red Blue
3.3V MUTE-LED R50 P1-LED R52
2.00k Q2 2.00k Q4
R5 MUTE P1
I2S MUX CONTROL 10.0k
J37 3.3V 3.3V
R111
MUX_CTRL
0
I2S SELECT
GND GND
I2S SELECT
OUT = AIB I 2S
GND IN = SRC I2S
3.3V 3.3V
3.3V 3.3V
Y2 U31
FREQ SELECT FREQ-SEL
4 3 R130 MCLK-XTAL 1 8 3.3V
6
VDD OUT A VCC
0 U9
FREQ-SEL 1 2 2 5 MCLK-SRC 1 8 U18A U19A
OE/STANDBY GND B Y A VCC LVC1G125DSF LVC1G125DSF
J3 1 1
24.576MHz 6 A/B Y 3 MCLK-EXT 2 B Y 5 MCLK-MUX 1
U4 GND 2 MCLK-PSIA 2 4 MCLK-IBC 2 4 R17
MCLK
SPDIF-IN 3.3V 3.3V 4 GND G 7 MUX_CTRL 6 A/B Y 3 3 49.9
C18 3.3V
1 Y3 SN74LVC2G157DCTR 4 7 U18B R115 U19B
VCC R131 GND G
3
4 3 GND 100k GND
5
VDD OUT
2 0.1µF U27 0 GND 3.3V GND SN74LVC2G157DCTR 5 5
GND NC NC
GND 2 4 FREQ-SEL 1 2
OPTICAL VOUT
3 R16 RX1+
OE/STANDBY GND
R66 10.0k GND GND
LVC1G14 22.5792MHz R132 GND LVC1G125DSF GND LVC1G125DSF
SPDIF 33.0
3
GND 0 J1 GND
NC
NC
6
GND U11
SCLK-SRC 1 8 U20A U21A
A VCC LVC1G125DSF LVC1G125DSF
J4 1 1
GND BCLK-EXT 2 B Y 5 BCLK-MUX 1
2 BCLK-PSIA 2 4 BCLK-IBC 2 4 R18
SCLK
MUX_CTRL 6 A/B Y 3 3 49.9
SRC POWER NODES ON POWER SUPPLY PA GE MCLK-SEL
C20 4 7 U20B R116 U21B
J5 (U7B) GND G
3
3 RX2+ GND 100k GND
4 U7A SN74LVC2G157DCTR 5 NC 5 NC
1
L4 0.1µF 1 12 RXCKO 3.3V
RX1+ RXCKO
SPDIF-IN 2 RX1-
GND GND
11 D2 Blue R19 GND LVC1G125DSF GND LVC1G125DSF
LOCK
C21 3
RX2+ 560 PSIA CLOCK SELECT GND
GND RX2- 4 32 SPDIF-LOCK 3.3V 3.3V
COAX SPDIF IN RX2- TX+
TX-
31 I2S
0.1µF 5
RX3+
6 34 3.3V 3.3V 3.3V
6
RX3- AESOUT
U13
7 35 LRCLK-SRC 1 8 U22A U23A
RX4+ BLS A VCC LVC1G125DSF LVC1G125DSF
8 RX4- SYNC 36 J6 1 1
R20 R22 LRCLK-EXT 2 5 LRCLK-MUX 1
B Y R21
SDOUT-USB 39 41 1.00k 4.99k 2 LRCLK-PSIA 2 4 LRCLK-IBC 2 4
I2S SDOUT-USB
40
SDINA
SDOUTA
NC
MUX_CTRL 6 A/B Y 3 3 49.9
LRCK
LRCLK-USB 38 LRCKA CPM 18
LRCLK-USB
USB-SPDIF BCLK-USB
BCLK-USB 37 BCKA CCLK/SCL 20 SCL-SRC 4 GND G 7 U22B R117 U23B
3
21 A1-SRC GND 100k GND
CDIN/A1
46 SDINB CDOUT/SDA 22 SDA-SRC SN74LVC2G157DCTR 5 NC 5 NC
SDOUT-SRC 45 SDOUTB CS/A0 19 A0-SRC
LRCLK-SRC 47
LRCKB
GND GND
3.3V SCLK-SRC 48 BCKB INT 23 GND LVC1G125DSF GND LVC1G125DSF
RST
24 SPDIF-RESET GND
R23 D3 Green 15 3.3V 3.3V
RDY
1.00k 14 MUTE GPO1 26
SPDIF-READY 27
GPO2
MCLKI 25 28 3.3V
6
MCLK GPO3
13
RXCKI GPO4
29 U14
3.3V SDOUT-SRC 1 8 U24A U25A
A VCC LVC1G125DSF LVC1G125DSF
SRC4392IPFBR J7 1 1
R25 DIN-EXT 2 5 SDIN-MUX 1
SDA B Y R24
GND 2 SDIN-PSIA 2 4 SDIN-BUF 2 4
I2C SCL
I2C_ADD=0xE0 10.0k
MUX_CTRL 6 A/B Y 3 3 49.9
SDIN
SDA R169 0 SDA-SRC
SCL R170 0 SCL-SRC 4 7 U24B R118 U25B
GND G
3
GND 100k GND
SN74LVC2G157DCTR 5
NC
5
NC
GND GND
MCLK-SEL GND LVC1G125DSF GND LVC1G125DSF
MCLK-SEL
MUX_CTRL 3.3V GND
MSP430 MUX_CTRL
I2S-BUF-EN
I2S-BUF-EN
A0-SRC 3.3V
A0-SRC
R11
3.3V 0
5
U28
R119 10.0k I2S-BUF-EN 2 4 I2S-BUF-EN SDIN-BUF
FROM DUT
R120 10.0k LVC1G14 SDIN-IBC
SDOUT
3
R12
S2 R121 10.0k 0
INTERBOARD
1
2
3
SPDIF-RESET SPDIF-RESET R122 10.0k
SPDIF-RESET GND CONNECTOR
C24 SPDIF GND J30 J9
GND J9 DATA SEL SCL 1 2 SDA
RESET R168 0 I2S-BUF-EN MCLK-IBC 3 4
0.1µF SDIN-IBC 5 6
16V BCLK-IBC 7 8
GND SCL SCL SCL 9 10
SDA SDA SDA LRCLK-IBC 11 12
13 14
I2X
PVDD 3.3V 12V GND
EXTERNAL I2S (AIB)
R26 R27
0 0 OUT_A+ R28
J28
TO MSP430 OUT_A- 2 1 0
3.3V 4 3 PVDD-EXT
RST-AIB
6 5
MUTE-AIB
GPIO_AIB-1
8 7 DECOUPLING
RST-AIB 10 9
GPIO_AIB-2
MUTE-AIB 12 11 MCLK-EXT 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V
CLIP_OTW 14 13 BCLK-EXT
FAULT 16 15 LRCLK-EXT
SDA-AIB 18 17 DIN-EXT
SCL-AIB 20 19 C59 C69 C70 C108 C110 C111 C112 C113 C114 C115 C116 C117 C118 C119 C120 C121 C122 C123 C156
SDOUT 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF
22 21
GPIO_AIB-1 24 23
GPIO_AIB-2 26 25 R123
OUT_B- 28 27 OUT_B+ 10.0k
CLIP_OTW
FAULT AIB GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
ALIGNMENT
FROM OUT_A+
OUT_A-
GND J34 HEADER
GND GND
DUT OUT_B-
OUT_B+
GND
C5
R67 R13 R14 0 INB-
12V GVDD
SPK_INB- DAC OUTPUT
499 0
C6 10µF
R59 R15
GVDD PVDD 220pF
100k 18.0k
TP7 C106
R31 PVDD_B
GVDD_A
1000pF R29 C7 22pF OUTB-
0
C28 C29 C30 2.00k
C36 1µF 1µF 2200µF
J20 0.1uF 100V 100V GND GND
GVDD C8
R69 R30 R33 0 INB+
499 0
SPK_INB+ DAC OUTPUT
GND GND GND GND C9 10µF
R64 R35
220pF
100k 18.0k
GVDD PVDD
SHUNT FOR PBTL µF R36
TP8
PVDD_A R37
GVDD_B C10 22pF OUTB+
SPK_INB+ 0 2.00k
J31 C41 C42 C43
R99 C44 1µF 1µF GND GND
2200µF
INB+ 0 0.1uF 100V 100V C11
R95 R61 R68 0 INA-
GND 499 0
SPK_INA- DAC OUTPUT ZOBEL NETWORK
C12 10µF
GND GND GND GND R65 220pF
R70 POST FILTER FEEDBACK
SPK_INB- 100k 18.0k
J32 C62 L5
R100 GVDD_A
INB- TP9 1000pF R71 C13 22pF OUTA- OUTA+
0
GVDD_B 2.00k 7uH 6.5A
GND TP10 MA5173 C47 C152 C98
3.3V GND GND 0.68µF 1000pF 1µF
C14 250V 100V
R98 R72 R73 0 INA+
SPK_INA+ DAC OUTPUT J10
499 0
U8 C15 10µF R87
C61 C60 R88 R96
220pF GND GND
0.1µF 10µF 100k 18.0k 3.30
40 PVDD_A DAC_OUTB+ 1 DAC_OUTB+
35
PVDD_B DAC_OUTB-
2 DAC_OUTB- OUTA
R97 C16 22pF OUTA+
12
GVDD_A DAC_OUTA-
3 DAC_OUTA+ 2.00k
3.3V GND GND 30
GVDD_B DAC_OUTA+
4 DAC_OUTA- GND
AVDD GND GND L6
DAC-AVDD C63 1µF AVDD TP11 23 AVDD SPK_OUTA+ 41 SPK_OUTA+ SPK_OUTA+
TP12 56
DAC_AVDD SPK_OUTA-
39 SPK_OUTA- SPK_OUTA- OUTA-
DVDD TP17 7uH 6.5A
C71 C72 OUTA+
3.3V C65 1µF DVDD TP13 21 DVDD BST_A+ 44 C66 TP18 MA5173 C67 C153 C103
10µF 0.1µF OUTA-
9 DAC_DVDD BST_A- 43 0.033µF C68 TP19 0.68µF 1000pF 1µF
OUTB+
52 DAC_DVDD
0.033µF TP20 250V 100V J13
OUTB-
SPK_OUTB+ 36 SPK_OUTB+ SPK_OUTB+
R165 GND C73 11 34 SPK_OUTB- SPK_OUTB-
DVDD_REG SPK_OUTB-
0 GND GND 0.1µF R89 GNDA
C75 6
CN BST_B+
32 C76 GND GND Black
R166 GND 2.2µF 31 0.033µF C77 3.30
BST_B- TP15
0 8
CP
0.033µF GND
CLIP_OTW
15 SPK_INA+ CLIP_OTW 29 CLIP_OTW
SPK_INA+ CLIP_OTW
GND TP2
TP3
MCLK FROM SPK_INA-
16
25
SPK_INA-
28 FAULT
GND
BCLK SPK_INB+ SPK_INB+ FAULT FAULT L7
TP4
TP1
LRCK DAC OUTPUT SPK_INB-
26
SPK_INB-
18 FREQ_ADJ TP16 OUTB+
SDIN FREQ_ADJ
MCLK 50
MCLK
SCLK
SCLK 49
MCLK
SCLK C_START
24 C_START
FAULT TO 7uH 6.5A
MA5173 C79 C154 C104
I2S LRCK
LRCK
SDIN
47
48
LRCK
51 SDOUT MSP430/AIB 0.68µF
250V
1000pF 1µF
100V
SDIN SDIN SDOUT
TP21 TP22
SCL SDA
SCL 53 5 J15
SCL SCL CPVSS
I2C SDA
SDA 54 SDA
10 GND GND
R93
DGND
OSC-IOM 19 55 C107 C78 3.30
OSC_IOM AGND
OSC-IOP 20 1 0.047µF OUTB
OSC_IOP
J23 42
4 OSC-IOM MODE 14 MODE
GND
GND 38
SDOUT TO IBC
OSCILLATOR 3 RESET-AMP 27
RESET_AMP GND
37 GND
SYNC 2 DAC_MUTE 45
DAC_MUTE GND
33 GND GND L8
INTERFACE 1 OSC-IOP ADR 46 ADR GND 22
GND
13 OUTB-
GND OC-ADJ OC_ADJ 17
OC_ADJ GND
7 7uH 6.5A
TP14 MA5173 C81 C155 C105
GND TP23 3.3V 0.68µF 1000pF 1µF
R74 TAS3251DKQR 250V 100V J21
3.3V 22.0k GND CLIP_OTW D9 CLIP_OTW R78
Orange 560
GND R90 10.0k R94 GNDB
3.3V GND GND Black
R91 10.0k R101 3.3V 3.30
MODE
GND 0 GND
FAULT D10 FAULT R79
RESET-AMP R102 Red
MSP430 DAC_MUTE
0
560
GND
ADR
GND
MONITORS
R125
OUT_A+
0
J14 MODE R126
OUT_A-
MODE
0 TO
R127
OUT_B+ AIB
0
MODE GND
R128
OUT_B-
0
PVDD
U10
PVDD D11 VIN-PS 10 9 C22 GND L9 15V
J24 PVDD MAX = 36V 3A
VIN VCC
0.1uF J25
C23 C25 BST
2 C26 15V-VR
2.2µF 0.1µF 0.047µF 100µH 1.5A
100V 100V R34 8 1 SW-PS
RON/SD SW Hi Current Shunt
PVDD C31 C32 C33 182k C34 R58
47µF 1µF 0.01µF J26 7 3 D12 5600pF 4.99k
SS ISEN
63V 100V 100V PVDD-IN 1A
GND GND 5
RTN FB
6
C35
4700pF 4 11
SGND DAP
R84
LM5010ASD/NOPB 1.00k
GND
GND GND GND
GND
15V 12V 12V
U15
1 3 D13 R85
IN OUT
Green 1.50k
C38 4 TAB GND 2 C39 12V
4.7µF C83 47µF C84
25V 0.47µF LM2940IMP-12/NOPB 0.1uF 3.3V GND
GND
15V L3 5V-VR
U16 5V-VR 5V-USB J8
2 VIN SW 7 SW 5V SEL 5V
2.2uH 1 D17
C85 3 EN VOS 6 C86 2
10µF C1 100µF 3
8 5 22µF 1A
PG FB
EP 9 J29
R4 4 3.3V
AGND
GND 100k 1 GND GND
PGND
TPS62163DSGR
GND
3.3V
U7B
42 10
VIO AGND
1.8V 17
VDD18 BGND
44
5V C87 C88
U17 3.3V 10µF 0.1µF 33 16
TP5 VDD33 DGND1
30
DGND2
5V-IN 1
IN1 OUT1
14 3.3V 9
VCC DGND3
43
2 15 C89
TP6 IN1 OUT1
GND GND 0.1µF SRC4392IPFBR
C91 20
GND EN1
10µF R6 C92 GND
18 17 33.2k 22µF C90
SS_CTRL1 PG1
GND GND 0.1µF
C95 1µF 19 16 R7
NR/SS1 FB1
10.7k
SRC POWER
5V 1.8V
3.3V GND
4
IN2 OUT2
11 GND
5 12
IN2 OUT2
C2 6
EN2
10µF R8 C3 C93 C94
8 9 13.7k 22µF 10µF 0.1µF
SS_CTRL2 PG2
C4 1µF 7 10 R9
NR/SS2 FB2
11.0k
GND 3 GND GND
GND 13
GND GND
PAD 21
TPS7A8801RTJR
GND
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Changed column 3 title From: Configuration for BTL To: Configuration for PBTL in Table 2 ................................... 9
• Changed J19 Configuration From: Install To: Remove in Table 2 .................................................................. 9
Revision History
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