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Assignment 7 Wednesday

This document outlines Lab Assignment 7 for the B.Tech Digital Design course, focusing on the implementation of Boolean expressions using logic gates. Students are required to design a 3-to-8 decoder, differentiate between a decoder and demultiplexer, and implement various encoders and decoders using Verilog. Submission guidelines emphasize the importance of proper documentation, including naming conventions and penalties for late submissions or plagiarism.

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4 views

Assignment 7 Wednesday

This document outlines Lab Assignment 7 for the B.Tech Digital Design course, focusing on the implementation of Boolean expressions using logic gates. Students are required to design a 3-to-8 decoder, differentiate between a decoder and demultiplexer, and implement various encoders and decoders using Verilog. Submission guidelines emphasize the importance of proper documentation, including naming conventions and penalties for late submissions or plagiarism.

Uploaded by

hirob28450
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Practical

Course- B.Tech Type- Core


Course Code-CSET105 Course Name- Digital Design
Session-2024-2025 Semester-Even
Date- March 2025 Batch- ALL

Lab Assignment 7_Monday

Practical title: Implementation of Boolean expressions using logic gates

Name CO1 CO2 CO3


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In this Lab, students will be able to design encoder/decoder and then implement the Boolean expression
using decoder and logic gates. Also, we will learn to implement an expression in Verilog- HDL.

1. Provide a truth table and draw the logic diagram of 3-to-8 decoder.

2. What is the difference between Decoder and Demultiplexer?

3. Implement a 4-to-2-line encoder using Verilog.

4. What is priority encoder? Write Verilog code for an 8-to-3 priority encoder.

5. Write a Verilog code to implement BCD-to-Decimal Decoder.

Submission Instructions:

• Prepare the submission file according to the following process:

1. Copy the Verilog code, the Test Bench Code in a Word File.
2. Take the Screenshot of Waveform and paste into the same word file.
3. Repeat Step 1 and 2 for all the programs.
4. Copy and paste all the Verilog code, Testbench Code and Waveform into a single word file
as 1_verilog, 1_TestBench, 1_Waveform, 2_verilog, 2_TestBench, 2_Waveform… etc.
5. Convert it into pdf file, name it as RollNo_Assignment# (Example: E20CSE001_
Assignment2.pdf).
6. Submit your file on LMS within the deadline.

• Write your Name and Roll No. as comment before starting of each program. Keep in mind this
is Mandatory. Failing which you may lose your marks.
Practical
• Make it sure that in each program, you have mentioned enough comments regarding the
explanation of program instructions.
• Each student will submit their assignment on their corresponding group slot only.
• Late submission will lead to penalty.
• Any form of plagiarism/copying from peer or internet sources will lead penalty.
• Following of all instructions at submission time is mandatory. Missing of any instructions at
submission time will lead penalty.

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