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Computer architecture

The Von Neumann Architecture holds programs and data in memory, with data moving between the memory unit and the processor via address, data, and control buses. The processor consists of an arithmetic and logic unit (ALU) for operations and a control unit for managing memory and I/O devices. The fetch-execute cycle involves fetching instructions from memory, decoding, and executing them sequentially.

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Computer architecture

The Von Neumann Architecture holds programs and data in memory, with data moving between the memory unit and the processor via address, data, and control buses. The processor consists of an arithmetic and logic unit (ALU) for operations and a control unit for managing memory and I/O devices. The fetch-execute cycle involves fetching instructions from memory, decoding, and executing them sequentially.

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yinminaye.quinn
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer architecture

Von Neumann Architecture

The idea to hold programs and data in memory.


Data would then move between the memory unit and
the processor.
The processor and memory unit are linked using
buses.

1. Address bus.
Carries signals related to addresses.
Uni-directional.
2. Data bus.
Carries data.
Bi-directional.
3. Control bus.
Carries signals relating to control &
coordination of all computer activities.
Both uni and bi-directional, depending on
internal connections within the computer.
Addresses indicate where the data is stored and
registers are needed so that data can be manipulated
within the computer.
An address is the location of where data can be
found in a computer memory.

Processor
The processor contains the arithmetic and logic unit
(ALU). The ALU allows arithmetic and logic
operations to be carried out.

Control Unit

The control unit controls the operation of the


memory, processor and input/output devices.

The fetch-execute cycle

1. The PC contains the address of the memory location


of the next instruction to be fetched.
2. This address is copied from the PC to the MAR
through the address bus.
3. The instruction at the memory location contained in
MAR is copied into the MDR temporarily.
4. The instruction in the MDR is placed in the CIR.
5. The value in the PC is incremented by one, pointing
the next instruction to be fetched.
6. The instruction is finally decoded and then executed.

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