RISC-V Virtual Hackathon

Softmax Challenge for NNs

- Background Knowledge
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Agenda
• RISC-V Vector Instruction/Extension(RVV)
• Intrinsic Function
• Andes Custom Extensions (ACE)
• Debug

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Vector Registers Chaining
◼ 32 Vector Registers (VR)
V0 V0 V1 V0 V1 V2 V3
◆ Each with VLEN bits, depending on HW config.
V1
◼ Data formats:
V2 V2 V3
◆ SEW (standard element width): 8,16,32,64-bit
V3
◆ int8, int16, int32, int64, fp16, fp32, fp64, bf16
V4 V4 V5 V4 V5 V6 V7
◼ EX: VLEN=512, LMUL=1, each VR has
V5
◆ 16 elements when SEW=32 (int32/fp32)
V6 V6 V7
◆ 32 elements when SEW=16 (int16/fp16/bf16)
V7
◆ 64 elements when SEW=8 (int8)
...
◼ LMUL (Length Multiplier): VR combining
V24 V24 V25 V24 V25 V26 V27
◆ Can be set to 1, 2, 4, 8 or 1/2, 1/4, 1/8 at runtime by SW
V25
◆ Example 1
V26 V26 V27
– VLEN=512 and LMUL=8
– v0 represents v0~v7, or effectively a 4096-bit (512-bitx8) V27
register with 128 fp32 data V28 V28 V29 V28 V29 V30 V31
◆ Example 2 V29
– For VLEN=128 and LMUL=1/4 V30 V30 V31
• 4 elements when SEW=8 V31
• 2 elements when SEW=16 LMUL= 1 2 4
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AX45MPV : Chaining with LMUL=2
LMUL Cycles → 1 2 3 4 5 6 7 8 9 10
vfcvt.f.x.v v8, v16 X1 X2 Setting in CSR vtype:
2 • LMUL=1 → 512 bits
v9, v17 X1 X2 No Chaining, Y1
start at cycle 4 • LMUL=2 → 1024 bits
V0~V1 group 0
vfadd.vv v24, v8, v0 Y1 Y2 Y3 V2~V3 group 1
2 V4~V5 group 2
v25, v9, v1 Y1 Y2 Y3
...
LMUL Cycles → 1 2 3 4 5 6 7 8 9 10 V30~V31 group 15
1 vfcvt.f.x.v v8, v16 X1 X2
2
v9, v17 X1 X2
With Chaining, Y1
start at cycle 3
1 vfadd.vv v24, v8, v0 Y1 Y2 Y3
2
v25, v9, v1 Y1 Y2 Y3
Xn, Yn: execution stages LMUL Chaining
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RISC-V Vector(RVV) Instruction/Extension
• For vector instructions, each instruction will work on each element
on the vector register. That means it’s a SIMD operation.
• For more details, please refer to the RISC-V Vector Extension spec,
i.e. riscv-v-spec-1.0-rc2.pdf.

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Intrinsic Function
• The intrinsic functions are for users who don’t want to program in assembly.
They cover all the operations which compiler cannot generate.
• It avoids the overhead of a function call and allows efficient machine
instructions to be emitted for that function.
• These functions available in a given language whose implementation is handled
specially by the compiler.
• Intrinsic function is usually inserted inline.
• For more details about the vector intrinsic functions, please refer to RISC-
V_Vector_(V)_Extension_Intrinsics_UM231_V1.5.pdf.

▪ NOTE: Be sure to use the correct signedness for arguments and return values when calling intrinsic functions.

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RVV Intrinsic Function
• riscv_vse32_v_f32m8(out_vec, vData, vl);

m8:
LMUL=8
v:Vector F32:Data
v:Working type is SPF
s:Store on VRF

e32:Element
width:32

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Agenda
• RISC-V Vector Instruction/Extension(RVV)
• Intrinsic Function
• Andes Custom Extensions (ACE)
• Debug

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ACE
• ACE: Andes Custom Extension. Andes provides ACE package for
customers to create custom instruction. The tool is COPILOT. The
input of the tool is an .ace file which describes the name, input
operands, output operand, and csim behavior model of the
instruction.
• ace_user.h is one of the output file of COPILOT. The file includes
the intrinsic functions of the custom instructions, pre-fixed with
ace_ for each instruction.
• libacesim.so and libacetool.so are generated libraries from
COPILOT for Sid simulator and toolchain respectively.

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ACE_RVV
• ACE_RVV: is to create vector instructions working on the VPU.
• For more details, please refer to
Andes_Custom_Extension_Programmer’s_Manual.pdf

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Agenda
• RISC-V Vector Instruction/Extension(RVV)
• Intrinsic Function
• Andes Custom Extensions (ACE)
• Debug

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GDB Debug Example – In AndeSim Simulator

Stopped at main()
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GDB Debug Example – In AndeSim Simulator
▪ All the examples are for 32 bit CPU. In the competition, since AX45MPV is a 64-bit CPU.
Please change all “32” to “64”.
▪ Run sid with a config file: a gdb server is in the sid

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GDB Command – Select a Debug File
• GDB program – Debug program

• (gdb) file [file] – Use file for symbols & executable

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GDB Connect to Target Platform
• (gdb) target remote :port
• (gdb) target remote host_ip:port – Remote debugging

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GDB Command – Load Code
• (gdb) load

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GDB Command – Read/Write Register and Memory
• (gdb) p/x $r0 – Print register
• (gdb) set $r0=0x55665566 – Set register
• (gdb) x/4w 0x0
– Examine memory (4w→4 words, 0x0→address)
• (gdb) set *(unsigned int*) 0x4=0x12345678
– Set memory
• (gdb) p variable – Print variable

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GDB Command – Set Breakpoint (1)
• (gdb) break *address – Set a breakpoint at address “address”.
• (gdb) break function – Set a breakpoint at entry of function “function”.

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GDB Command – Set Breakpoint (2)
• (gdb) break filename:linenum – Set a breakpoint at line linenum in source file filename.
• (gdb) hbreak args – Set a HW breakpoint (Trigger Module).
• (gdb) tbreak args – Set a temporary breakpoint only stopping once.
• (gdb) continue (or c) – Continue means resuming program execution your program
completes normally.

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GDB Command – Stepping (1)
• Stepping means executing just one more "step" of your program, where "step" may
mean either one line of source code, or one machine instruction.
• (gdb) step (s) – Execute a single statement. If the statement is a function call, just single
step into the function.
• (gdb) next (n) – Execute a single statement. If the statement is a function call, execute
the entire function and return to the statement just after the call; that is, step over the
function.

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GDB Command – Stepping (2)
• (gdb) stepi (si) – Execute one machine instruction, then stop and return to the debugger.

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GDB Command – Stepping (3)
• (gdb) finish – Execute the rest of the current function; that is, step out of the function.

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GDB Command – Backtrace
• A backtrace is a summary of how your program got where it is. It shows one line per
frame, for many frames, starting with the currently executing frame (frame zero),
followed by its caller (frame one), and on up the stack.
• (gdb) backtrace (bt) – Print a backtrace of the entire stack: one line per frame for all
frames in the stack.

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Tools
• risc64-elf-objdump: dump the elf format file to a readable
• riscv64-elf-objdump -dS adx/t_softmax_f32.adx >> mydump

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Thank You!

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