Direct Design Method z-Plane Specifications Discrete Root Locus Design using Root Locus Frequency response design

Control Systems II – Automatique II

Chapter 4 – Digital Control System Design

Dr. Bilal Komati

Lebanese University – Faculty of Engineering

Department of Electrical and Electronics Engineering

Fall 2021/2022

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Direct Design Method z-Plane Specifications Discrete Root Locus Design using Root Locus Frequency response design

Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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Introduction

To design a digital control system

We seek a z-domain transfer function or difference equation model of the controller that
meets given design specifications.
The controller model can be obtained from the model of an analog controller that meets
the same design specifications.
Alternatively, the digital controller can be designed in the z-domain using procedures that
are almost identical to s-domain analog controller design.

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Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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Direct Design Method of Raggazani

In some control applications, the desired transfer function of the closed-loop system is
known from the design specification.
This approach to design is known as synthesis.
Clearly, the resulting controller must be realizable for this approach to yield a useful
design.
Disturbances

R(z) E(z) Compensation U (z) ZOH + System

+
− D(z) G(z)
Y (z)

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Direct Design Method of Raggazani

The closed-loop transfer function is:
D(z)G (z)
H(z) =
1 + D(z)G (z)
From which we get the direct design formula:
1 H(z)
D(z) =
G (z) 1 − H(z)

This design calls for a D(z) that will cancel the plant effects and add whatever is necessary to
give the desired result.

Note that the controller D(z) must be realizable that is the degree of numerator must not
exceed that of the denominator.
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Pole Placement Approach

As noticed, the step response performance indices are functions of (ζ, ωn ). Also (ζ, ωn )
determine system poles:
p
s = −ζωn ± jωn 1 − ζ 2 = −ζωn ± jωd

Therefore, the response of a system is determined by the position of its poles.

placing the closed-loop poles at placing locations, we can shape the response of the system
and achieve desired time response characteristics.
The pole placement approach is applicable for both continuous-time systems and
discrete-time systems.
▶ thanks to the mapping between s- and z-plane poles (z = e sT ) provided that the sampling
interval is chosen sufficiently small.
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Pole Placement Design Procedure

Given some specifications of maximum

overshoot, rise time or settling time

Find ζ and ωn of the closed-loop system

Locate desired closed-loop poles on z-plane

Design a controller

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Pole Placement Design Procedure

Example
The open-loop transfer function of a system together with a ZOH is given by:

0.03(z + 0.75)
G (z) = , T = 0.2 s
z 2 − 1.5z + 0.5
Design a digital controller so that for the closed-loop system:
percent overshoot is 9.5%,
settling time (2%) is 2 sec,
steady-state error to a step input is zero and to a ramp input is 0.2.

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Pole Placement Design Procedure

Solution of the example

From the required percent overshoot and settling time:

√
2
Mp = e −ζπ/ 1−ζ = 0.095 ⇒ ζ = 0.6
4 4
Ts = = = 2 ⇒ ωn = 3.333 rad/s
ζωn 0.6ωn
The damped natural frequency:
p p
ωd = ωn 1 − ζ 2 = 3.333 1 − 0.62 = 2.667 rad/s
Hence, the required pole positions in the z-plane are:
z1,2 = e sT = e (−ζωn ±jωd )T = e −ζωn T [cos(ωd T ) ± j sin(ωd T )]
= e −0.6×3.333×0.2 [cos(2.667 × 0.2) ± j sin(2.667 × 0.2)] = 0.577 ± j0.341

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Pole Placement Design Procedure

Solution of the example

The desired closed-loop transfer function is thus given by:

N(z)
H(z) =
(z − 0.577 − j0.341)(z − 0.577 + j0.341)
N(z)
= 2
z − 1.154z + 0.449
Before we proceed, we must determine the degree of N(z). This degree must be ≤ 2 so
that H(z) is realizable.
If we choose N(z) to be exactly of order 2, this means that the closed-loop will start its
response instantaneously without delay.

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Pole Placement Design Procedure

Solution of the example

However, by recalling the transfer function of the process:

0.03(z + 0.75)
G (z) =
z 2 − 1.5z + 0.5
We can realize that the process itself has a delay of 1 sample (the order of the
denominator exceeds that of the numerator by 1), so the closed-loop must have, at least,
the same delay.
With this reasoning, the desired transfer function H(z) is chosen as:
b1 z + b0
H(z) =
z 2 − 1.154z + 0.449
Note that this choice insures the realizability of the controller we are designing.
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Pole Placement Design Procedure

Solution of the example

The parameters b1 and b0 can be determined from the steady-state requirements.

From given specifications: for a
For input R(z), the error is given by: unit-step input, ess = 0, so
z
ess = lim 1 − z −1


E (z) = R(z) − Y (z) [1 − H(z)]
z→1 z −1
= R(z) − H(z)R(z) = 1 − H(1)
= R(z) [1 − H(z)] b1 z + b0
=1−
z 2 − 1.154z + 0.449 z=1
So, the steady-state error is given by:
b1 + b0
ess = lim 1 − z −1 R(z) [1 − H(z)]


=1− =0
z→1 0.295
⇒b1 + b0 = 0.295
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Pole Placement Design Procedure

Solution of the example

Also, from the given specifications, it is required that, for a unit-ramp input, ess = 0.2:
ess = lim 1 − z −1 R(z) [1 − H(z)]


z→1

Tz
= lim 1 − z −1 [1 − H(z)]
z→1 (z − 1)2
 
0.2 b1 z + b0 0
= lim 1− 2 =
z→1 z − 1 z − 1.154z + 0.449 0

Hence, we need to apply L’Hôspital’s rule which gives:

0.846 − b1
ess = 0.2 = 0.2 ⇒ b1 = 0.551 ⇒ b0 = −0.256
0.295
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Pole Placement Design Procedure

Solution of the example

Hence, the desired closed-loop transfer function is:

0.551z − 0.256
H(z) =
z2 − 1.154z + 0.449
The controller that achieves this closed-loop transfer function is:
1 H(z)
D(z) =
G (z) 1 − H(z)
z 2 − 1.5z + 0.5 0.551z − 0.256
=
0.03(z + 0.75) z 2 − 1.705z + 0.705
18.37z 3 − 29.73z 2 + 18.09z − 3.831
=
z 3 − 0.955z 2 − 0.5738z + 0.5288
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Pole Placement Design Procedure

Solution of the example

The closed-loop system step response with the designed controller:

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Direct Design Method of Raggazani

Rules to follow:
H(z) must have a zero at infinity of the same order as the zero of G (z) at infinity
1 − H(z) must contain as zeros all the poles of G (z) that are outside the unit circle.
H(z) must contain as zeros all the zeros of G (z) that are outside the unit circle.
For a type 1 system with velocity constant Kv , we must have a zero steady-state error to
a step input, that is:
z
e(∞) = lim (z − 1) [1 − H(z)] = 0 ⇒ H(1) = 1
z→1 z −1
The error to a unit ramp must be 1/Kv , that is (using L’Hôpital rule):
Tz 1 dH 1
e(∞) = lim (z − 1) 2
[1 − H(z)] = ⇒ −T =
z→1 (z − 1) Kv dz z=1 Kv

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Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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Design specifications in the s-plane review

The transient response is characterized by the following criteria:
1 Time constant τ : Time required to reach about 63% of the final value.
π−θ
2 Rise time Tr = : Time to go from 10% to 90% of the final value.
ωd
3 Fractional and Percentage overshoot: PO = Mp × 100%

Peak value − Final value − √ πζ

Mp = = e 1−ζ 2
Final value
π π
4 Peak time Tp = = p : Time to first peak of an oscillatory response.
ωd ωn 1 − ζ 2
4
5 Settling time Ts ≈ : Time after which the oscillatory response remains within a
ζωn
specified percentage (usually 2%) of the final value.
6 Steady-state error should be considered.
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Design specifications in the z-plane

To get the specifications on acceptable pole locations in the z-plane:
Estimate the desired ωn , ζ and Mp from the
continuous-time response specifications. Compute
σ = ζωn .
Compute the radius r = e −σT
Obtain a plot of the z-plane showing lines of fixed
damping and ωn using Matlab command “ zgrid ”
that plots:
▶ ζ in steps of 0.1 from 0.1 to 0.9,
Nπ
▶ ωn = for integer N from 1 to 10
10T
Mark the region of acceptable closed-loop pole
locations on the plane.
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Design specifications in the z-plane

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Design specifications in the z-plane

Constant σ contours in the s-plane and the z-plane.

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Design specifications in the z-plane

Constant ωd contours in the s-plane and the z-plane.

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Design specifications in the z-plane

Example
Indicate on a z-plane map the region of acceptable closed-loop poles for the antenna design of
previous chapter.

Damping ratio: ζ ≥ 0.5

Natural frequency: ωn ≥ 1
Nπ 10T ωn 2
ωn = ⇒N= = ≈ 0.64
10T π π
The radius of the circle is:

r = e −σT = e −0.5×0.2 = e −0.1 = 0.9048

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Design specifications in the z-plane

 
−1 G (s)
The discrete transfer function of the plant is given by: G (z) = (1 − z )Z The
s
transform of the error with respect to a step input and its final value:
R(z) z 1
E (z) = =
1 + D(z)G (z) z − 1 1 + D(z)G (z)
z 1 1 1
e(∞) = lim (z − 1) = lim =
z→1 z − 1 1 + D(z)G (z) z→1 1 + D(1)G (1) 1 + Kp
The transform of the error with respect to a ramp input and its final value:
R(z) Tz 1
E (z) = =
1 + D(z)G (z) (z − 1)2 1 + D(z)G (z)
Tz 1 (z − 1)(1 + D(z)G (z))
e(∞) = lim = ⇒ Kv = lim
z→1 (z − 1)(1 + D(z)G (z)) Kv z→1 Tz
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Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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The Discrete Root Locus

The characteristic equation of the single-loop system is:

1 + D(z)G (z) = 0
This result is exactly the same equation found for the s-plane root locus.
The mechanics of drawing the root loci are exactly the same in the z-plane as in the
s-plane:
▶ the rules for the root locus to be on the real axis,
▶ for asymptote construction,
▶ and for arrival/departure angles are all unchanged from those developed for the s-plane.
▶ The difference lies in the interpretation of the results because the pole locations in the
z-plane mean different things than pole locations in the s-plane.

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The Discrete Root Locus

Example
Obtain the root locus plot and the critical gain for
the first-order type 1 system with loop gain
1
L(z) =
z −1

The critical gain for the system corresponds to the

point (−1, 0).
The closed-loop characteristic equation of the
system is
z −1+K =0
Substituting z = −1 gives the critical gain Kcr = 2.
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The Discrete Root Locus

Example
Obtain the root locus plot and the critical
gain for the second-order type 1 system with
1
loop gain L(z) =
(z − 1)(z − 0.5)

The closed-loop characteristic equation

(z − 1)(z − 0.5) + K = 0
⇒ z 2 − 1.5z + K + 0.5 = 0
The magnitude of the poles satisfies the
equation
|z1,2 |2 = Kcr + 0.5 = 1
Kcr = 0.5 ⇒ z1,2 = 0.7 ± j0.661
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Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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Introductory Example

Example (Discrete Root Locus Design - Previous Chapter)

1
Consider the transfer function of the plant for an antenna angle-tracker G (s) = .
s(10s + 1)
The specifications for this system are:
1 Overshoot to a step input less than 16%.
2 Settling time to 1% to be less than 10 sec.
3 Tracking error to a ramp input of slope 0.01 rad/sec to be less than 0.01 rad.
4 Sampling time of 1 second.
Design a controller for this system using the method of discrete root locus.

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Introductory Example – Controller Design by Emulation

1
The plant transfer function is: G (s) = .
s(10s + 1)
From overshoot requirement:
√
2
P.O. = 100e −πζ/ 1−ζ ⇒ ζ ≈ 0.5
Settling time requirement:
4
Ts = ≤ 10 ⇒ σ = ζωn ≥ 0.4 ⇒ ωn ≥ 0.8
σ
Steady-state requirement:
0.01 0.01 0.01
ess ≤ ⇒ Kv = ≥ =1
Kv ess 0.01
Using lead compensation to cancel a plant pole, a first choice for controller might be:
10s + 1
Gc (s) =
s +1
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Introductory Example – continued

For T = 1 sec, the ZOH equivalent
of the transfer function is:
z + 0.9672
G (z) = 0.0484
(z − 1)(z − 0.9048)

The design by emulation of the

controller has led to the controller:
z − 0.9048
Gc (z) = 6.64
z − 0.3679
Plotting the root locus for both
uncompensated systems and the
compensated system:
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Direct z-domain digital controller design

Procedure:
Because of the similarity of s-domain and z-domain root loci, Procedures 1, 2, and 3 seen
in the previous chapter are applicable with minor changes in the z-domain.
However, the following equation is no longer valid because the real and imaginary
components of the complex conjugate poles are different in the z-domain:
ωd
a= + ζωn
tan(θc )
A digital controller with a zero and no poles is not realizable, and a pole must be added
to the controller.
To minimize the effect of the pole on the time response, it is placed at the origin.
This is analogous to placing an s-plane pole far in the LHP to minimize its effect.

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Direct z-domain digital controller design

The poles of the system are given by

z1,2 = e −ζωn T ±ωd T

Using the expression, we obtain

Im[zzcl ]
a = Re[zzcl ] −
tan(θa )
e −ζωn T sin(ωd T )
= e −ζωn T cos(ωd T ) −
tan(θa )
where θa is the angle of the controller zero. θa is given by
θa = θc + θp = θc + θzcl
θzcl is the angle of the controller pole and θc is the controller angle contribution at the
closed-loop pole location.
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Direct z-domain digital controller design

Example
Design a digital controller for a DC motor speed control system where the (type 0) analog
1
plant has the transfer function G (s) = , to obtain zero steady-state error
(s + 1)(s + 10)
due to a unit step, a damping ratio of 0.7, and a settling time of about 1 s.

First, selecting T = 0.1 s, we obtain the z-transfer function

z + 0.694
G (z) = 3.55 × 10−3
(z − 0.368)(z − 0.905)

To perfectly track a step input, a PI controller should be used.

Directly canceling the pole at z = 0.905 gives a design that meets the design
specifications.
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Direct z-domain digital controller design

Example
Design a digital controller for the DC motor position control system, where the (type 1)
1
analog plant has the transfer function G (s) =
s(s + 1)(s + 10)
for a settling time of less than 1 s and a damping ratio of 0.7.

For a sampling period of 0.01 s, the plant, ADC, and DAC have the z-transfer function
(z + 0.2606)(z + 3.632)
G (z) = 1.6217 × 10−7
(z − 1)(z − 0.9048)(z − 0.99)
Using a PD controller with pole-zero cancellation improves the system transient response
z − 0.99
C (z) = K
z
The design meets the desired specifications with a gain of 4,580.
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Direct z-domain digital controller design

Example
Design a digital controller for the DC motor speed control system, where the analog plant has
1
the transfer function G (s) = , for a time constant of less than 0.3 second, a
(s + 1)(s + 3)
dominant pole damping ratio of at least 0.7, and zero steady-state error due to a step input.

The plant is type 0 and with a sampling period T = 0.005 s:

z + 0.9934
G (z) = 1.2417 × 10−5
(z − 0.9851)(z − 0.995)
For zero steady-state error due to step, and using a PID control with canceling the plant poles
z + 0.9934
L(z) = 1.2417 × 10−5
z(z − 1)
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Direct z-domain digital controller design

Adding the zero to the transfer function, we obtain the root locus of the figure below and
select a gain of 20,200. The corresponding time response is shown below.

The time
Digital response
Control shows
System Design (ULFG) less than 5%Control
overshoot
Systems II –with
Chaptera4 fast time response
Fallthat meets all
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Table of Contents

1 Direct Design Method

2 z-Plane Specifications

3 Discrete Root Locus

4 Design using Root Locus

5 Frequency response design

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Frequency Response Methods

The frequency response methods for continuous control system design were developed from
the original work of Bode (1945) on feedback-amplifier techniques. Their attractiveness for
design of continuous linear feedback systems depends on several ideas:
1 The gain and phase curves for a rational transfer function can be easily plotted by hand.
2 If a physical realization of the system is available, the frequency response can be
measured experimentally without the necessity of having a mathematical model at all.
3 Nyquist stability criterion can be applied, and dynamic response specifications can be
readily interpreted in terms of gain and phase margins, which are easily seen on the plot
of log gain and phase-versus-log frequency.
4 The system error constants, mainly Kp and Kv , can be read directly from the
low-frequency asymptote of the gain plot.

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Frequency Response Methods

5The corrections to the gain and phase curves (and thus the corrections in the gain and
phase margins) introduced by a trial pole or zero of a compensator can be quickly and
easily computed, using the gain curve alone.
6 The effect of pole, zero, or gain changes of a compensator on the speed of response
(which is proportional to the crossover frequency) can be quickly and easily determined
using the gain curve alone.
In order to apply these concepts to the design of digital controls, the basic results on stability
and performance must be translated to the discrete domain. The concepts are the same as for
continuous systems, but plots of the magnitude and phase of a discrete transfer function,
H(z), are accomplished by letting z take on values around the unit circle, z = e jωT :
magnitude = |H(z)|e jωT
phase = H(z)|e jωT
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Example
Plot the discrete frequency response corresponding to the plant transfer function
1
G (s) =
s(s + 1)
sampling with a zero order hold at T = 0.2, 1, and 2 seconds and compare with the
continuous response

The discrete transfer functions for the specified

sampling periods are computed:

0.018731(z + 0.9355)
G1 (z) = , T = 0.2 s
(z − 1)(z − 0.8187)
0.36788(z + 0.7183)
G2 (z) = ,T = 1 s
(z − 1)(z − 0.3679)
1.1353(z + 0.5232)
G3 (z) = ,T = 2 s
(z − 1)(z − 0.1353)
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It is clear that the curves for the discrete

systems are nearly coincident with the
continuous plot for low frequencies but deviate
substantially as the frequency approaches π/T
in each case.
The primary effect of sampling is to cause an
additional phase lag that can be approximated
by
ωT
∆ϕ =
2

The accuracy of this approximation for sample rates is up to ωT = π/2, which corresponds to
frequencies up to 1/4 the sample rate.

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Gain and Phase Margins

Gain Margin
the Gain Margin (GM) is the factor by which the gain can be increased before causing the
system become unstable, and is usually the inverse of the magnitude of D(z)G (z) when its
phase is 180◦ .

Phase Margin
The Phase Margin (PM) is the difference between −180◦ and the phase of D(z)G (z) when its
amplitude is 1. The PM is a measure of how much additional phase lag or time delay can be
tolerated in the loop before instability results.

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Gain and Phase Margin Example

1 ZOH (z + 3.38)(z + 0.242)

G (s) = −−−→ G (z) = 0.0012
s(s + 1)2 (z − 1)(z − 0.8187)2
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Low Frequency Gains and Error Coefficients

The steady-state error constants for polynomial inputs for discrete systems are given by
Type 0 system Kp = lim D(z)G (z)
z→1
(z − 1)D(z)G (z)
Type 1 system Kv = lim
z→1 Tz
For Type 0 system, the magnitude frequency-response plot will show a constant value on
the low-frequency asymptote which is equal to Kp .
For Type 1 system, the magnitude of D(z)G (z) at ω = 1 on the low-frequency asymptote
is equal to Kv .
The evaluation of the low-frequency asymptote of D(z)G (z) at ω = 1 yields Kv .

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Low Frequency Gains and Error Coefficients – Example

Example
Use the discrete Bode plot to determine
the Kv for the antenna system with the
controller
z + 0.9672
Gc (z)G (z) =0.0484
(z − 1)(z − 0.9048)
z − 0.8
× (6)
z − 0.5

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Design Specifications in the Frequency Domain

For continuous systems, the phase margin, PM, is related to the damping ratio, ζ, for a
second order system by the approximate relation ζ ≈ PM/100.
The PM from a discrete z-plane frequency response analysis carries essentially the same
implications about the damping ratio of the closed-loop system as it does for continuous
systems.
For second-order systems without zeros, the relationship between ζ and PM shows that
the approximation of ζ ≈ PM/100 is equally valid for continuous and discrete systems
with reasonably fast sampling.
For higher order systems, the damping of the individual modes needs to be determined
using other methods.

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Design Specifications in the Frequency Domain

In controller design problems, the specifications are often given in terms of the step
response of the closed-loop system, such as the settling time and the percentage
overshoot.
The percentage overshoot specification yields the damping ratio ζ, which is then used
with the settling time to obtain the undamped natural frequency ωn .
If the closed-loop system can be approximated by the second-order underdamped transfer
function.
ωn2
T (s) = 2
s + 2ζωn s + ωn2
The corresponding loop gain with unity feedback is given by
ωn2
L(s) =
s 2 + 2ζωn s
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Design Specifications in the Frequency Domain

We substitute s = jω to obtain the corresponding frequency response:
1
|L(jω)|2 = =1
(ω/ωn ) + 4ζ 2 (ω/ωn )2
4

The magnitude of the loop gain is unity at the gain crossover frequency:
hp i1/2
ωgc = ωn 4ζ 4 + 1 − 2ζ 2
Next, we consider the phase margin and derive
 
2ζ
PM = 180◦ + G (jωgc ) = tan−1  hp
 
i1/2 
4ζ 4 + 1 − 2ζ 2

The last expression can be approximated by PM ≈ 100ζ

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Compensator Design – Introductory Example

Example
1
Consider the transfer function of the plant for an antenna angle-tracker G (s) = .
s(10s + 1)
The specifications for this system are:
1 Overshoot to a step input less than 16%.
2 Settling time to 1% to be less than 10 sec.
3 Tracking error to a ramp input of slope 0.01 rad/sec to be less than 0.01 rad.
4 Sampling time of 1 second.
Design a controller for this system using discrete frequency response method.

The requirements are:

ζ ≥ 0.5 ωn ≥ 0.8 Kv ≥ 1
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Compensator Design – Introductory Example Discussion

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Frequency response design

We recall the bilinear transformation
2 z −1
w=
T z +1
which maps points in the LHP into points inside the unit circle. To transform the inside of the
unit circle to the LHP, we use the inverse bilinear transformation
wT
1+ 2
z= wT
1− 2

This transforms the transfer function of a system from the z-plane to the w -plane.
The w -plane is a complex plane whose imaginary part is denoted by v . To express the
relationship between the frequency ω in the s-plane and the frequency v in the w -plane, we let
T ωT
s = jω and therefore z = e jωT . After some calculations, we have w = jv = j tan
2 2
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Frequency Response Design – Procedure

Frequency Response Design Procedure

1 Select a sampling period and obtain the transfer function G (z) of the discretized process.
wT
1+ 2
2 Transform G (z) into G (w ) using the bilinear transformation z = . wT
1− 2
3 Draw the Bode plot of G (jv ) and use the analog frequency response methods to design a
controller C (w ) that satisfies the frequency domain specifications.
2 z −1
4 Transform the controller back into the z-plane by means of w = , thus
T z +1
determining C (z).
5 Verify that the performance obtained is satisfactory.

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Compensator Design – Example 1

Example
Consider a DC motor speed control system where the (type 0) analog plant has the transfer
1
function G (s) =
(s + 1)(s + 10)
Design a digital controller by using frequency response methods to obtain zero steady-state
error due to a unit step, an overshoot less than 10%, and a settling time of about 1 s.

For 10% overshoot, we calculate the damping ratio as

| ln(0.1)|
ζ=p ≈ 0.6 ⇒ PM ≈ 60◦
2
| ln(0.1)| + π 2

For a settling time of 1 sec, we calculate the undamped natural frequency

4
ωn = ≈ 6.7 rad/s
ζTs
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Compensator Design – Example 1 Solution

hp i1/2
The gain crossover frequency: ωgc = ωn 4ζ 4 + 1 − 2ζ 2 = 4.8 rad/s We select
T = 0.02s, 2π/(40ωd ), which corresponds to a sampling frequency higher than 40 times the
damped natural frequency.
The discretized process is then determined as
 
G (s) z + 0.9293
G (z) = 1 − z −1 Z = 1.8604 × 10−4


s (z − 0.8187)(z − 0.9802)

The system is a Type 0 system. To cancel the steady-state error, an integrator should be
added to the system (pole at z = 1).
A simple approach is to cancel the dominant pole at z = 0.9802.
Increase the gain to attain the required gain crossover frequency.
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Compensator Design – Example 1 Solution

Thus, the resulting controller
transfer function is:
z − 0.9802
C (z) = 54
z −1

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Compensator Design – Example 2

Example
1
Consider the DC motor speed control system with transfer function G (s) = .
(s + 1)(s + 3)
Design a digital controller using frequency response methods to obtain (zero steady-state error
due to a unit step, an overshoot less than 10%, and a settling time of about 1 s. Use a
sampling period T = 0.2 s.

The desired specifications imply:

1 the given steady-state error specification requires a controller with a pole at z = 1;
2 the percentage overshoot specification requires a phase margin of about 60◦ ;
3 the settling time yields a gain crossover frequency of about 5 rad/s.

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Compensator Design – Example 2 Solution

The transfer function of the system with DAC and ADC is
 
−1 G (s) z + 0.7661
Z


G (z) = 1 − z = 0.015437
s (z − 0.8187)(z − 0.5488)
Transforming to the w -plane, we obtain
−12.819 × 10−4 (w + 75.5)(w − 10)
G (w ) =
(w + 2.913)(w + 0.9967)

Both poles must be canceled with two controller zeros.

For a realizable controller, we need at least two controller poles.
In addition to the pole at z = 1, we select a high-frequency controller pole so as not to
impact the frequency response in the vicinity of the crossover frequency.
(w + 2.913)(w + 0.9967) (z − 0.8187)(z − 0.5488)
C (w ) = 78 ⇔ C (z) = 36.92
w (w + 20) (z − 1)(z − 0.3333)
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Compensator Design – Example 2 Solution

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