Btech Ece 5 Sem Computer Architecture and Organization 2012
Btech Ece 5 Sem Computer Architecture and Organization 2012
com
Name : ……………………………………………………………
Roll No. : ……………………………………………..…………..
Invigilator's Signature : ………………………………………..
CS/B.TECH/ECE(O)/SEM-5/EC-503/2012-13
2012
COMPUTER ARCHITECTURE AND
ORGANIZATION
Time Allotted : 3 Hours Full Marks : 70
GROUP – A
( Multiple Choice Type Questions )
1. Choose the correct alternatives for any ten of the following :
10 1 = 10
i) The logic circuit in ALU is
a) entirely combinational
b) entirely sequential
c) combinational cum sequential
d) none of these.
ii) Physical memory broken down into groups of equal size
is called
a) page b) tag
c) block d) index.
iii) Principle of the locality justifies the use of
a) interrupts b) DMA
c) polling d) cache memory.
5305(O) 2
CS/B.TECH/ECE(O)/SEM-5/EC-503/2012-13
GROUP – B
( Short Answer Type Questions )
Answer any three of the following. 3 5 = 15
T2 :A C
GROUP – C
( Long Answer Type Questions )
Answer any three of the following. 3 15 = 45
7. a) Using Booth's algorithm multiply ( – 9 ) and ( – 3 ). 10
b) Show how the non-restoring method is deduced from
restoring division method. 3
c) Write down the steps of the algorithm of addition or
subtraction of two floating point numbers. 2
8. a) Discuss the principle of carry look ahead adder and
design a 4-bit CLA adder and estimate speed
enhancement with respect to ripple carry adder. 5 + 4
b) Briefly state the relative advantages and disadvantages
of parallel adder over serial adder. 3
c) X=(A+B) C
Write down the Zero address and one address
instruction for the expression. 3
9. Write short notes on any three of the following : 3 5
a) Magnetic recording
b) Adder-subtractor circuit
c) Bus organization using tri-state buffer
d) DMA
e) Addressing moods.
10. a) What do you mean by logical address space and
physical address space ?
b) Explain with an example how logical address is
converted into physical address ? Explain how page
replacements take place.
c) Write the advantages of virtual memory system.
d) i) How many address lines are present in a
256 K 8 RAM ?
ii) How many such RAMs will be required to
construct 1M 32 memory bank ?
iii) How many such RAMs will be required to
construct 512 K 32 memory bank ?
2+4+3+(3 2)
5305(O) 4