Chapter 4

Instructions
Contents
 Instructions:

1) Data Movement Instructions

2) Arithmetic and Logic instructions

Data Movement Instructions
 These instructions are used to transfer the data from the source
operand to the destination operand.
 Instructions are used to transfer data/ address in to registers,
memory locations and I/O ports.
 Generally involve two operands: Source operand and Destination
operand are the same size.
 Source: Register or a memory location or an immediate
data
 Destination: Register or a memory location.
 The size should be a either a byte or a word. A 8-bit data can only be
moved to 8-bit register/ memory and a 16-bit data can be moved to
16-bit register/ memory.
 There are five sub category of data movement instructions,
these are:

 MOV

 PUSH/POP

 Load-Effective Address

 String Data Transfers and Miscellaneous Data Transfer

Instructions
MOV Instructions
 It is a general purpose instruction to transfer byte or word from
register to register, register to memory or from memory to
register.
 The MOV instruction copies a word or byte of data from a
specified source to a specified destination.
 The destination can be a register or a memory location.
 The source can be a register, a memory location or an
immediate number. Mov destination, source
 The source and destination cannot be both memory locations.
 They must both be of the same type (bytes or words).
 MOV instruction does not affect any flag.
 MOV CX, 037AH Put immediate number 037AH to CX
 MOV BL, [437AH] Copy byte in DS at offset 437AH to BL
 MOV AX, BX Copy content of register BX to AX
 MOV DL, [BX] Copy byte from memory at [BX] to DL
 MOV DS, BX Copy word from BX to DS register
PUSH/POP Instructions
 PUSH instruction decrements the stack pointer by 2 and copies a
word from a specified source to the location in the stack segment
to which the stack pointer points.
 Source of the word can be general purpose register, segment
register, or memory. PUSH Source
 Stack segment register and the stack pointer must be initialized
before this instruction can be used.
 PUSH can be used to save data on the stack so that it will not
destroyed by a procedure.
 This instruction does not affect any flag.
Examples:

 PUSH BX: Decrement SP by 2,

copy BX to stack.
 PUSH DS: Decrement SP by 2,
copy DS to stack.
 PUSH AX: Decrement SP by 2, and
copy AX to stack.
POP Instructions
 POP instruction copies a word from the stack location pointed to
by the stack pointer to a destination specified in the instruction.
 i.e. POP Destination
 Destination can be a general-purpose register, a segment register
or a memory location.
 Data in the stack is not changed.
 After the word is copied to the specified destination, the stack
pointer is automatically incremented by 2 to point to the next
word on the stack.
 The POP instruction does not affect any flag.
Examples:

 POP DX: Copy a word from top of stack to DX; increment

SP by 2
 POP DS : Copy a word from top of stack to DS; increment
by 2
 POP BX : Copy a word from top of stack to
BX; increment SP by 2.
Load Effective Address Instruction
 LEA Register, Source :
 This instruction determines the offset of the variable or memory location
named as the source and puts this offset in the indicated 16-bit register.
 LEA does not affect any flag.
 LEA BX, PRICES: Load BX with offset of PRICE in DS
 LEA BP, SS: STACK_TOP: Load BP with offset of STACK_TOP in SS
 LEA CX, [BX][DI]: Load CX with EA = [BX] + [DI]
 LDS Register, Memory address of the first word
 This instruction loads new values into the specified register and into
the DS register from four successive memory locations.
 The word from two memory locations is copied into the specified
register and the word from the next two memory locations is copied
into the DS registers.
 LDS does not affect any flag.
 LDS BX, [4326]: Copy content of memory at displacement
4326H in DS to BL, content of 4327H to BH. Copy content at
displacement of 4328H and 4329H in DS to DS register.
 LDS SI, SPTR: Copy content of memory at displacement
SPTR and SPTR + 1 in DS to SI register. Copy content of
memory at displacements SPTR + 2 and SPTR + 3 in DS to DS
register. DS: SI now points at start of the desired string.
 LES Register, Memory address of the first word
 This instruction loads new values into the specified register and into the
ES register from four successive memory locations.
 The word from the first two memory locations is copied into the
specified register, and the word from the next two memory locations is
copied into the ES register.
 LES does not affect any flag.
 LES BX, [789AH]: Copy content of memory at displacement
789AH in DS to BL, content of 789BH to BH, content of memory at
displacement 789CH and 789DH in DS is copied to ES register.
 LES DI, [BX]: Copy content of memory at offset [BX] and
offset [BX] + 1 in DS to DI register. Copy content of memory at
offset [BX] + 2 and [BX] + 3 to ES register.
Miscellaneous Data Transfer Instructions
 XCHG Destination, Source
 The XCHG instruction exchanges the content of a register with the
content of another register or with the content of memory location(s).
 It cannot directly exchange the content of two memory locations.
 The source and destination must be the same type (bytes or words).
 The segment registers cannot be used in this instruction.
 This instruction does not affect any flag.
• XCHG AX, DX : Exchange word in AX with word in DX
• XCHG BL, CH : Exchange byte in BL with byte in CH
• XCHG AL, PRICES [BX] : Exchange byte in AL with byte in
memory at EA = PRICE [BX] in DS.
 Arithmetic and Logic instructions

Arithmetic Instructions Logic Instructions

 ADD  MUL  AND  NOT
 INC  IMUL  OR  TEST
 SUB  DIV  XOR  NEG
 SBB  IDIV
 DEC
 Arithmetic Instructions
ADD:
 These instructions add a number from some source to a number in
some destination and put the result in the specified destination.
• ADD Destination, Source
• ADC Destination, Source
 The ADC also adds the status of the carry flag to the result.
 The source may be an immediate number, a register, or a memory
location.
 The destination may be a register or a memory location.
 The source and the destination in an instruction cannot both be
memory locations.
 Flags affected: AF, CF, OF, SF, ZF.
 ADD AL, 74H Add immediate number 74H to content
of AL. Result in AL
 ADC CL, BL Add content of BL plus carry status to
content of CL
 ADD DX, BX Add content of BX to content of DX
INC Instruction
 The INC instruction adds 1 to a specified register or to a
memory location.
o INC Destination

 AF, OF, PF, SF, and ZF are updated, but CF is not affected.
 This means that if an 8-bit destination containing FFH or a
16-bit destination containing FFFFH is incremented, the
result will be all 0’s with no carry.
INC BL: Add 1 to contains of BL register
INC CX: Add 1 to contains of CX register
INC BYTE PTR [BX]: Increment byte in data segment at
offset contained in BX
INC WORD PTR [BX]: Increment the word at offset of
[BX] and [BX + 1] in the DS
INC TEMP: Increment byte or word named TEMP in the
data
SUB
 These instructions subtract the number in some source from the
number in some destination and put the result in the destination.
 SUB Destination, Source
 SBB Destination, Source
 The SBB instruction also subtracts the content of carry flag from
the destination.
 The source may be an immediate number, a register or memory
location.
 The destination can also be a register or a memory location.
 The source and the destination cannot both be memory location.
 Flags affected: AF, CF, OF, PF, SF, ZF.
 SUB CX, BX: CX - BX; Result in CX
 SBB CH, AL: Subtract content of AL and content of
CF from content of CH. Result in CH.
 SUB AX, 3427H: Subtract immediate number 3427H
from AX
DEC
 DEC Destination
 This instruction subtracts 1 from the destination word or byte.
 The destination can be a register or a memory location.
 AF, OF, SF, PF, and ZF are updated, but CF is not affected.
 This means that if an 8-bit destination containing 00H or a 16-
bit destination containing 0000H is decremented, the result
will be FFH or FFFFH with no carry (borrow).
 DEC CL Subtract 1 from content of CL register
 DEC BP Subtract 1 from content of BP register
 DEC BYTE PTR [BX] Subtract 1 from byte at offset
[BX] in DS

 DEC WORD PTR [BP] Subtract 1 from a word at

offset [BP] in SS

 *DEC COUNT Subtract 1 from byte or word

named COUNT in DS
MUL
 MUL Source
 This instruction multiplies an unsigned byte in some source
with an unsigned byte in AL register or an unsigned word in
some source with an unsigned word in AX register.
 The source can be a register or a memory location.
 When a byte is multiplied by the content of AL, the result
(product) is put in AX.
 When a word is multiplied by the content of AX, the result is
put in DX (Default register) and AX registers.
 If the most significant byte of a 16-bit result or the most
significant word of a 32-bit result is 0, CF and OF will both
be 0’s.
 AF, PF, SF and ZF are undefined after a MUL instruction.
 MUL BH Multiply AL with BH; result in
AX
 MUL CX Multiply AX with CX; result high
word in DX, low word in AX
IMUL (Integer Multiplication )
 IMUL Source
 This instruction multiplies a signed byte from source with a signed
byte in AL or a signed word from some source with a signed word
in AX.
 The source can be a register or a memory location.
 When a byte from source is multiplied with content of AL, the
signed result (product) will be put in AX.
 When a word from source is multiplied by AX, the result is put in
DX and AX.
 If the magnitude of the product does not require all the bits of the
destination, the unused byte / word will be filled with copies of the
sign bit.
 If the upper byte of a 16-bit result or the upper word of a 32-bit
result contains only copies of the sign bit (all 0’s or all 1’s), then CF
and the OF will both be 0; If it contains a part of the product, CF and
OF will both be 1.

 AF, PF, SF and ZF are undefined after IMUL.

 IMUL BH Multiply signed byte in AL with signed byte in

BH and result in AX

 IMUL AX Multiply AX times AX; result in DX and AX

 IMUL CX Multiply CX with AX; Result in DX and AX

DIV
 DIV Source
 This instruction is used to divide an unsigned word by a byte or to
divide an unsigned double word (32- bits) by a word.
 When a word is divided by a byte, the word must be in the AX
register.
 The divisor can be in a register or a memory location.
 After the division, AL will contain the 8-bit quotient, and AH will
contain the 8-bit remainder.
 When a double word is divided by a word, the most significant
word of the double word must be in DX, and the least significant
word of the double word must be in AX.
 After the division, AX will contain the 16-bit quotient and DX will
contain the 16-bit remainder.
 If an attempt is made to divide by 0 or if the quotient is too large to
fit in the destination (greater than FFH / FFFFH), the 8086 will
generate a type 0 interrupt.
 All flags are undefined after a DIV instruction.
 DIV BL Divide word in AX by byte in BL;
Quotient in AL, remainder in AH
 DIV CX Divide down word in DX and AX by word in CX;
Quotient in AX, and remainder in DX
IDIV (Integer Division)
 IDIV Source
 This instruction is used to divide a signed word by a signed byte,
or to divide a signed double word by a signed word.
 When dividing a signed word by a signed byte, the word must be
in the AX register.
 The divisor can be in an 8-bit register or a memory location.
 After the division, AL will contain the signed quotient, and AH
will contain the signed remainder.
 The sign of the remainder will be the same as the sign of the
dividend.
 If an attempt is made to divide by 0, the quotient is greater
than 127 (7FH) or less than -127 (81H), the 8086 will
automatically generate a type 0 interrupt.

 When dividing a signed double word by a signed word, the

most significant word of the dividend (numerator) must be in
the DX register, and the least significant word of the dividend
must be in the AX register.
 The divisor can be in any other 16-bit register or memory location.
 After the division, AX will contain a signed 16-bit quotient, and DX
will contain a signed 16-bit remainder.
 The sign of the remainder will be the same as the sign of the
dividend.
 Again, if an attempt is made to divide by 0, the quotient is greater
than +32,767 (7FFFH) or less than -32,767 (8001H), the 8086 will
automatically generate a type 0 interrupt.
 All flags are undefined after an IDIV.
Basic Logic Instructions
 AND
 AND Destination, Source
 This instruction ANDs each bit in a source byte or word with the
same numbered bit in a destination byte or word.
 The result is put in the specified destination.
 The content of the specified source is not changed.
 The source can be an immediate number, the content of a register,
or the content of a memory location.
 The destination can be a register or a memory location.
 The source and the destination cannot both be memory locations.
 CF and OF are both 0 after AND.
 PF, SF, and ZF are updated by the AND instruction. AF is undefined.
 PF has meaning only for an 8-bit operand.
 AND CX, [SI]: AND word in DS at Offset [SI] With word
in CX Register; Result in CX Register.
 AND BH, CL: AND Byte in CL with Byte in BH; Result in BH
 AND BX, 00FFH: 00FFH Masks upper byte, leaves lower byte
unchanged.
OR
 OR Destination, Source
 This instruction ORs each bit in a source byte or word with the same
numbered bit in a destination byte or word.
 The result is put in the specified destination.
 The content of the specified source is not changed.
 The source can be an immediate number, the content of a register, or
the content of a memory location.
 The destination can be a register or a memory location.
 The source and destination cannot both be memory locations.
 CF and OF are both 0 after OR. PF, SF, and ZF are updated by the
OR instruction. AF is undefined.
 PF has meaning only for an 8-bit operand.
 OR AH, CL ORed with AH, result in AH, CL not changed
 OR BP, SI ORed with BP, result in BP, SI not changed
 OR SI, BP ORed with SI, result in SI, BP not changed
 OR BL, 80H BL ORed with immediate number 80H; sets MSB
of BL to 1
 OR CX, TABLE [SI] CX ORed with word from effective address
TABLE [SI]; Content of memory is not changed.
XOR
 XOR Destination, Source
 This instruction Exclusive-ORs each bit in a source byte or
word with the same numbered bit in a destination byte or
word.
 The result is put in the specified destination.
 The content of the specified source is not changed.
 The source can be an immediate number, the content of a
register, or the content of a memory location.
 The destination can be a register or a memory location.
 The source and destination cannot both be memory locations.
 CF and OF are both 0 after XOR. PF, SF, and ZF are updated.
 PF has meaning only for an 8-bit operand. AF is undefined.
 XOR CL, BH: Byte in BH exclusive-ORed with byte in CL.
Result in CL. BH not changed.
 XOR BP, DI: Word in DI exclusive-ORed with word in BP.
Result in BP. DI not changed
 XOR WORD PTR [BX], 00FFH: Exclusive-OR immediate
number 00FFH with word at offset [BX] in the data segment.
Result in memory location [BX]
NOT
 NOT Destination
 The NOT instruction inverts each bit (forms the 1’s complement) of
a byte or word in the specified destination.
 The destination can be a register or a memory location.
 This instruction does not affect any flag.
 NOT BX: Complement content or BX register
 NOT BYTE PTR [BX]: Complement memory byte at
offset [BX] in data segment.
TEST
 TEST Destination, Source
 This instruction ANDs the byte/word in the specified source with the
byte/word in the specified destination.
 Flags are updated, but neither operand is changed.
 The Test instruction is often used to set flags before a Conditional
jump instruction.
 The source can be an immediate number, the content of a register, or
the content of a memory location.
 The destination can be a register or a memory location.
 The source and the destination cannot both be memory locations.
 CF and OF are both 0’s after TEST.
 PF, SF and ZF will be updated to show the results of the destination.
 AF is be undefined.
 TEST AL, BH AND BH with AL. No result stored; Update
PF, SF, ZF
 TEST CX, 0001H AND CX with immediate number 0001H;
No result stored ; Update PF, SF, ZF
 TEST BP, [BX][DI] AND word are offset [BX][DI] in DS with
word in BP; No result stored; Update PF, SF, ZF
NEG
 This instruction replaces the number in a destination with its
2’s complement.
 The destination can be a register or a memory location.
 It gives the same result as the invert each bit and add one
algorithm.
 This instruction can be implemented by inverting each bit and
adding 1 to it.
 The NEG instruction updates AF, PF, ZF, and OF.
 NEG AL: Replace number in AL with its 2’s complement
 NEG BX: Replace number in BX with its 2’s complement
 NEG BYTE PTR [BX]: Replace byte at offset BX in DX with
its 2’s complement
 NEG WORD PTR [BP]: Replace word at offset BP in SS with
its 2’s complement
 Shift and Rotate Instructions

Shift Instructions Rotate Instructions

 SAL(shift arithmetic left )  RCL (rotate carry left )

 SHL(shift left )  RCR (rotate carry left )

 SAR(shift arithmetic right )  ROL (rotate left )

 SHR(shift right)  ROR (rotate right)

Shift Instructions
 Shift instructions position or move binary data to the Left or Right
by shifting them within the register or memory location.
 The Shift operations can be classified as Logical Shifts and
Arithmetic Shifts.
 The logical shifts move a 0 into the rightmost bit position for logical
left shift (SHL) and a 0 into the leftmost bit position for logical right
shift (SHR).
 The arithmetic left shift (SAL) and logical left shift (SHL)
operations are identical.
 Arithmetic and logical right shifts are different because the
arithmetic right shift (SAR) copies the sign bit through the number,
 While the logical right shift copies a 0 through the number.
SAL and SHL are the same
 SAL Destination, Count
 SHL Destination, Count
 SAL and SHL are two mnemonics for the same instruction.
 This instruction shifts each bit in the specified destination some
number of bit positions to the left.
 As a bit is shifted out of the LSB operation, a 0 is put in the LSB
position.
 The MSB will be shifted into CF.
 All flags are affected.
 Example: SAL AL, 1 and SHL AL, 1
SAR
• SAR Destination, Count
 This instruction shifts each bit in the specified destination some
number of bit positions to the right.
 As a bit is shifted out of the MSB position, a copy of the old MSB is
put in the MSB position. In other words, the sign bit is copied into
the MSB.
 The LSB will be shifted into CF.
 All flags are affected.
 E.g. SAR CL, 1
SHR
 SHR Destination, Count
 This instruction shifts each bit in the specified destination some
number of bit positions to the right.
 As a bit is shifted out of the MSB position, a 0 is put in its place.
 The bit shifted out of the LSB position goes to CF.
 Bits shifted into CF previously will be lost.
 All flags are affected. E.g. SHR DL, 1
Rotate Instructions

 Rotate instructions position or move binary data by rotating

the information in a register or memory location, either from
one end to another or through the carry flag.
 The rotate instructions shift the bits around, just like the shift
instructions, except the bits shifted out of the operand by the
rotate instructions recirculate through the operand.
RCL(rotate with carry left)
 RCL Destination, Count
 RCL:- used to rotate bits of byte/word towards the left, i.e. MSB to CF
and CF to LSB.
 This instruction rotates all the bits in a specified word or byte some
number of bit positions to the left along with carry flag.
 The operation circular because the MSB of the operand is rotated into
the carry flag and the bit in the carry flag is rotated around into LSB of the
operand.
 RCL affects only CF and OF. OF will be a 1 after a single bit RCL if the
MSB was changed by the rotate.
 OF is undefined after the multi-bit rotate.
RCR(rotate with carry right)
 RCR Destination, Count
 RCR:- used to rotate bits of byte/word towards the right, i.e. LSB to
CF and CF to MSB.
 This instruction rotates all the bits in a specified word or byte some
number of bit positions to the right.
 The operation circular because the LSB of the operand is rotated
into the carry flag and the bit in the carry flag is rotate around into
MSB of the operand.
 RCR affects only CF and OF. OF will be a 1 after a single bit RCR
if the MSB was changed by the rotate.
 OF is undefined after the multi-bit rotate.
ROL
 ROL Destination, Count
 ROL:- used to rotate bits of byte/word towards the left, i.e.
MSB to LSB and to CF.
 This instruction rotates all the bits in a specified word or byte
to the left some number of bit positions.
 The data bit rotated out of MSB is circled back into the LSB.
 It is also copied into CF.
 ROL affects only CF and OF. OF will be a 1 after a single bit
ROL if the MSB was changed by the rotate.
ROR
 ROR Destination, Count
 ROR:- used to rotate bits of byte/word towards the right, i.e.
LSB to MSB and to CF.
 This instruction rotates all the bits in a specified word or byte
some number of bit positions to right.
 The operation is desired as a rotate rather than shift, because
the bit moved out of the LSB is rotated around into the MSB.
 The data bit moved out of the LSB is also copied into CF.