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Tutorial VHDL- part1

This tutorial introduces the implementation of digital circuits on FPGAs using VHDL. It covers the FPGA design flow, popular programming tools like Quartus and Xilinx ISE, and the basic structure of VHDL including entity declaration and architecture body. The tutorial also outlines different models of architecture such as behavioral, data flow, and structural models.

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ŪDhruv Sarin
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3 views

Tutorial VHDL- part1

This tutorial introduces the implementation of digital circuits on FPGAs using VHDL. It covers the FPGA design flow, popular programming tools like Quartus and Xilinx ISE, and the basic structure of VHDL including entity declaration and architecture body. The tutorial also outlines different models of architecture such as behavioral, data flow, and structural models.

Uploaded by

ŪDhruv Sarin
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Tutorial-2

VHDL Intro
Part-1
Overview
A digital circuit can be implemented :
• (1) as an application specific integrated circuit
• (2) on a programmable device like field
programmable gate array (FPGA)
In this tutorial we will discuss how a digital
circuit is implemented on FPGA and which
language and tool can be used to do so.
FPGA
• First we need to understand what is FPGA?
• FPGA: Field Programmable Gate Array
Popular Tools used for programming
FPGA
• Quartus from Intel
• Xilinx ISE from Xilinx
What you have to do?
• Download Quartus v20.1.1 (Lite edition) for
windows or Linux operating system from the
following link:
• https://fpgasoftware.intel.com/20.1.1/?editio
n=lite&platform=windows.
FPGA Design Flow
Design entry using VHDL
or Verilog or schematic Behavioural
simulation

Synthesis Functional
simulation

Implementation Timing
simulation

Bitstream file

FPGA
programming
VHDL : VHSIC Hardware Description
Language
It looks similar as conventional programming
languages, however it is different.
Important differences:
• Inherently parallel
• Mimics the behaviour of a physical (digital)
system
• Describes system as an interconnection of
different components
Basic Structure

Interface (entity
declaration)

Ports
Body
(Architecture)
Entity Declaration

entity NAME_OF_ENTITY is
port (signal_names: mode type;
signal_names: mode type;
:
signal_names: mode type);
end [NAME_OF_ENTITY] ;
Architecture body
architecture architecture_name of NAME_OF_ENTITY is
-- Declarations
-- components declarations
-- signal declarations
-- constant declarations
-- function declarations
-- procedure declarations

begin
-- Statements

end architecture_name;
Different models of architecture
• Behavioural model
• Data flow model
• Structural model
Behavioural model

• architecture behavioral of NAME_OF_ENTITY is


• begin
• Process (sensitivity list)
• ---
• ---
• End process;
• end behavioral;
VHDL Code of 4:1 Mux

“00”
01
10
11
Next Tutorial
• Data flow model
• Structural Model

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