Implementation of a 4-Stage Audio Amplifier

Pa.Kiruba Pranav Shankar

2023112010 2023112011
[email protected] [email protected]
March 20, 2025

own functionality and is well explained in up-

coming sections.
Abstract
2.1 Preamplifier stage
This paper presents the design and
implementation of an efficient audio The preamplifier (preamp) is essentially an
amplifier that delivers high-quality amplifier before the gain stage. One might find
sound with minimal distortion. This this redundant as the gain stage essentially
amplifier can be used in home en- does the same, i.e, provide a larger gain. We
tertainment systems, musical equip- could instead use only the gain stage instead of
ment, and communication devices, compounding the net gain over two stages. In
highlighting its versatility and prac- practical applications, the audio input signal
tical significance. is modified (processed) before it is sent to a
filter. Processing usually entails adjusting the
1 Introduction frequency response to boost certain frequency
bands while attenuating others and cannot be
An audio amplifier is an essential electronic directly performed on the input signal (which
device designed to increase the power of an is of a few millivolts) directly received from a
audio signal, enabling it to drive speakers microphone. Hence, a preamp is required to
and produce sound at a desired volume. Key bring the input signal to ’line level.’
considerations include frequency response,
signal-to-noise ratio, and total harmonic 2.1.1 Simulation
distortion to ensure reliable performance in
Applying Kirchoff’s Current law at point X
various audio applications. The design is
in small signal analysis circuit, we get
evaluated through simulations and practical
testing, demonstrating its effectiveness in Vx = 2(gm Vπ )RE
providing clear and amplified audio output.
Now as the voltage drop across the resistor Rπ
Note: We’ve uploaded the circuit diagrams, is Vπ . So we get
pics and video of the working hardware in a
Vx = Vin − Vπ
Drive folder. You can access it by clicking here
and across the resistor RC2 we get
2 Stages
−Vout = gm Vπ Rc2
Our audio amplifier can be broken down
into 4 stages, namely, the preamp, gain, fil- Now taking Vin , Vx and Vout as three vari-
ter and power amp stage. Each stage has its ables, we can solve the above three equations

1
to get 2.1.2 Hardware
2gm Vπ RE = (Vin − Vπ ) The typical differential amplifier’s works
Vin with a signal consisting of a common level sig-
Vπ = nal (DC bias) with a differential signal (AC
1 + 2gm RE
small signal). The bases of the transistors in a
Vout −gm RC2 diff amp are fed with signals of the same com-
=
Vin 1 + 2gm RE mon level but a π radian phase delayed dif-
ferential signal. The motive behind this is to
utilize the nature of the differential amplifier,
i.e, difference of the two inputs at the base and
amplify it, effectively allowing us to subtract
the common level and double and amplify the
differential signal. Noise, which is common to
both inputs (channels) is also effectively miti-
gated. The common-mode (DC bias) must be
picked such that the BJT always operates in
the desired mode of operation, which is for-
ward active in our case.

Figure 1: Small signal analysis of pre-amplifier

stage

Now, as we had to maintain symmetry in

our circuit RC1 and RC2 would be same and
accordingly toke RC = 500Ω and RE = 2.5Ω.
After playing with values for some time we fi-
nalized RC to be 550Ωand RE to be 2.3Ω

Figure 3: Pre-Amp circuit stage, i.e, single-

ended differential amp

In hardware this stage consists of a differ-

ential amplifier with microphone output set
up in common mode setup, i.e, as input to
the base of one BJT and grounding the base
of another BJT as in real life we cannot get
Figure 2: Circuit diagram of simulation 180◦ phase shifted of our input immediately.
In our case we didn’t readily have a phase- > The emitter resistor RE provides negative
shifted version of the input signal and had to feedback, enhancing stability and setting
resort to a single-ended input. A single-ended the voltage gain.
input topology is essentially feeding the input
signal, which is the common mode with the > The bypass capacitor CE improves gain
AC small signal to one of the bases, while the by shorting RE for AC signals.
other base is fed just the common mode (DC
> The collector resistor RL determines the
bias). As illustrated in the diagram, we con-
voltage gain and aids in amplification.
nected the base of one transistor to ground
(zero DC bias) from which we are taking the > The output coupling capacitor C2 blocks
output from its collector. Moreover, since the DC while passing the amplified AC signal
output of the circuit is proportional to the dif- to the next stage.
ference between the inputs, we have connected
one end to ground, which cuts the input differ- > The power supply VCC provides the nec-
ence in half and, consequently, the output in essary voltage for transistor operation.
half. To control the gain, we double the value
of Rc , which doubles the gain and returns the The CE amplifier operates in two main stages:
initial gain of the simulation. DC biasing and AC signal amplification. The
Later on we resolved the problem of filter voltage divider biasing using RB1 and RB2 es-
stage our overall gain was crossing 500 due to tablishes the base voltage VB , given by:
which we could observe clipping in higher in-  
RB2
put voltages, so we had to reduce RC value to VB = VCC (1)
RB1 + RB2
900Ω.
Gain through this stage = 18. The emitter voltage is given by:

2.2 Gain Stage VE = VB − VBE (2)

A common-emitter (CE) amplifier is known where VBE was found out to be around 0.55.
for its ability to provide voltage amplification The collector voltage is:
with a phase inversion. The circuit consists
of a bipolar junction transistor (BJT) with es- VC = VCC − IC RL (3)
sential passive components that enable stable
operation and signal amplification. It provides This biasing ensures that the transistor re-
high gain, phase inversion, and stable opera- mains in active mode, allowing signal ampli-
tion due to negative feedback from RE . The fication.
use of coupling and bypass capacitors improves When an AC signal is applied through C1 ,
frequency response and gain. The CE ampli- it modulates the base voltage. An increase in
fier consists of the following key components: base voltage causes an increase in base current
IB , which leads to a larger collector current IC .
> The input signal VS is the AC signal that This, in turn, results in a greater voltage drop
needs to be amplified. across RL , reducing VC . Conversely, when the
base voltage decreases, the collector voltage
> The coupling capacitor C1 blocks DC and increases. This variation in VC results in an
allows only the AC signal to pass to the amplified output that is π rads out of phase
transistor’s base. with the input signal.
The voltage gain Av of the CE amplifier can
> The resistor divider network RB1 and
be approximated as:
RB2 provides a stable DC bias to the tran-
sistor, ensuring that it operates in the ac- RL
tive region. Av = − (4)
RE
The negative sign indicates a phase inversion
between input and output. If the bypass ca-
pacitor CE is present, the gain increases and
is given by:
RL
Av = − (5)
re
where re is the small-signal emitter resistance.

2.2.1 Simulation
We had to ensure that Base-Emitter junc-
tion is always in forward biased and to do so we
initially took the resistance values to be 63kΩ
and 7kΩ. But for input of 20mV there was
time when our Base-Emitter junction was go-
ing in reverse biased, so we had to later change
it to 60.8KΩ.
Later we assumed that collector voltage is
0mV and collector current (IC ) = 1mA. Us-
ing these assumptions we got RC = 5kΩ.
We know that the voltage drop across base-
emitter junction is approximately 650mV
which meant the rest voltage would drop be-
tween RE1 and RE2 .
Small signal collector current (ic ) = VRout
c

4
ic = = 0.8mA
5k
VBE +vbe
As we know Ic + ic = IS e VT

IC + ic
vbe = VT ln( ) Figure 4: Simulation of CE amplifier
IC

1.8
vbe = 26.1mV × ln( ) = 15.28mV
1
VBias −VBE
Total Emitter Resistance RE = IC

(1 − 0.65)V 2.2.2 Hardware

RE = = 350Ω
1mA
VinputAM P LIT U DE − vbe
R E1 = We tried to keep the resistance value as
ic
close as we can as we used in the simulation. In
180 − 15 the voltage divider in the simulation we were
RE1 = = 206Ω
0.8 getting best result for 60.8kΩ and 7kΩ, but
in the hardware we got better result for 60kΩ
RE2 = (350 − 206)Ω = 144Ω
and 7kΩ. Here all the rest of the value are
After playing for sometime we got RE = 174Ω same as simulation except RC = 74Ω.
and 56Ω and RC = 3.6kΩ Gain through this stage = 27 at 1KHz.
 2.3.1 Deriving frequency cutoff of the
filter
The transfer function of this filter is ob-
tained to be:
sC1 R2
Av = −
(1 + sC2 R2 )(1 + sC1 R1 )
Imposing the condition that we need 0dB
in the passband, we get the equation:

R2 ωC1
log =0
(1 + jωC1 R1 )(1 + jωR2 C2 )

Figure 5: Gain stage i.e. CE amplifier ωC1 R2

p p =1
1+ ω C1 R12 1
2 2 + ω 2 C22 R22
2.3 Active Band-pass Filter
Now, in the pass-band region, ω ≫ R11C1 ,
An Active Band-pass Filter is a filter with and ω ≪ R21C2 , we get the simplification that
active components like op amps, and transis- the first term in the denominator reduces to
tors that allow a specific range of frequencies ωC1 R1 and the second term reduces to 1, thus
to pass and attenuates other frequencies de- giving us the condition R1 = R2 .
pending upon the value of capacitor and resis- We selected the cutoff frequencies to be
tor. By including active components, we are lesser than 20Hz for the HPF, and greater than
able to make-up for the gain lost across the 20kHz for the LPF so that the attenuation for
filter stage by passive components at the ex- these frequencies is minimal. The cutoff fre-
pense of power consumption. quency is given by the formula, fc = 2πRC1
.
For audio application, we’ve chosen lower The cutoff frequencies are the frequencies at
frequency bound of 20Hz and upper frequency which the half-power point i.e, the -3dB point
bound of 20kHz. We’ve done this by picking is obtained.
resistance and capacitance values that follow The transfer function of the low-pass filter
the relation below section (RC pair) in the active bandpass filter
1 1 is given by
fL = , fU =
2πRL CL 2πRU CU R2
HLPF (s) =
Here, RL , CL are the resistance and capaci- R1 (1 + jωC2 R2 )
tance that are in parallel to each other in be- At the cutoff frequency corresponding to
tween the input and output of the op-amp the LPF, i.e, higher cutoff frequency fH , the
√
while RU , CU are the resistance and capaci- denominator’s magnitude is 2:
tance in series with each other connected to
the op amp negative input terminal. 1 + (ωH C2 R2 )2 = 2
Since we’re handling an audio amplifier, 1
we’d wish for a maximally flat-band in the ωH =
R2 C 2
pass-band region, i.e, f ∈ [20, 20k] Hz. This 1
is of much more importance than the roll-off. fH =
2πR2 C2
Our filter implementation is a primitive solu-
tion. Better solutions exist but are more com- The transfer function of the high-pass filter
plex. section (RC pair) in the active bandpass filter
is given by to do impedance matching or use buffer which
we were instructed to forbid adding a buffer,
R1 thus we came up with the ideas of employing
HHPF (s) = 1
R1 + jωC 1
a pseudo-buffer or extremely high resistance.
jωC1 R1 These method proved itself effective are we got
HHPF (s) = a gain of 440 at 5KHz and input of 20mV .
1 + jωC1 R1
We again repeated the calculation with high
At the cutoff frequency corresponding to resistance value of 380kΩ and got capacitance
the HPF, i.e, lower cutoff frequency
√ fL , the value of 20nF and 15pF .
denominator’s magnitude is 2:

1 + (ωL C1 R1 )2 = 2
1
ωL =
R1 C 1
1
fL =
2πR1 C1

2.3.2 Simulation

Figure 7: Second order Active Band-pass Fil-

ter

2.4 Power Amplifier stage

A power amplifier is used to increase the
power level of a weak audio or radio frequency
signal so that it can drive high-power loads
such as speakers, transmitters, or other out-
put devices. Thus, we require a power amp to
drive a speaker of 7Ω resistance. We’ve imple-
mented a variation of the Class AB amplifier
(refer to the figure below). Class AB ampli-
fiers are a combination of class A and class B
amplifiers. There is an inherent tradeoff be-
tween different power amplifier classes.
Class A Amplifiers are the most common
type of amplifier topology as they use just one
Figure 6: Simulation diagram for the filter output switching transistor (Bipolar, MOS-
FET, etc) within their amplifier design. This
2.3.3 Hardware
single output transistor is biased around the
When the filter was disconnected from the Q-point within the middle of its load line and
gain stage, we were receiving 320 at the gain so is never driven into its cut-off or satura-
stage’s output when creating the diagram. As tion regions thus allowing it to conduct current
soon as we linked the filter stage to the gain over the full 360 degrees of the input cycle.
stage, the gain at the gain stage decreased to Then the output transistor of a class-A topol-
about 270. We discovered after some trial ogy never turns “OFF” giving rise to thermal
and error that this is because of the filter stability issues which is one of its main disad-
stage’s impedance at the gain stage. We had vantages.
 Class B amplifiers were invented as a so-
lution to the efficiency and heating problems
associated with the previous class A amplifier.
The basic class B amplifier uses two compli-
mentary transistors either bipolar of MOSFET
for each half of the waveform with its output
stage configured in a “push-pull” type arrange-
ment, so that each transistor device amplifies
only half of the output waveform. However,
the price paid for the improvement in the ef-
ficiency is in the linearity of the switching de-
vice.

The class AB amplifier is a variation of

a class B amplifier as described above, ex-
cept that both devices are allowed to con-
duct at the same time around the waveforms
crossover point eliminating the crossover dis-
tortion problems of the previous class B am-
plifier.

Class AB amplifiers are designed to reduce

the less efficiency problem of class A amplifiers Figure 8
and distortion of signal at crossover region in
class B amplifiers. It maintains high frequency
response like in class A amplifiers and good ef- 2.4.2 Hardware
ficiency as in class B amplifiers. A combina-
tion of diodes and resistors are used to provide
little bias voltage which reduces the distortion
of waveform near the crossover region. We get
a efficiency of approximately 60%.

2.4.1 Simulation

When we were using resistor between the

bases in our simulation the voltage between
the bases of npn transistor and pnp transistor
was below the twice of cut-off voltage. Due to
this our npn transistor was in reverse active
region and pnp in cut-off region and the cur-
rent drawn through them was very low. So, to Figure 9: Class AB Power Amplifier
resolve this problem we decided to use three
diode with total voltage drop across these For hardware we got IN4148 diode which
diodes to be as close as that of the transistor. had a voltage drop of 0.7V which was very
close to voltage drop between the base and 2.6.1 1kHz and 10mV
emitter junction of T IP 31C and T IP 32C
transistor, so we had to use only two of them
in our power amplifier. In order to prevent our
transistor from breaking down, we also had to
install a heat sink in our power amplifier.

2.5 Extra components in Hardware

2.5.1 Microphone
The microphone output is given to the base
of npn transistor present at Pre-amp stage.
Figure 11: Pre Amplifier Stage

Figure 12: Gain Stage

Figure 10: Microphone Circuit diagram

2.5.2 Speaker
To observe the amplified version of micro-
phone input we are using a speaker with resis-
tance of 6Ω.
Figure 13: Filter Stage
2.5.3 Voltage Regulator
We are also using 7805 and 7905 voltage
regulator to maitain voltage at +5 and -5 Volt
respectively from the input of +12V and -12V.

2.6 Results plotted on the DSO

PFA images of the plots of inputs and
outputs at different frequencies and the am-
plitudes. We’ve varied amplitudes between
10mV and 20mV and frequency between 1kHz,
5kHz, 20kHz. The input has been plotted in
yellow and output has been plotted in green. Figure 14: Power Amplifier stage
2.6.2 1kHz and 20mV 2.6.3 5kHz and 10mV

Figure 15: Pre Amplifier Stage Figure 19: Pre Amplifier Stage

Figure 16: Gain Stage Figure 20: Gain Stage

Figure 17: Filter Stage Figure 21: Filter Stage

Figure 18: Power Amplifier stage Figure 22: Power Amplifier stage
2.6.4 5kHz and 20mV 2.6.5 20kHz and 10mV

Figure 23: Pre Amplifier Stage Figure 27: Pre Amplifier Stage

Figure 24: Gain Stage Figure 28: Gain Stage

Figure 25: Filter Stage Figure 29: Filter Stage

Figure 26: Power Amplifier stage Figure 30: Power Amplifier stage
2.6.6 20kHz and 20mV

Figure 35: Slew Rate

Figure 31: Pre Amplifier Stage Total THD is 9.88%

Figure 36: THD calculated

2.8 References
1. Electronic Tutorials
2. Differential Amplifiers - M.D. Patil, IIT
Figure 32: Gain Stage Bombay

3. Microelectronic Circuits - Sedra & Smith

Figure 33: Filter Stage

Figure 34: Power Amplifier stage

2.7 THD and Slew Rate

Slew Rate measured on simulation is

28.50KV/s