BIUST

MICROCONTROLLERS

Lecture 01: Chapter 03

PIC Introduction
Adopted from - ECE 3724 - Microprocessors
Microcontroller (µC) vs. Microprocessor (µP)
• µC intended as a single chip solution, µP requires external
support chips (memory, interface)
• µC has on-chip non-volatile memory for program storage,
µP does not.
• µC has more interface functions on-chip (serial interfaces,
analog-to-digital conversion, timers, etc.) than µP
• µC does not have virtual memory support (i.e., could not
run Linux), while µP does.
• General purpose µPs are typically higher performance
(clock speed, data width, instruction set, cache) than µCs
• Division between µPs and µCs becoming increasingly
blurred

V 0.2 2
 Microchip PIC24 Family µC
Features Comments
Instruction width 24 bits

On-chip program memory (non- PIC24HJ32GP202 has 32Ki bytes/11264

volatile, electrically erasable) instructions, architecture supports
24Mibytes/4Mi instructions)
On-chip Random Access Memory PIC24HJ32GP202 has 2048 bytes,
(RAM) , volatile architecture supports up 65536 bytes
Clock speed DC to 80 MHz

16-bit Architecture General purpose registers, 71 instructions

not including addressing mode variants
On-chip modules Async serial IO, I2C, SPI, A/D, three 16-
bit timers, one 8-bit timer, comparator

V 0.2 3
 PIC24 Core (Simplified Block Diagram)
Data Mem
Program Counter 24
Inst. Reg
23 16 address
Data
address 16
Program Memory,
non-volatile, up to 16 x 16
16
Working
4M words (4M x 24) Reg array 16
DOUT
16
16
The instruction register contains the machine
code of the instruction currently being ALU
executed.
ALU (Arithmetic Logic Unit) is 16 bits wide, 16
can accept as operands working registers or
data memory. 17 x 17 Multiplier
not shown
V 0.2 4
 Memory Organization
Memory on the PIC24 µC family is split into two types:
Program Memory and Data Memory.
PIC24 instructions are stored in program memory, which is
non-volatile (contents are retained when power is lost).
A PIC24 instruction is 24 bits wide (3 bytes).
PIC24HJ32GP202 program memory supports 11264
instructions; the PIC24 architecture can support up to 4M
instructions.
PIC24 data is stored in data memory, also known as the file
registers, and is a maximum size of 65536 x 8. Data memory
is volatile (contents are lost when power is lost).

V 0.2 5
 Program Memory

Locations 0x000000- 0x0001FF reserved, User program

starts at location 0x000200.

Copyright Delmar Cengage Learning 2008. All RightsReserved.

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Data Memory Organization
Data memory for
PIC24HJ32GP202

V 0.2 6
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Special Function Registers (SFRs)

Special Function Registers (SFR) are addressed like normal data memory
locations but have specified functionality tied to hardware subsystems in the
processor. We typically refer to SFRs by name (W0, T3CON, STATUS, etc)
instead of by address.
There are many SFRs in the PIC24 µC – they are used as control registers and
data registers for processor subsystems (like the serial interface, or the analog-
to-digital converter). We will cover their use and names as we need to.
SFRs live in the address range 0x0000 to 0x07FE in data memory. See the
datasheet for a complete list of SFRs.
Other locations in data memory that are not SFRs can be used for storage of
temporary data; they are not used by the processor subsystems. These are
sometimes referred to as GPRs (general purpose registers). MPLAB refers to
these locations as file registers.

V 0.2 8
 8-bit, 16-bit, 32-bit Data
We will deal with data that is 8 bits, 16 bits (2 bytes), and
32 bits (4 bytes) in size. Initially we will use only 8 bit and
16 bit examples.
Size Unsigned Range
8-bits 0 to 28-1 (0 to 255, 0 to 0xFF)
16-bit 0 to 216-1 (0 to 65536, 0 to 0xFFFF)
32-bit 0 to 232-1 (0 to 4,294,967,295), 0 to 0xFFFFFFFF)

The lower 8 bits of a 16-bit value or of a 32-bit value is

known as the Least Significant Byte (LSB).

The upper 8 bits of a 16-bit value or of a 32-bit value is

known as the Most Significant Byte (MSB).
V 0.2 9
 Storing Multi-byte Values in Memory
16-bit and 32-bit values are stored in memory from least
significant byte to most significant byte, in increasing memory
locations (little endian order).

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.2 9
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Data Transfer Instruction
Copies data from Source (src) location to Destination (dst)
Location
(src) → dst ‘()’ read as ‘contents of’

This operation uses two operands.

The method by which an operand ADDRESS is specified is
called the addressing mode.
There are many different addressing modes for the PIC24.
We will use a very limited number of addressing modes in our
initial examples.
 Data Transfer Instruction Summary
Dest Memory Register direct Register indirect
Source
Literal X MOV{.B} #lit8/16, Wnd X
lit → Wnd
MOV fALL, Wnd
Memory X MOV{.B} f, {WREG} X
(f{ALL}) → Wnd/WREG
Register MOV Wns, fALL MOV{.B} Wso, Wdo MOV{.B} Wso, [Wdo]
direct MOV{.B} WREG, f (Wso) → Wdo (Wso) → (Wdo)
(Wns/WREG) → f{ALL}
Register X MOV{.B} [Wso], Wdo MOV{.B} [Wso], [Wdo]
indirect ((Wso)) → Wdo ((Wso)) → (Wdo)
Key: Yellow shows
MOV{.B} #lit8/16, Wnd PIC24 assembly varying forms of the
lit → Wnd Data transfer same instruction

f: near memory (0…8095) fALL: all of memory (0…65534)

 MOV{.B} Wso, Wdo Instruction
“Copy contents of Wso register to Wdo register ”. General form:
mov{.b} Wso, Wdo (Wso) → Wdo
Wso is one of the 16 working registers W0 through W15 (‘s’ indicates Wso is an
operand source register for the operation).
Wdo is one of the 16 working registers W0 through W15 (‘d’ indicates Wdo is
an operand destination register for the operation).
mov W3, W5 (W3) → W5 (word operation)
mov.b W3, W5 (W3.LSB) → W5.LSB (byte operation)

Contents of working register W3 copied to working register W5.

This can either be a word or byte operation. The term ‘copy’ is used here
instead of ‘move’ to emphasize that Wso is left unaffected by the operation.

The addressing mode used for both the source and destination
operands is called register direct. The mov instruction supports
other addressing modes which are V 0.2not shown. 12
 MOV Wso, Wdo Instruction Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wso, Wdo Instruction Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wso, Wdo Instruction Format

Copyright Delmar Cengage Learning 2008. All RightsReserved.

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wns, f Instruction
“Copy contents of Wns register to data memory location f. ”
General form:
MOV Wns, f (Wns) → f
f is a memory location in data memory, Wns is one of the 16 working
registers W0 through W15 (‘s’ indicates Wns is an operand source register
for the operation)
MOV W3, 0x1000 (W3) → 0x1000
Contents of register W3 copied to data memory location 0x1000. This
instruction form only supports WORD operations.

The source operand uses register direct addressing, while the

destination operand uses file register addressing.
File registers is how Microchip refers to data memory.

V 0.2 15
 MOV Wns, f Instruction Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.2 16
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wns, f Instruction Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.2 16
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wns, f Instruction Format

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.2 17
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Wns, f Instruction Format

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.2 17
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV f, Wnd Instruction
“Copy contents of data memory location f to register Wnd”.
General form:
MOV f, Wnd (f) → Wnd
f is a memory location in data memory, Wnd is one of the 16
working registers W0 through W15 (‘d’ indicates Wnd is an
operand destination register for the operation).
MOV 0x1000, W3 (0x1000) → W3
Contents of data memory location 0x1000 copied to W3.
() is read as “Contents of”.

This instruction form only supports a word operation.

V 0.2 18
 MOV f, Wnd Instruction Execution

V 0.2 19
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV f, Wnd Instruction Execution

V 0.2 19
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 A Note on Instruction Formats
• The instruction formats (machine code) of some
instructions will be presented for informational
purposes
– However, studying the machine code formats of the
instructions is not a priority; understanding instruction
functionality will be emphasized.
– All instruction formats can be found in the
dsPIC30F/dsPIC33F Programmers Reference manual
from Microchip
– The PIC24 family is a subset of the
dsPIC30F/dsPIC33FF instruction set – the PIC24
family does not implement the DSP instructions.

V 0.2 20
 MOV{.B} WREG, f Instruction
“Copy content of WREG (default working register) to data memory
location f”. General form:
MOV{.B} WREG, f (WREG) → f
This instruction provides upward compatibility with earlier PIC µC.
WREG is register W0, and f is a location within the first 8192 bytes of data
memory (near data memory)
MOV WREG, 0x1000 (W0) → 0x1000
Contents of register W0 copied to data memory location 0x1000.
Can be used for either WORD or BYTE operations:
MOV WREG, 0x1000 word operation
MOV.B WREG, 0x1001 lower 8-bits of W0 copied to 0x1001
Word copy must be to even (word-aligned) location.
Note: The previously covered MOV Wns, f instruction cannot be used for
byte operations! V 0.2 21
 MOV.B WREG, f Instruction Execution

A byte copy operation is shown.

Copyright Delmar Cengage Learning 2008. All RightsReserved.
V 0.2 22
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV.B WREG, f Instruction Execution

A byte copy operation is shown.

Copyright Delmar Cengage Learning 2008. All RightsReserved.
V 0.2 22
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV{.B} WREG, f Instruction Format

V 0.2 23
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV{.B} WREG, f Instruction Format

V 0.2 23
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV{.B} f {,WREG} Instruction
“Copy contents of data memory location f to WREG (default working
register) . General form:
MOV{.B} f, WREG (f )→ WREG
MOV{.B} f (f )→ f
This instruction provides upward compatibility with earlier PIC µC.
WREG is register W0, and f is a location within the first 8192 bytes of data
memory (near data memory)
Can be used for either WORD or BYTE operations:
MOV 0x1000, WREG word operation
MOV.B 0x1001, WREG only lower 8-bits of W0 are affected.
MOV 0x1000 Copies contents of 0x1000 back to
itself, will see usefulness of this later
Word copy must be from even (word-aligned) data memory location.
Note: The MOV f,Wnd instruction cannot be used for byte operations!
V 0.2 24
 MOV{.B} f {,WREG} Format

V 0.2 32
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV{.B} f {,WREG} Format

V 0.2 33
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV.{B} f, WREG Instruction Execution

V 0.2 34
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV.{B} f, WREG Instruction Execution

V 0.2 35
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Move a literal into a Working Register
Moves a literal into a working register. The ‘#’ indicates the
numeric value is a literal, and NOT a memory address.
General form:
MOV #lit16, Wnd lit16 → Wnd (word operation)
MOV.B #lit8, Wnd lit8 → Wnd.lsb (byte operation)

The source operand in these examples use the immediate

addressing mode.
Examples:
MOV #0x1000, W2 0x1000 → W2
MOV.B #0xAB, W3 0xAB → W3.lsb

V 0.2 27
 More on Literals

Observe that the following two instructions are very different!

MOV #0x1000, W2 after execution, W2=0x1000

MOV 0x1000,W2 after execution, W2 = (0x1000),

the contents of memory
location 0x1000
 MOV Literal Execution

V 0.2 29
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Literal Execution

V 0.2 29
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Literal Instruction Formats

Copyright Delmar Cengage Learning 2008. All RightsReserved. V 0.2 30

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 MOV Literal Instruction Formats

Copyright Delmar Cengage Learning 2008. All RightsReserved. V 0.2 30

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Indirect Addressing
Mov with indirect Addressing:
mov{.b} [Wso], [Wdo] ((Wso)) → (Wdo)
[] (brackets) indicate indirect addressing.
Source Effective Address (EAs) is the content of Wso, or (Wso).
Destination Effective Address (EAd) is the content of Wdo, or
(Wdo).
The MOV instruction copies the content of the Source Effective
Address to the Destination Effect Address, or:
(EAs) → EAd
which is:
((Wso)) → (Wdo)
Indirect Addressing
MOV Example
 Indirect Addressing
MOV Example

Copyright Delmar Cengage Learning 2008. All RightsReserved.

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Why Indirect Addressing?
The instruction:
mov [W0], [W1]
Allows us to do a memory-memory copy with one instruction!
The following is illegal:
mov 0x1000, 0x1002
Instead, would have to do:
mov 0x1000, W0
mov W0, 0x1002

V 0.2 33
 Indirect Addressing Coverage
• There are six forms of indirect addressing
• The need for indirect addressing makes the most
sense when covered in the context of C pointers
– This is done in Chapter 5
• At this time, you will only need to understand the
simplest form of indirect addressing, which is
register indirect as shown on the previous two slides.
• Most instructions that support register direct for an
operand, also support indirect addressing as well for
the same operand
– However, must check PIC24 datasheet and book to
confirm.
 ADD{.B} Wb, Ws, Wd Instruction
Three operand addition, register-to-register form:
ADD{.B} Wb, Ws, Wd (Wb) + (Ws) → Wd
Wb, Ws, Wd are any of the 16 working registers W0-W15

ADD W0, W1, W2 (W0) + (W1) → W2

ADD W2, W2, W2 W2 = W2 + W2 = W2*2

ADD.B W0, W1, W2 Lower 8 bits of W0, W1

are added and placed in the
lower 8 bits of W2

V 0.2 35
ADD{.B} Wb, Ws, Wd Execution

V 0.2 36
 ADD{.B} Wb, Ws, Wd Execution
(a) Execute: add W0,W1,W2
W0 0x1AF3 0x1AF3 W0 0x1AF3
W1 0x8B1A + 0x8B1A W1 0x8B1A
W2 0x64DE W2 0xA60D Modified
W3 0xFB90 0xA60D W3 0xFB90
Before After

(b) Execute: add.b W0,W1,W2

W0 0x1A F3 0xF3 W0 0x1A23
W1 0x8B 1A + 0x1A W1 0x8B1A
W2 0x64DE W2 0x64 0D Modified
W3 0xFB90 0x0D
W3 0xFB90
Result limited
Before to 8-bits! After

(c) Execute: add W2,W2,W2

W0 0x1AF3 0x64DE W0 0x1AF3
W1 0x8B1A + 0x64DE W1 0x8B1A
W2 0x64DE W2 0xC9BC Modified
W3 0xFB90 0xC9BC W3 0xFB90
Before After
Copyright Delmar Cengage Learning 2008. All RightsReserved.
V 0.2 36
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 SUB{.B} Wb, Ws, Wd Instruction
Three operand subtraction, register-to-register form:
SUB{.B} Wb, Ws, Wd (Wb) – (Ws) → Wd

Wb, Ws, Wd are any of the 16 working registers W0-W15.

Be careful:
while ADD Wx, Wy, Wz gives the same result as ADD Wy, Wx, Wz
The same is not true for

SUB Wx, Wy, Wz versus SUB Wy, Wx, Wz

SUB W0, W1, W2 (W0) – (W1) → W2

SUB W1,W0, W2 (W1) – (W0) → W2

SUB.B W0, W1, W2 Lower 8 bits of W0, W1 are subtracted

and placed in the lower 8-bits of W2
V 0.9 3377
 SUB{.B} Wb, Ws, Wd Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.9 38
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 SUB{.B} Wb, Ws, Wd Execution

Copyright Delmar Cengage Learning 2008. All RightsReserved.

V 0.9 38
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Subtraction/Addition with Literals
Three operand addition/subtraction with literals:
ADD{.B} Wb, #lit5, Wd (Wb) – #lit5 → Wd
SUB{.B} Wb, #lit5, Wd (Wb) – #lit5 → Wd
#lit5 is a 5-bit unsigned literal; the range 0-31. Provides a
convenient method of adding/subtracting a small constant
using a single instruction
Examples
ADD W0, #4, W2 (W0) + 4 → W2
SUB.B W1,#8, W3 (W1) – 8 → W3
ADD W0, #60, W1 illegal, 60 is greater than 31!
 ADD{.B} f {,WREG} Instruction
Two operand addition form:
ADD{.B} f (f) + (WREG) → f
ADD{.B} f, WREG (f) + (WREG) → WREG
WREG is W0, f is limited to first 8192 bytes of memory.
One of the operands, either f or WREG is always destroyed!

ADD 0x1000 (0x1000) + (WREG) → 0x1000

ADD 0x1000,WREG (0x1000) + (WREG) → WREG

ADD.B 0x1001, WREG (0x1001) + (WREG.lsb) → WREG.lsb

V 0.2 54
 Assembly Language Efficiency
The effects of the following instruction:
ADD 0x1000 (0x1000) + (WREG) → 0x1000
Can also be accomplished by:

MOV 0x1000 , W1 (0x1000) → W1

ADD W0, W1, W1 (W0) + (W1) → W1
MOV W1, 0x1000 (W1) → 0x1000

This takes three instructions and an extra register. However, in

this class we are only concerned with the correctness of your
assembly language, and not the efficiency. Use whatever
approach you best understand!!!!!

V 0.2 55
 ADD{.B} f {,WREG} Execution

V 0.2 42
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 ADD{.B} f {,WREG} Execution

V 0.2 42
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 SUB{.B} f {,WREG} Instruction
Two operand subtraction form:
SUB{.B} f (f) – (WREG) → f
SUB{.B} f, WREG (f) – (WREG) → WREG
WREG is W0, f is limited to first 8192 bytes of memory.
One of the operands, either f or WREG is always destroyed!

SUB 0x1000 (0x1000) – (WREG) → 0x1000

SUB 0x1000,WREG (0x1000) – (WREG) → WREG

SUB.B 0x1001, WREG (0x1001) – (WREG.lsb) → WREG.lsb

V 0.92 43
 Increment
Increment operation, register-to-register form:
INC{.B} Ws, Wd (Ws) +1 → Wd
Increment operation, memory to memory/WREG form:
INC{.B} f (f) + 1 → f
INC{.B} f, WREG (f) + 1 → WREG
(f must be in first 8192 locations of data memory)
Examples:
INC W2, W4 (W2) + 1 → W4
INC.B W3, W3 (W3.lsb) + 1 → W3.lsb
INC 0x1000 (0x1000) +1 → 0x1000

INC.B 0x1001,WREG (0x1001)+1 → WREG.lsb

V 0.2 44
 Decrement
Decrement operation, register-to-register form:
DEC{.B} Ws, Wd (Ws) – 1 → Wd
Decrement operation, memory to memory/WREG form:
DEC{.B} f (f) – 1 → f
DEC{.B} f, WREG (f) – 1 → WREG
(f must be in first 8192 locations of data memory)
Examples:
DEC W2, W4 (W2) – 1 → W4
DEC.B W3, W3 (W3.lsb) – 1 → W3.lsb
DEC 0x1000 (0x1000) – 1 → 0x1000
DEC.B 0x1001,WREG (0x1001) – 1 → WREG.lsb
V 0.9 45
 How is the instruction register loaded?
Data Mem
Program Counter 24
Inst. Reg
23 16 address
Data
16
address
Program Memory,
16 x 16
non-volatile, up to 16
Working
4M words (4M x 24)
Reg array 16
DOUT
16
16
The Program counter contains the program
memory address of the instruction that will be ALU
loaded into the instruction register . After
reset, the first instruction fetched from location
16
0x000000 in program memory, i.e., the
program counter is reset to 0x000000. 17 x 17 Multiplier
not shown
V 0.92 46
 Program Memory Organization

An instruction is 24 bits (3 bytes). Program memory should be

viewed as words (16-bit addressable), with the upper byte of
the upper word of an instruction always reading as ‘0’.
Instructions must start on even-word boundaries. Instructions
are addressed by the Program counter (PC).
V 0.2 Figure adapted with permission of the copyright owner,Microchip 47
Technology, Incorporated. All rights reserved.
 Goto location (goto)
How can the program counter be changed?

A GOTO instruction is an unconditional jump.

Copyright Delmar Cengage Learning 2008. All RightsReserved. V 0.2 63
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Goto location (goto)
How can the program counter be changed?

A GOTO instruction is an unconditional jump.

Copyright Delmar Cengage Learning 2008. All RightsReserved. V 0.2 64
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 Valid addressing modes.
What are valid addressing modes for instructions?
The definitive answer can be found in Table 19-2 of the
PIC24H32GP202 datasheet.

Copyright Delmar Cengage Learning 2008. All RightsReserved. V 0.2 65

From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
What does ‘Wso’, ‘Wsd’, ‘Wn’ etc. mean?
MOV Wso, Wdo

Table 19-1: Symbols used in opcode descriptions (partial list)

V 0.2 66
 ADD forms
ADD Wb, Ws, Wd

Legal:
ADD W0, W1, W2
ADD W0, [W1], [W4]
Illegal:
ADD [W0],W1,W2 ;first operand illegal!

V 0.2 67
 Video tutorials
A number of videos illustrate important concepts; all are listedon
the video page at http://www.reesemicro.com/site/pic24micro/Home/pic24-video-tutorials-1.
Available tutorials, which cover topics on the following pages of
these lecture notes:
• MPLAB IDE introduction at
http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/mplab_assem/index.htm

• A simple assembly language program at

http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro/index.htm

• Simulation of this program at

http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro2/index.htm

• Converting the program from 8 to 16 bits at

http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro3/index.htm

V 0.2 68
 A Simple Program
In this class, will present programs in C form, then translate
(compile) them to PIC24 µC assembly language.
C Program equivalent A uint8 variable is
#define avalue 100 8 bits (1 byte)
uint8 i,j,k;

i = avalue; // i = ?
i = i + 1; // i = ?
j = i; // j = ?
j = j - 1; // j = ?
k = j + i; // k = ?

V 0.2 69
 A Simple Program
In this class, will present programs in C form, then translate
(compile) them to PIC24 µC assembly language.
C Program equivalent A uint8 variable is
#define avalue 100 8 bits (1 byte)
uint8 i,j,k;

i = avalue; // i = 100
i = i + 1; // i++, i = 101
j = i; // j is 101
j = j - 1; // j--, j is 100
k = j + i; // k = 201

V 0.2 70
 Where are variables stored?
When writing assembly language, can use any free data memory
location to store values, it your choice.
A logical place to begin storing data in the first free location in
data memory, which is 0x0800 (Recall that 0x0000-0x07FF is
reserved for SFRs).
Assign i to 0x0800, j to 0x0801, and k to 0x0802. Other choices
could be made.

V 0.2 71
 C to PIC24 Assembly

Comments: The assembly language program operation is not very clear.

Also, multiple assembly language statements are needed for one C
language statement. Assembly language is more primitive (operations less
powerful) than C.
V 0.2 55
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
 C to PIC24 Assembly

Comments: The assembly language program operation is not very clear.

Also, multiple assembly language statements are needed for one C
language statement. Assembly language is more primitive (operations less
powerful) than C.
V 0.2 55
Copyright Delmar Cengage Learning 2008. All RightsReserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
PIC24 Assembly to PIC24 Machine Code
• Could perform this step manually by determining
the instruction format for each instruction from the
data sheet.
• Much easier to let a program called an assembler
do this step automatically
• The MPLAB Integrated Design
Environment (IDE) is used to assemble PIC24
programs and simulate them
– Simulate means to execute the program without
actually loading it into a PIC24 microcontroller

V 0.2 74
 .include "p24Hxxxx.inc"
.global reset
.bss
i:
;reserve space for variables
.space 1
mptst_byte.s
j: .space 1
k: .space 1
.text ;Start of Code section
reset: ; first instruction located at reset label
mov # SP_init, W15 ;;initialize stack pointer
mov # SPLIM_init,W0
mov W0,SPLIM ;;initialize Stack limit reg.
avalue = 100
; i = 100; This file can be assembled
mov.b #avalue, W0 ; W0 = 100 by the MPLAB
mov.b WREG,i ; i = 100
assembler into PIC24
; i = i + 1;
inc.b i ; i = i + 1 machine code and
; j = i simulated.
mov.b i,WREG ; W0 = i
mov.b WREG,j ; j = W0
Labels used for memory
; j = j – 1; locations 0x0800 (i),
dec.b j ; j= j – 1 0x0801(j), 0x0802(k) to
; k = j + i
mov.b i,WREG ; W0 = i increase code clarity
add.b j,WREG ; W0 = W0+j (WREG is W0)
mov.b WREG,k ; k = W0
done:
goto done ;loop forever
V 0.2 75
 Include file that defines various labels
mptst_byte.s (cont.) for a particular processor. ‘ include’ is
an assembler directive.
.include "p24Hxxxx.inc"

.global reset Declare the reset label as

global – it is is needed by linker
for defining program start
.bss ;reserve space for variables
i: .space 1
j: .space 1 The .bss assembler directive
k: .space 1 indicates the following should be
placed in data memory. By
An assembler directive is not a default, variables are placed
PIC24 instruction, but an beginning at the first free
location, 0x800. The .space
instruction to the assembler assembler directive reserves
program. Assembler directives space in bytes for the named
have a leading ‘.’ period, and are variables. i, j, k are labels, and
not case sensitive. labels are case-sensitive and
must be followed by a ‘:’(colon).
V 0.2 76
 mptst_byte.s (cont.)
.text
reset: mov # SP_init, W15 ‘.text’ is an assembler directive that says
mov # SPLIM_init,W0 what follows is code. Our first
mov W0,SPLIM
instruction must be labeled as ‘ reset’.
These move instruction initializes the
stack pointer and stack limit registers –
this will be discussed in a later chapter.

avalue = 100

The equal sign is an assembler directive

that equates a label to a value.

V 0.2 77
 mptst_byte.s (cont.) The use of labels and
; i = 100;
comments greatly improves
mov.b #avalue, W0 ; W0 = 100 the clarity of the program.
mov.b WREG,i ; i = 100
It is hard to over-comment
an assembly language
; i = i + 1;
inc.b i ; i = i + 1 program if you want to be
; j = i able to understand it later.
mov.b i,WREG ; W0 = i
mov.b WREG,j ; j = W0
Strive for at least a
; j = j – 1; comment every other line;
dec.b j ; j= j – 1 refer to lines
; k = j + i
mov.b i,WREG ; W0 = i
add.b j,WREG ; W0 = W0+j (WREG is W0)
mov.b WREG,k ; k = W0

V 0.2 78
 mptst_byte.s (cont.) A label that is the target
of a goto instruction.
Lables are case sensitive
done: (instruction mnemonics
goto done ;loop forever
and assembler directives
are not case sensitive.

.end Acomment

An assembler directive specifying the end of

the program in this file.

V 0.2 79
 General MPLAB IDE Comments
• See Experiment #2 for detailed instructions on
installing the MPLAB IDE on your PC and
assembling/simulating programs.
• The assembly language file must have the .s
extension and must be a TEXT file
– Microsoft .doc files are NOT text files
The MPLAB IDE has a built-in text editor. If you use an
external text editor, use one that displays line numbers
(e.g. don’t use notepad – does not display line numbers)
• You should use your portable PC for experiments 1-
5 in this class; all of the required software is freely
available.
V 0.2 80
 An Alternate Solution
C Program equivalent ;Assign variables to registers
;Move variables into registers.
#define avalue 100
;use register-to-register operations for
uint8 i,j,k;
computations;
i = avalue; // i = 100
;write variables back to memory
i = i + 1; // i++, i = 101
j = i; // j is 101 ;assign i to W1, j to W2, k to W3
j = j - 1; // j--, j is 100
k = j + i; // k = 201
mov #100,W1 ; W1 (i) = 100
inc.b W1,W1 ; W1 (i) = W1 (i) + 1
mov.b W1,W2 ; W2 (j) = W1 (i)
Previous approach took 9 dec.b W2,W2 ; W2 (j) = W2 (j) -1
add.b W1,W2,W3 ; W3 (k) = W1 (i) + W2 (j)
instructions, this one took ;;write variables to memory
mov.b W1,W0 ; W0 = i
11 instructions. Use mov.b WREG,i ; 0x800 (i) = W0
whatever approach that mov.b W2,W0 ; W0 = j
mov.b WREG,j ; 0x801 (j) = W0
you best understand. mov.b W3,W0 ; W3 = k
mov.b WREG,k ; 0x802 (k) = W0

V 0.2 81
 Clock Cycles vs. Instruction Cycles
The clock signal used by a PIC24 µC to control instruction execution can be
generated by an off-chip oscillator or crystal/capacitor network, or by using the
internal RC oscillator within the PIC24 µC.
For the PIC24H family, the maximum clock frequency is 80 MHz.
An instruction cycle (FCY) is two clock (FOSC) cycles. Important!!!!!!!
A PIC24 instruction takes 1 or 2 instruction (FCY) cycles, depending on the
instruction (see Table 19-2, PIC24HJ32GP202 data sheet). If an instruction causes
the program counter to change (i.e, GOTO), that instruction takes 2 instruction
cycles.
An add instruction takes 1 instruction cycle. How much time is this if the clock
frequency (FOSC) is 80 MHz ( 1 MHz = 1.0e6 = 1,000,000 Hz)?
1/frequency = period, 1/80 MHz = 12.5 ns (1 ns = 1.0e-9 s)
1 Add instruction @ 80 MHz takes 2 clocks * 12.5 ns = 25 ns (or 0.025 us).
By comparison, an Intel Pentium add instruction @ 3 GHz takes 0.33 ns (330 ps). An Intel
Pentium could emulate a PIC24HJ32GP202 faster than a PIC24HJ32GP202 can execute!
But you can’t put a Pentium in a toaster, or Vbu0y.2one from Digi-key for $5.00. 64
How long does mptst_byte.s take to execute?
Beginning at the reset label, and ignoring the goto at the end.

Instruction
Cycles
1. How many
mov # SP_init, W15 ?
instruction cycles? mov # SPLIM_init,W0 ?
mov W0,SPLIM ?
2. How many clock mov.b #avalue, W0 ?
cycles? mov.b WREG,i ?
inc.b i ?
mov.b i,WREG ?
mov.b WREG,j ?
dec.b j ?
mov.b i,WREG ?
add.b j,WREG ?
mov.b WREG,k ?
V 0.2 Total ?

65
How long does mptst_byte.s take to execute?
Beginning at the reset label, and ignoring the goto at the end,
takes 12 instruction cycles, which is 24 clock cycles.
Instruction
Cycles
mov # SP_init, W15 1
mov # SPLIM_init,W0 1
mov W0,SPLIM 1
mov.b #avalue, W0 1
mov.b WREG,i 1
inc.b i 1
mov.b i,WREG 1
mov.b WREG,j 1
dec.b j 1
mov.b i,WREG 1
add.b j,WREG 1
mov.b WREG,k 1
V 0.2 Total 12 65
 What if we used 16-bit variables instead
of 8-bit variables?
C Program equivalent
A uint16 variable is
#define avalue 2047
16 bits (1 byte)
uint16 i,j,k;

i = avalue; // i = ?
i = i + 1; // i = ?
j = i; // j = ?
j = j - 1; // j = ?
k = j + i; // k = ?

V 0.2 66
 What if we used 16-bit variables instead
of 8-bit variables?
C Program equivalent
A uint16 variable is
#define avalue 2047
16 bits (1 byte)
uint16 i,j,k;

i = avalue; // i = 2047
i = i + 1; // i++, i = 2048
j = i; // j is 2048
j = j - 1; // j--, j is 2047
k = j + i; // k = 4095

V 0.2 66
 .include "p24Hxxxx.inc"
.global reset Reserve 2 bytes for each
.bss ;reserve space for variables
i: .space 2
variable. Variables are now
j: .space 2 stored at 0x0800, 0x0802,
k: .space 2 0x0804
.text ;Start of Code section
reset: ; first instruction located at reset label
mov # SP_init, w15 ;initialize stack pointer
mov # SPLIM_init,W0
mov W0,SPLIM ;initialize stack limit reg
avalue = 2048
; i = 2048;
mov #avalue, W0 ; W0 = 2048 Instructions now
mov WREG,i ; i = 2048 perform WORD (16-bit)
; i = i + 1;
inc i ; i = i + 1 operations (the .b
; j = i
mov i,WREG ; W0 = i
qualifier is removed).
mov WREG,j ; j = W0
; j = j – 1;
dec j ; j= j – 1
; k = j + i
mov i,WREG ; W0 = i
add j,WREG ; W0 = W0+j (WREG is W0)
mov WREG,k ; k = W0
done:
goto done ;loop forever
V 0.2 67
Copyright Delmar Cengage Learning 2008. All RightsReserved.
 An Alternate Solution (16-bit variables)
C Program equivalent ;Assign variables to registers
;Move variables into registers.
#define avalue 2047
;use register-to-register operations for
uint16 i,j,k;
computations;
i = avalue; // i = 2047
;write variables back to memory
i = i + 1; // i++, i = 2048
j = i; // j is 2048 ;assign i to W1, j to W2, k to W3
j = j - 1; // j--, j is 2047
k = j + i; // k = 4095
mov #2047,W1 ; W1 (i) = 2047
inc W1,W1 ; W1 (i) = W1 (i) + 1
mov W1,W2 ; W2 (j) = W1 (i)
Previous approach took 9 dec W2,W2 ; W2 (j) = W2 (j) -1
add W1,W2,W3 ; W3 (k) = W1 (i) + W2 (j)
instructions, this one took ;;write variables to memory
mov W1,i ; 0x800 (i) = W1
8 instructions. In this mov W2,j ; 0x802 (j) = W2
case, this approach is mov W3,k ; 0x804 (k) = W3

more efficient!

V 0.2 88
 How long does mptst_word.s take to execute?
Ignoring the goto at the end. Instruction
Cycles
1. How many instruction mov # SP_init, W15 ?
cycles? mov # SPLIM_init,W0 ?
mov W0,SPLIM ?
2. How many clock cycles? mov #avalue, W0 ?
mov WREG,i ?
inc i ?
mov i,WREG ?
mov WREG,j ?
dec j ?
mov i,WREG ?
add j,WREG ?
mov WREG,k ?
Total ?
V 0.2 89
How long does mptst_word.s take to execute?
Ignoring the goto at the end, takes 12 instruction cycles, which
is 24 clock cycles. Instruction
Cycles
mov # SP_init, W15 1
mov # SPLIM_init,W0 1
mov W0,SPLIM 1
mov #avalue, W0 1
mov WREG,i 1
inc i 1
mov i,WREG 1
mov WREG,j 1
dec j 1
mov i,WREG 1
add j,WREG 1
mov WREG,k 1
Total 12
V 0.2 90
 16-bit operations versus 8-bit
The 16-bit version of the mptst program requires the same number of
instruction bytes and the same number of instruction cycles as the 8-bit
version.

This is because the PIC24 family is a 16-bit microcontroller; its natural

operation size is 16 bits, so 16-bit operations are handled as efficiently as 8-
bits operations.

On an 8-bit processor, like the PIC18 family, the 16-bit version would take
roughly double the number of instructions and clock cycles as the 8-bit
version.

On the PIC24, a 32-bit version of the mptst program will take approximately
twice the number of instructions and clock cycles as the 16-bit version. We
will look at 32-bit operations later in the semester.

V 0.2 91
 Review: Units
In this class, units are always used for physical quantity:
Time Frequency
milliseconds (ms = 10-3 s) kilohertz (kHz = 103 Hz)
microseconds (µs = 10-6 s) megahertz (MHz = 106 Hz)
nanoseconds (ns = 10-9 s) gigahertz (GHz = 109 Hz)

When a time/frequency/voltage/current quantity is asked for, I

will always ask for it in some units. Values for these quantities in
datasheets are ALWAYS given in units.
For a frequency of 1.25 kHz, what is the period in µs?
period = 1/f = 1/(1.25 e3) = 8.0 e –4 seconds

Unit conversion= 8.0e-4 (s) * (1e6 µs)/1.0 (s) = 8.0e2 µs = 800 µs

V 0.2 92
 PIC24H Family
• Microchip has an extensive line of PICmicro®
microcontrollers, with the PIC24 family introduced
in 2005.
• The PIC16 and PIC18 are older versions of the
PICmicro® family, have been several previous
generations.
• Do not assume that because something is done one
way in the PIC24, that it is the most efficient
method for accomplishing that action.
• The datasheet for the PIC24HJ32GP202 is found on
the class web site.

V 0.2 93
 Some PICMicros that we have used
Features 16F87x PIC18F242 PIC24H
(Fall 2003) (Summer 2004) (Summer 2008)
Instruction 14 bits 16 bits 24 bits
width
Program 8K instr. 8K instructions ~10K instructions
memory

Data 368 bytes 1536 bytes 2048 bytes

Memory
Clock speed Max 20 MHz, 4 Max 40 MHz Max 80 MHz
clks=1instr 4 clks=1instr 2 clks=1 instr
Architecture Accumulator, 8- Accumulator, 8-bit General purpose
bit architecture architecture register, 16-bit
architecture

The PIC24H can execute about 6x faster than the

PIC18F242 previously used inV 0.2
this class. 73
 What do you need to know?
• Understand the PIC24 basic architecture (program
and data memory organization)
• Understand the operation of mov, add, sub, inc, dec,
goto instructions and their various addressing mode
forms
• Be able to convert simple C instruction sequences to
PIC24 assembly language
– Be able to assemble/simulate a PIC24 µC assembly
language program in the MPLAB IDE
• Understand the relationship between instruction
cycles and machine cycles
V 0.2 74