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MCS51 InstructionSet

The document provides a detailed summary of the MCS-51 instruction set, including mnemonics, descriptions, and their respective byte sizes and execution periods. It categorizes instructions into arithmetic operations, logical operations, data transfer, boolean variable manipulation, and program branching. Each instruction's effect on flag settings and addressing modes is also outlined, along with specific examples of usage.

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Suvojit Ghosh
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0% found this document useful (0 votes)
13 views7 pages

MCS51 InstructionSet

The document provides a detailed summary of the MCS-51 instruction set, including mnemonics, descriptions, and their respective byte sizes and execution periods. It categorizes instructions into arithmetic operations, logical operations, data transfer, boolean variable manipulation, and program branching. Each instruction's effect on flag settings and addressing modes is also outlined, along with specific examples of usage.

Uploaded by

Suvojit Ghosh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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i~.

M=”-51 PROGRAMMER’SGUIDE AND INSTRUCTION SET

M=@-51 INSTRUCTION SET


Table 10.8051 Inatruotion Set Summary

Interrupt ResponseTime: Refer to Hardware De- Oaeilfstor


Mnemonic Dsseription
scription Chapter. ‘m Period

Instructions that Affect Flag Settings(l) ---


ADD
.-
A,Rn
.
Ma registerto 1 12
Instruetkm Ffsg Inetmetion Flsg Accumulator
C OV AC C OV AC ADD A,direct Adddirectbyteto 2 12
ADD xx X CLRC o Accumulator
ADDC xx X CPLC x ADD A,@Ri Addindirect
RAM 1 12
SUBB xx X ANLC,bit X toAccumulator
MUL ox ANLC,/bit X ADD A,#date Addimmediate 2 12
DIV ox ORLC,bit X dateto
DA x ORLC,bit X Accumulator
RRC x MOVC,bit X ADDC A,Rn Addregister
to 1 12
RLC x CJNE x Accumulator
SETBC 1 withCarry
(l)FJotethat operationson SFR byte address 208or ADDC A,dirsct Adddirectbyteto 2 12
bit addresses 209-215(i.e., the PSW or bits in the Accumulator
PSW) will also afect flag settings. withCarry
ADDC A.@Ri Addindirect 1 12
Nota on inetruetionsat and ad&aesingmodes: RAMto
Rn — Register R7-RO of the currently se- Accumulator
lectedRegister Bank. withCarry
direct — 8-bit internal data location’s address. ADDC A,#date Addimmediate 2 12
This could been Internal Dsta RAM datetoAcc
locetion (0-127) or a SFR [i.e., I/O withCeny
pofi control register, status register, SUBB A,Rn Subtract
Register 1 12
etc. (128-255)]. fromAcewith
@Ri — 8-bit internal data RAM location (O- borrow
255)addreasedindirectly through reg- SUBB A,direct Subtrectdirect 2 12
ister R1 or RO. bytefromAcc
#data — 8-bitco~~t includedin instruction. withborrow
#data 16— 16-bitconstant includedin instmction. SUBB A.@Ri Subfrectindiract 1 12
addr 16 — 16-bit destination address. Used by RAMfromACC
LCALL & LJMP. A branch can be withborrow
anywhere within the 64K-byte Pro- A.#date Subtract 2 12
gram Memory SddR$S SpCCe. immediatedate
addr 1 — n-bit destination sddrrss. Used by fromAccwith
ACALL& AJMP. The branch willbe borrw
within the same 2K-byte page of pro- INC A Increment 1 12
gram memo~ as the first byte of the Accumulator
foil-g instruction. INC Rn Incrsmsnt
register 1 12
rel — Signed(two’scomplement)S-bitoffset INC direct Increment direct 2 12
byte.Usedby SJMP end all condition- byte
al jumps. Range is -128 to + 127 INC @Ri Incrementdirect 1 12
bytes relative to first byte of the fol- RAM
lowinginstruction. DEC A Decrement 1 12
bit — Direct Addressedbit in Internal Data Accumulator
W or SpecialFunction Register. DEC Rn Decrement 1 12
Regieter
DEC direct Decrement direct 2 12
byte
DEC @Ri Decrement 1 12
indirect
RAM
WImnemonics
copyrighted
@lntelCor’pxetion
1980

.
2-21
i~e McS@-51PROGRAMMER’SGUIDE AND INSTRUCTION SET

Table 10.8051 Inetruotion Sat Summary (Continued)


~we o:acw~r
Mnemonic Deaoription

tRITNWTIC OPERATIONS (Continued)


. ------ urtm
LUUIGAL
----------
IIUNS {wmunuao)
,A . . ,.

NC DPTR Increment Date 1 24 RL A 1 12


Pointer Accumulator Left
dUL AB MultiPiy
A& B 1 48 RLC A Rotate 1 12
)IV AB Ditie A byB 1 48 Accumulator Left
)A A DecimelAdjuet 1 12 through theCarry
Accumulator RR A Rotate 1 12
.OGICALOPERATtONS Accumulator
\NL A,Rn ANDRegieterto 1 12 Right
Accumulator RRC A Rotate 1 12
tNL A,direct ANDdiractbyte 2 12 Accumulator
toAccumulator Rightthrough
4NL A,@Ri ANDindirect 1 12 mecerry
RAMto SWAP A Swapnibbles 1 12
Accumulator withinthe
4NL A,#date ANDimmediate 2 12 Accumulator
datato DATATRANSFER
Accumulator MOV A,Rn Move 1 12
4NL direct,A ANDAccumulator 2 12 register
to
todirectbyte Accumulator
4NL diract,#data ANDimmediate 3 24 MOV A,direct Movediract 2 12
datatodirectbyte byteto
)RL A,Rn ORregister to 1 12 Accumulator
Accumulator MOV A,@Ri Moveindirect 1 12
2RL A,direct ORdirectbyteto 2 12 RAMto
Accumulator Accumulator
2RL A,@Ri ORindiractRAM 1 12 MOV A,#date Move 2 12
toAccumulator immediate
3RL A,#date ORimmediate 2 12 dateto
datato Accumulator
Accumulator MOV Rn.A Move 1 12
3RL dirac4,A ORAccumulator 2 12 Accumulator
todirectbyte toregister
3RL dirsct,~date ORimmediate 3 24 MOV Rn,direot Movedirect 2 24
detetodiractbyte byteto
KRL A,Rn Excluaiva-OR 1 12 register
regieterto MOV Rn,#date Move 2 12
Armmulator immediate date
I(RL A,diraot ExclusMe-OR 2 12 toregister
directbyteto MOV direct,A Mova 2 12
Accumulator Accumulator
KRL A,@Ri Exclush/e-OR 1 12 todirectbyte
indirect
RAMto MOV direct,Rn Moveregister 2 24
Accumulator todirectbyte
KRL A,#data Exclusiva-OR 2 12 MOV diract,directMovedirect 3 24
immediate datato bytatodiract
Accumulator MOV direct,@Ri Moveindirect 2 24
KRL direct,A Excluaive-OR 2 12 RAMto
Accumulator to directbyte
directbyte MOV direct,#date Move 3 24
KRL direct,gdata Exclueive-OR 3 24 immediate data
immediate date todireotbyte
todirectbyte MOV @Ri,A Move 1 12
CLR A Clear 1 12 Accumulator to
Accumulate
Complement 1 12
I indirect
RAM
CPL A Allmnemonics
copyrighted@lnteiCorporation
19S0
Accumulator
.2-22
in~. M=”-51 PROGRAMMER’S GUIDE AND INSTRUCTION SET

Table 10.8051 Instruction Set Summary(Continued)

I Mnemonic OeecriptfonByte ~~k~o’ Mnemonic Description Byte


Oeciltetor
Period
IDATATRANSFER (continued) BOOLEAN VARIABLEMANIPULATION
MOV @Ri,direct Movedirect 2 24 GLH L wearwny 1 12
byteto CLR bit Clesrdirectbit 2 12
indirect RAM SETB c SetCarry 1 12
MOV @Ri,#date Move 2 12 bit Setdirectbit 2 12
immediate CPL c Complement 1 12
dateto carry
indirect RAM CPL bit Complement 2 12
MOV DPTR,#data16LoedDets 3 24 directbit
Pointerwitha ANL C,bit ANDdirectbit 2 24
16-bitconstant toCARRY
MOVC A,@A+DPTR MoveMe 1 24 ANL C,/bit ANDcomplement 2 24
byterelativeto ofdirectbit
DPTRtoAcc tocarry
MOVC A,@A+PC MoveCode 1 24 ORL C,bit ORdirectbit 2 24
byterelativeto tocarry
PCtoAcc ORL C,/bit ORcomplement 2 24
MOVX A,@Ri Move 1 24 ofdirectbit
External tocarry
RAM(8-bit MOV C,bit Movedirectbit 2 12
eddr)toAcc tocarry
MOVX A,@DPTR Move 1 24 MOV bit,C MoveCsrryto 2 24
External directbit
RAM(l&bit JC rel JumpifCsny 2 24
addr)toAcc isset
MOVX @Ri,A MoveAccto 1 24 JNC rel JumpifCarry 2 24
External RAM notset
(8-bitaddr) JB bit,rel Jumpifdirecf 3 24
MOVX @DPTR,A MoveAccto 1 24 Bitisset
External RAM JNB bi$rel Jumpifdirect 3 24
(lS-bitaddr) BitisNotset
PUSH direct Pushdirect 2 24 JBC bit.rel Jumoifdirect 3 24
byteonto Bitisset&
stack clearbit
POP direct Popdirect 2 24 PROGRAMBRANCHING
bytefrom ACALL addrl1 Absolute 2 24
stack Subroutine
XCH A,Rn Exchange 1 12 call
registerwith LCALL addr16 Long 3 24
Subroutine
XCH A,direct Exchange 2 12 call
directbyte RET Returnfrom 1 24
with Subroutine
RETI Retumfrom 1 24
XCH A,@Ri Exchange 1 12 intempt
indirect
RAM AJMP addrll Absolute 2 24
with Jump
WMP addr16 LongJump 3 24
XCHD A,@Ri Exchange low- 1 12 SJMP rel ShortJumo 2 24
orderDigif (relativeaddr)
indirect
RAM VImnemonicscopyrigMed @lntelCorporation
1980
with Acc
I

2-23
int# MCS@-51PROGRAMMER’S GUIDE AND INSTRUCTION SET

Table 10.8051 Instruction Set SummarY (Continued)

Mnemonic Description Byte ‘~or Mnemonic Description Syte ~~or


.FmWrIANI
. . . . . .. BmANGmNQ
-m . ..-,,,..- ,-- —.,....
(wnunueq
.’,
PROGRAM BRANCHING (Continued)
JMP @A+DPTR Jumpindirecf 1 24 CJNE Rn,#date,rei Compare 3 24
relativetothe immediate to
DPTR register
and
JZ rel Jumpif 2 24 JumpifNot
Accumulator Equal
isZero CJNE @Ri,#data,rel Compare 3 24
JNZ rel Jumpif 2 24 immediate to
Accumulator indirect
and
isNotZero JumpifNot
CJNE A,direct,rei Compare 3 24 Equal
directbyteto DJNZ Rn,rei Decrement 2 24
AccandJump registerand
ifNotEquai JumpifNot
CJNE A,#date,rel Compare 3 24 Zero
immediate to DJNZ direct,rel Decrement 3 24
AccandJumo directbyte
ifNotEqual andJumpif
NotZero
NOP NoOperation 1 12
dlmnemonics
copyrighted @intelCorporation
1980

2-24
i~. M~@-51 PROGRAMMERS GUIDE AND INSTRUCTION SET

Table 11. Instruction Q i in Haxadecirnal Order


Hex Number Hex Number
Mnemonic Operands Mnemonic operands
Code of Bytes code of Bytes
00 1 NOP 33 1 RLC A
01 2 AJMP codesddr 34 2 ADDC A,#data
02 3 WMP codesddr 35 2 ADDC A,datsaddr
03 1 RR A 36 1 ADDC A,@RO
04 1 INC A 37 1 ADDC A,@Rl
05 2 INC dstsaddr 36 1 ADDC A,RO
06 1 INC @RO 39 1 ADDC A,R1
07 1 INC @Rl 3A 1 ADDC A,R2
06 1 INC RO 3B 1 ADDC A,R3
Oe 1 INC RI 3C 1 ADDC A,R4
OA 1 INC R2 3D 1 ADDC A,R5
OB 1 INC R3 3E 1 ADDC A,R6
Oc 1 INC R4 3F 1 ADD(2 A,R7
OD 1 INC R5 40 2 JC codeaddr
OE 1 INC R6 41 2 AJMP codeaddr
OF 1 INC R7 42 2 ORL datsaddr,A
10 3 JBC bitaddr,codeaddr 43 3 ORL dateaddr,#data
11 2 ACALL codeaddr 44 2 ORL A,#data
12 3 LCALL codeaddr 45 2 ORL A,dataaddr
13 1 RRC A 46 1 ORL A,@RO
14 1 DEC A 47 1 ORL A,@Rl
15 2 DEC dataaddr 46 1 ORL A,RO
16 1 DEC @RO 49 1 ORL A,R1
17 1 DEC @Rl 4A 1 ORL A,R2
16 1 DEC RO 4B 1 ORL A,R3
19 1 DEC RI 4C 1 ORL A,R4
1A 1 DEC R2 4D 1 ORL A,R5
lB 1 DEC R3 4E 1 ORL A,Re
lC 1 DEC R4 4F 1 ORL A,R7
ID 1 DEC R5 50 2 JNC codeaddr
lE 1 DEC R6 51 2 ACALL codeaddr
IF 1 DEC R7 52 2 ANL dataaddr,A
20 3 JB bifaddr,codeaddr 53 3 ANL dataaddr,#data
21 2 AJMP codeaddr 54 2 ANL A,#data
22 1 RET 55 2 ANL A,datsaddr
23 1 RL A 56 1 ANL A,@RO
24 2 ADD A,#dats 57 1 ANL A,@Rl
25 2 ADD A,datsaddr 5e 1 ANL A,RO
26 1 ADD A,@RO 59 1 ANL A,R1
27 1 ADD A,@Rl 5A 1 ANL A,R2
28 1 ADD A,RO 5B 1 ANL A,R3
23 1 ADD A,R1 5C 1 ANL A,R4
2A 1 ADD A,R2 5D 1 ANL A,R5
2B 1 ADD A,R3 5E 1 ANL A,R6
2C 1 ADD A,R4 5F 1 ANL A,R7
2D ADD A,R5 eo 2 JZ codeaddr
2E ; ADD A,R6 61 2 AJMP codeaddr
2F ADD A,R7 62 2 XRL datesddr,A
30 : JNB bitaddr,codeaddl 63 3 XRL datesddr,#data
31 2 ACALL codeaddr 64 2 XRL A,#data
32 1 RETI 65 2 XRL A,dataaddr

2-25
int# [email protected] PROGRAMMER’S GUIDE AND INSTRUCTION SET

s .. . . .-—-------- ----- ,--. .....---,

Hex Number Hex Number


Mnemonic Oparanda Mnemonic operands
Code of Bytaa Coda of Bytaa
5s 1 XRL A,@RO 99 1 SUBB A,R1
57 1 XRL A,@Rl 9A 1 SUBB A,R2
56 1 XRL ~RO 9B 1 SUBB A,R3
59 1 XRL A,RI 9C 1 SUBB A,R4
3A 1 XRL A,R2 9D 1 SUBB A,R5
5B 1 XRL A,R3 9E 1 SUBB A,R6
5C 1 XRL A,R4 9F 1 SUBB A,R7
6D 1 XRL A,R5 AO 2 ORL C,/bitaddr
SE 1 XRL A,R6 Al 2 AJMP codeaddr
SF 1 XRL A,R7 A2 2 MOV C,bitaddr
70 2 JNZ codeaddr A3 1 INC DPTR
71 2 ACALL codeaddr A4 1 MUL AB
72 2 ORL C,bitaddr A5 reaervad
73 1 JMP @A+DPTR A6 2 MOV @RO,dataaddr
74 2 MOV A,#data A7 2 MOV @Rl,dataaddr
75 3 MOV datsaddr,#data A8 2 MOV RO,dataaddr
76 2 MOV @RO, #data A9 2 MOV Rl,dataaddr
77 2 MOV @Rl,#data AA 2 MOV R2,dataaddr
76 2 MOV RO,#data AB 2 MOV R3,dstaaddr
79 2 MOV Rl, #data AC 2 MOV R4,dataaddr
7A 2 MOV R2,#data AD 2 MOV R5,dataaddr
70 2 MOV R3,#data AE 2 MOV R6,dataaddr
7C 2 hAov R4,#data AF 2 MOV R7,dataaddr
7D 2 Mov R5,#data BO 2 ANL C,/bitaddr
7E 2 MOV R6,#data B1 2 ACALL codeaddr
7F 2 MOV R7,#data 02 2 CPL bitaddr
80 2 SJMP codeaddr B3 1 CPL c
81 2 AJMP codeaddr 24 3 CJNE A,#data,codeaddr
82 2 ANL C,bitaddr B5 3 CJNE A,dataaddr,code
addr
83 1 MOVC A,@A+PC B6 3 CJNE @RO, #dats,codaaddr
84 1 DIV AB B7 3 CJNE @Rl,#data,codeaddr
85 3 MOV dataaddr,dataaddr 08 3 CJNE RO,#data,codeaddr
86 2 MOV dataaddr,@RO B9 3 CJNE Rl,#datasodeaddr
87 2 MOV dataaddr,@Rl BA 3 CJNE R2,#data$odeaddr
66 2 MOV dataaddr,RO BB 3 CJNE R3,#daQcodeaddr
89 2 MOV dataaddr,Rl BC 3 CJNE R4,#dats@de addr
8A 2 MOV dataaddr,R2 BD 3 CJNE R5,#data,codeaddr
8B 2 MOV dataaddr,R3 BE 3 CJNE R8,#data,codeaddr
SC 2 MOV dataaddr,R4 BF 3 CJNE R7,#data,codeaddr
8D 2 MOV dataaddr,R5 co 2 PUSH dataaddr
8E 2 MOV dataaddr,R6 c1 2 AJMP codeaddr
8F 2 MOV dataaddr,R7 C2 2 CLR bitaddr
90 3 MOV DPTR,#data C3 1 CLR c
91 2 ACALL codeaddr C4 1 SWAP A
92 2 MOV bitsddr,C C5 2 XCH A,dataaddr
93 1 MOVC A,@A+DPTR C8 1 XCH A,@RO
94 2 SUBB A,#data C7 1 XCH A,@Rl
95 2 SUBB A,dataaddr C8 1 XCH A,RO
M 1 SUBB A,@RO C9 1 XCH A,R1
97 1 SUBB A,@Rl CA 1 XCH A,R2
98 1 SUBB A,RO CB 1 XCH A,R3

2-26
ir& M=@-51 PROGRAMMER’SGUIDE AND INSTRUCTION SET

Table 11. Instruction Opoode In1 xadecimal Order (Continued)


Hex Number Hex Number
Operende Mnemonic Operande
Code of Bytee ‘nemonic Code of Bytee
cc 1 XCH A,R4 E6 1 MOV A,@RO
CD 1 XCH A,R5 E7 1 MOV A,@Rl
CE 1 XCH A,R6 E8 1 MOV A,RO
CF 1 XCH A,R7 E9 1 MOV A,R1
Do 2 POP dateaddr EA 1 MOV A,R2
D1 2 ACALL codaaddr EB 1 MOV A,R3
D2 2 SETB biladdr EC 1 MOV A,R4
D3 1 SETB c ED 1 MOV A,R5
D4 1 DA A EE i MOV A,R6
D5 3 DJNZ dateaddr,codeaddr EF 1 MOV A,R7
D6 1 XCHD A,@RO FO 1 MOVX @DPTR,A
D7 1 XCHD A,@Rl FI 2 ACALL codeaddr
CM 2 DJNZ RO,code addr F2 1 MOVX @RO,A
D9 2 DJNZ Rl,codeaddr F3 1 MOVX @Rl,A
DA 2 DJNZ R2,codeaddr F4 1 CPL A
DB 2 DJNZ R3,cadeaddr F5 2 MOV dataaddr,A
DC 2 DJNZ R4,codeaddr F6 1 MOV @RO,A
DD 2 DJNZ R5,codaaddr F7 1 MOV @Rl~
DE 2 DJNZ R6,c0deaddr F8 1 MOV RO,A
DF 2 DJNZ R7,codeaddr F9 1 MOV RI,A
EO 1 MOVX A,@DPTR FA 1 MOV R2,A
El 2 AJMP codeaddr FB 1 MOV R3,A
E2 1 MOVX A,@RO FC 1 MOV R4,A
E3 1 MOVX A,@Rl FD 1 MOV R5,A
E4 1 CLR A FE 1 MOV R6,A
E5 2 MOV A,dateaddr FF 1 MOV R7,A

2-27

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