Microprocessor Explanation: The 8085 is an 8-bit microprocessor, meaning it processes 8 bits

of data at a time.
What is a microprocessor?
a) A combinational circuit The clock frequency of the 8085 microprocessor is:

b) A central processing unit on a single chip a) 1 MHz

c) A memory storage device b) 3 MHz

d) An input-output device c) 5 MHz

Answer: b) A central processing unit on a single chip d) 10 MHz

Explanation: A microprocessor integrates the CPU's functionalities into a Answer: b) 3 MHz
single integrated circuit.
What is the function of the program counter in a microprocessor?
The first microprocessor developed was: a) To store data temporarily
a) 4004 b) To hold the address of the next instruction to be executed
b) 8080 c) To perform arithmetic operations
c) 8085 d) To store intermediate results
d) Z80 Answer: b) To hold the address of the next instruction to be executed
Answer: a) 4004 Explanation: The program counter keeps track of the memory address of the
Explanation: The Intel 4004 was the first commercially available instruction to be executed next.
microprocessor.
The accumulator in a microprocessor is used for:

Which of the following is an 8-bit microprocessor? a) Storing data permanently

a) 8086 b) Temporary storage during arithmetic and logic operations

b) 8088 c) Storing addresses

c) 8085 d) Input-output interfacing

d) 80486 Answer: b) Temporary storage during arithmetic and logic operations

Answer: c) 8085 Explanation: The accumulator is a special register for processing arithmetic
and logic results.
The 8085 microprocessors have how many address lines? The instruction set of a microprocessor refers to:
a) 8 a) The size of the processor
b) 16 b) The set of operations it can perform
c) 32 c) The memory capacity
d) 64 d) The number of registers
Answer: b) 16 Answer: b) The set of operations it can perform
Explanation: The 8085 microprocessor has 16 address lines, allowing it to Explanation: The instruction set defines all operations a microprocessor is
address 216 = 65536 or 64 KB of memory. designed to execute.
How many general-purpose registers does the 8085 microprocessor has?
The size of the address bus determines:
a) 4
a) The speed of the processor
b) 5
b) The memory capacity that can be addressed
c) 6
c) The number of registers
d) 8
d) The number of input-output ports
Answer: c) 6
Answer: b) The memory capacity that can be addressed
Explanation: The 8085 microprocessor has six general-purpose registers: B,
Explanation: The address bus determines the range of addresses the
C, D, E, H, and L.
microprocessor can access.
Which flag in the 8085 indicates an arithmetic overflow?
Which of the following is NOT a feature of the 8085 microprocessor?
a) Carry flag
a) 8-bit data bus
b) Zero flag
b) 16-bit address bus
c) Sign flag
c) Built-in clock generator
d) Overflow flag
d) Floating-point arithmetic support
Answer: a) Carry flag
Answer: d) Floating-point arithmetic support
Explanation: The carry flag indicates whether an arithmetic operation
generates a carry or borrow.
Which signal in the 8085 microprocessor is used to reset the processor?
a) READY In 8085, the instruction MOV A, B means:
b) HOLD a) Move the data from A to B
c) RESET IN b) Move the data from B to A
d) RESET OUT c) Add the contents of A and B
Answer: c) RESET IN d) Store data from A to memory
Explanation: The RESET IN signal initializes the processor and resets it to a
Answer: b) Move the data from B to A
known state.
What is the purpose of the HL pair in the 8085 microprocessor?
The 8085 microprocessor executes instructions in:
a) Storing two bytes of data
a) Parallel mode
b) Acting as a memory pointer
b) Serial mode
c) Storing arithmetic results
c) Sequential mode
d) Generating interrupts
d) Pipelined mode
Answer: b) Acting as a memory pointer
Answer: c) Sequential mode
Explanation: The HL pair is often used as a memory pointer to access data
Explanation: Instructions are executed one after another in the 8085
in memory.
microprocessor.
Which instruction is used to load an immediate value into the
The INTR signal in the 8085 is used for:
accumulator?
a) DMA operations
a) LDA
b) External interrupts
b) MVI A
c) Power saving
c) STA
d) Clock synchronization
d) IN
Answer: b) External interrupts
Answer: b) MVI A
Explanation: INTR is an interrupt request signal used to handle external
interrupts.
What is the size of the instruction register in the 8085 microprocessor? Which of the following registers in the 8085 microprocessor is not
directly accessible?
a) 4 bits
a) Accumulator
b) 8 bits
b) Instruction register
c) 16 bits
c) Program counter
d) 32 bits
d) General-purpose registers
Answer: b) 8 bits
Explanation: The instruction register holds an 8-bit opcode during decoding. Answer: b) Instruction register
Explanation: The instruction register is used internally by the microprocessor
What is the function of the stack pointer in the 8085? and is not directly accessible to the programmer.
a) To store temporary data
The instruction STA 3000H in the 8085 microprocessor means:
b) To point to the top of the stack in memory
a) Store the accumulator contents in the memory location 3000H
c) To hold instructions
b) Load the accumulator from the memory location 3000H
d) To perform arithmetic operations
c) Add the data at 3000H to the accumulator
Answer: b) To point to the top of the stack in memory
d) Move the data at 3000H to the HL pair
The instruction LXI H, 2500H in 8085 microprocessor means:
Answer: a) Store the accumulator contents in the memory location 3000H
a) Load 2500H into the accumulator Explanation: STA stands for Store Accumulator, which stores its contents at
the specified memory location.
b) Load 2500H into the HL register pair
c) Store data at 2500H Which of the following flags is affected by the instruction CMP B in
8085?
d) Add 2500H to the HL pair
a) Carry flag
Answer: b) Load 2500H into the HL register pair
Explanation: The LXI instruction loads a 16-bit immediate data into the b) Sign flag
specified register pair.
c) Zero flag
d) All of the above
Answer: d) All of the above
Which register is used as a memory address pointer in the 8085 What is the maximum memory capacity the 8085 microprocessor can
microprocessor? address?
a) Accumulator a) 64 KB
b) HL pair b) 32 KB
c) Stack pointer c) 16 KB
d) Program counter d) 128 KB
Answer: b) HL pair Answer: a) 64 KB
Explanation: The HL pair is frequently used as a memory address pointer to
access or modify memory locations. Which instruction is used to enable interrupts in the 8085
microprocessor?
The instruction RST 7 in 8085 is used for:
a) EI
a) Interrupt handling
b) DI
b) Restarting the microprocessor
c) RIM
c) Subroutine call at a specific address
d) SIM
d) Enabling the clock signal
Answer: a) EI
Answer: c) Subroutine call at a specific address Explanation: The EI (Enable Interrupt) instruction enables all the interrupt
Explanation: RST 7 calls a subroutine located at address 0038H in the lines of the 8085 microprocessor.
memory.
The instruction DAA in 8085 is used for:
The 8085 microprocessor has how many hardware interrupt lines?
a) Decimal addition
a) 2
b) 5 b) Binary subtraction
c) 6 c) Decimal adjustment after BCD addition
d) 8
d) Data transfer between registers
Answer: b) 5
Explanation: The 8085 has 5 hardware interrupt lines: TRAP, RST7.5, Answer: c) Decimal adjustment after BCD addition
RST6.5, RST5.5, and INTR.
Which of the following interrupts in the 8085 microprocessor is edge-
triggered?
a) TRAP Answer: a) Start of the program
Explanation: The ORG directive specifies the starting memory address for
b) RST 7.5
the program.
c) RST 6.5
Which of the following interrupts is both edge and level triggered?
d) INTR
a) TRAP
Answer: b) RST 7.5
Explanation: RST 7.5 is edge-triggered, while TRAP is both edge and level- b) RST 7.5
triggered, and RST 6.5 and INTR are level-triggered.
c) RST 6.5
Which of the following instructions represents the end of execution d) INTR
during runtime in the 8085?
Answer: a) TRAP
a) ORG Explanation: TRAP is both edge and level triggered, making it highly reliable
for critical tasks like power failure handling.
b) HLT
What does the instruction END signify in an assembly program?
c) END
a) End of execution
d) RET
b) End of source code
Answer: b) HLT
Explanation: HLT halts the microprocessor during runtime. ORG specifies c) End of a subroutine
the start address, END marks the end of source code for the assembler, and
d) End of memory usage
RET returns control to the calling program.
Answer: b) End of source code
What does the following instruction signify in an 8085-assembly
Explanation: END is a directive used to inform the assembler about the end
program?
of the source code. It does not affect runtime execution.
ORG 2000H
a) Start of the program
b) End of the program
c) Memory initialization
d) Interrupt service routine
 Microprocessor System: peripherals
Explanation: DMA allows peripherals to communicate directly with
1. What is the primary purpose of a memory device in a memory, bypassing the CPU.
microprocessor system?
a) Data input 5. What is the purpose of a memory address decoder?
b) Data output a) To enable data transfer between registers
c) Data storage b) To select the appropriate memory location
d) Data processing c) To execute instructions
Answer: c) Data storage d) To prioritize interrupts
Explanation: Memory devices are used to store data and instructions Answer: b) To select the appropriate memory location
required by the microprocessor. Explanation: The address decoder identifies the specific memory
location to be accessed.
2. Which of the following is an example of volatile memory?
a) ROM 6. What is the function of the data bus in a microprocessor system?
b) Flash memory a) Transfer addresses between the CPU and memory
c) RAM b) Transfer data between the CPU and peripherals
d) EEPROM c) Store data permanently
Answer: c) RAM d) Generate clock signals
Explanation: RAM loses its data when power is turned off, making Answer: b) Transfer data between the CPU and peripherals
it volatile. Explanation: The data bus facilitates the movement of data in a
microprocessor system.
3. Which memory hierarchy level is the fastest?
a) Secondary memory 7. The main difference between SRAM and DRAM is:
b) Cache memory a) SRAM is faster and does not need refreshing
c) Main memory b) DRAM is faster but needs refreshing
d) Registers c) DRAM consumes less power
Answer: d) Registers d) SRAM has higher storage capacity
Explanation: Registers are the fastest memory because they are Answer: a) SRAM is faster and does not need refreshing
located inside the CPU. Explanation: Static RAM (SRAM) retains data without refreshing,
unlike Dynamic RAM (DRAM).
4. Direct Memory Access (DMA) is used to:
a) Enable faster data transfer between memory and peripherals 8. Which peripheral interface standard allows asynchronous
b) Increase the size of memory transmission?
c) Execute instructions faster a) UART
d) Access ROM directly b) I²C
Answer: a) Enable faster data transfer between memory and c) SPI
d) Parallel interface
 Answer: a) UART c) Synchronizing and controlling operations
Explanation: UART (Universal Asynchronous Receiver Transmitter) d) Performing calculations
enables asynchronous serial communication. Answer: c) Synchronizing and controlling operations
Explanation: The control bus manages communication between the
9. What does PPI stand for in microprocessor systems?
CPU and other components.
a) Programmable Processor Interface
b) Parallel Processing Interface 13. The width of the address bus determines:
c) Programmable Peripheral Interface a) The processing speed
d) Peripheral Processing Interface b) The number of input-output devices
Answer: c) Programmable Peripheral Interface c) The amount of memory the processor can address
Explanation: PPI enables the microprocessor to interface with d) The instruction set size
external devices. Answer: c) The amount of memory the processor can address
Explanation: A wider address bus allows the processor to access a
10. Which pin in the 8085 microprocessor is used for DMA
larger memory space.
requests?
a) READY 14. Which microprocessor system feature handles input-output data
b) HOLD transfer?
c) RESET a) Control unit
d) INTR b) DMA controller
Answer: b) HOLD c) Arithmetic unit
Explanation: The HOLD pin is used to request DMA access to the d) Stack pointer
system bus. Answer: b) DMA controller
Explanation: The DMA controller manages data transfer between
11. In a microprocessor system, which component stores frequently
I/O devices and memory.
accessed instructions and data?
a) ROM 15. Which memory classification is non-volatile and
b) Cache memory reprogrammable?
c) RAM a) DRAM
d) Registers b) SRAM
Answer: b) Cache memory c) Flash memory
Explanation: Cache memory stores frequently accessed data to d) Registers
speed up processing. Answer: c) Flash memory
Explanation: Flash memory retains data even when power is turned
12. What is the primary function of the control bus in a
off and can be reprogrammed.
microprocessor system?
a) Addressing memory 16. The RS-232 standard is used for:
b) Storing data a) Parallel data transfer
 b) Serial data transfer b) 2 bytes
c) Wireless communication c) 4 bytes
d) Error correction d) 8 bytes
Answer: b) Serial data transfer Answer: a) 1 byte
Explanation: RS-232 is a standard for serial communication over Explanation: The 8085 has an 8-bit data bus, allowing it to transfer
short distances. one byte at a time.
17. What is the function of an interrupt controller? 21. What is the primary advantage of synchronous data
a) Handles multiple interrupts efficiently transmission over asynchronous?
b) Executes instructions sequentially a) Lower cost
c) Manages memory allocation b) No need for start/stop bits
d) Synchronizes clock signals c) Easier implementation
Answer: a) Handles multiple interrupts efficiently d) Slower data transfer
Explanation: An interrupt controller prioritizes and processes Answer: b) No need for start/stop bits
multiple interrupt requests. Explanation: In synchronous transmission, data is sent continuously
without the overhead of start/stop bits, leading to faster transfer.
18. What type of memory is typically used for firmware?
a) RAM 21. What is the purpose of the READY pin in the 8085
b) ROM microprocessor?
c) Cache memory a) It indicates an interrupt request.
d) Registers b) It is used to enable Direct Memory Access.
Answer: b) ROM c) It ensures the microprocessor waits for slower peripherals.
Explanation: Firmware is stored in ROM as it is non-volatile and d) It resets the microprocessor.
used for permanent instructions. Answer: c) It ensures the microprocessor waits for slower
peripherals.
19. Which component is essential for asynchronous communication?
Explanation: The READY pin is used to synchronize the processor
a) Clock signal
with slower peripherals.
b) Start and stop bits
c) Address decoder 22. Which of the following describes a peripheral mapped I/O
d) Cache memory system?
Answer: b) Start and stop bits a) Uses the same address space as memory
Explanation: Asynchronous communication uses start and stop bits b) Requires separate I/O instructions
to identify data frames. c) Is slower than memory-mapped I/O
d) Shares data and control buses with memory
20. The 8085 microprocessor can transfer how many bytes of data
Answer: b) Requires separate I/O instructions
at a time?
a) 1 byte
 Explanation: Peripheral-mapped I/O uses special instructions like a) I²C
IN and OUT for data transfer. b) RS-232
c) USB
23. Which register pair is often used for stack pointer manipulation
d) IEEE 1284
in the 8085?
Answer: d) IEEE 1284
a) BC
Explanation: IEEE 1284 is a standard for high-speed parallel
b) DE
communication, commonly used in printers.
c) HL
d) SP 27. Which of the following is a characteristic of asynchronous
Answer: d) SP transmission?
Explanation: The Stack Pointer (SP) is a special-purpose register a) Requires clock synchronization
used for stack operations. b) Requires start and stop bits
c) Transfers blocks of data continuously
24. Which of the following transmission methods is used by SPI
d) Uses a single clock signal for synchronization
(Serial Peripheral Interface)?
Answer: b) Requires start and stop bits
a) Full-duplex
Explanation: Asynchronous transmission uses start and stop bits to
b) Half-duplex
frame individual characters.
c) Asynchronous serial
d) Parallel 28. What is the function of the ALE signal in the 8085
Answer: a) Full-duplex microprocessor?
Explanation: SPI supports full-duplex communication, meaning a) Indicate an interrupt
data can be transmitted and received simultaneously. b) Control data transfer
c) Latch the lower byte of the address bus
25. What is the primary role of a DMA controller in a
d) Select memory or I/O
microprocessor system?
Answer: c) Latch the lower byte of the address bus
a) Execute instructions
Explanation: ALE (Address Latch Enable) is used to separate the
b) Provide clock signals
lower byte of the address from the data.
c) Manage data transfers between I/O and memory without CPU
intervention 29. What is the purpose of serial interface standards like RS-485?
d) Decode addresses a) High-speed parallel data transfer
Answer: c) Manage data transfers between I/O and memory without b) Long-distance serial communication
CPU intervention c) Memory mapping
Explanation: DMA controllers offload data transfer tasks from the d) Asynchronous data processing
CPU, improving efficiency. Answer: b) Long-distance serial communication
Explanation: RS-485 is designed for reliable serial communication
26. Which device standard supports high-speed parallel
over long distances, supporting multiple devices.
communication?
 Interrupt Operation: Answer: a) Lowest
Explanation: INTR has the lowest priority among the hardware
1. What is an interrupt in a microprocessor system? interrupts in the 8085.
a) A command to halt execution
b) A signal to pause and execute a higher-priority task 5. Which register stores the address of the interrupt service
c) A method of increasing clock speed routine?
d) A technique for data storage a) Stack Pointer
Answer: b) A signal to pause and execute a higher-priority task b) Program Counter
Explanation: Interrupts temporarily halt the current process to c) Accumulator
handle important tasks or events. d) Instruction Pointer
Answer: b) Program Counter
2. Which of the following is a non-maskable interrupt in the 8085 Explanation: The Program Counter is updated with the address of
microprocessor? the interrupt service routine when an interrupt occurs.
a) RST 5.5
b) RST 6.5 6. Which of the following is a vectored interrupt in 8085?
c) RST 7.5 a) INTR
d) TRAP b) RST 5.5
Answer: d) TRAP c) TRAP
Explanation: TRAP is a non-maskable interrupt, meaning it cannot d) Both b and c
be disabled by the microprocessor. Answer: d) Both b and c
Explanation: TRAP and RST interrupts are vectored, as they
3. What is the function of the Interrupt Enable (EI) instruction? automatically transfer control to predefined addresses.
a) Disables all interrupts
b) Enables all interrupts 7. What is the difference between maskable and non-maskable
c) Clears the interrupt flag interrupts?
d) Handles interrupt priorities a) Non-maskable interrupts can be disabled.
Answer: b) Enables all interrupts b) Maskable interrupts can be enabled selectively.
Explanation: The EI instruction globally enables all interrupts in the c) Non-maskable interrupts are vectored only.
microprocessor. d) Maskable interrupts have higher priority.
Answer: b) Maskable interrupts can be enabled selectively.
4. What is the priority level of the INTR interrupt in the 8085 Explanation: Maskable interrupts can be disabled or enabled by the
microprocessor? processor using specific instructions.
a) Lowest
b) Highest 8. What is the purpose of the SIM instruction in 8085?
c) Same as TRAP a) Enable interrupts
d) Medium b) Set mask bits for interrupts
c) Handle interrupt service routines
 d) Process external signals d) They are maskable only.
Answer: b) Set mask bits for interrupts Answer: a) They use fixed memory addresses for ISRs.
Explanation: The SIM (Set Interrupt Mask) instruction configures Explanation: Vectored interrupts automatically direct the CPU to a
the interrupt mask to enable or disable specific interrupts. predefined memory location for the ISR.
9. What happens if an interrupt occurs while another interrupt is 13. What is the role of the priority encoder in an interrupt
being serviced? controller?
a) The new interrupt is ignored. a) Decodes the interrupt signals
b) The microprocessor halts. b) Selects the highest-priority interrupt
c) The new interrupt is queued based on priority. c) Executes the interrupt routine
d) The processor resets. d) Resets the CPU
Answer: c) The new interrupt is queued based on priority. Answer: b) Selects the highest-priority interrupt
Explanation: Higher-priority interrupts can interrupt the current Explanation: The priority encoder resolves multiple interrupt
interrupt service routine, depending on the system. requests by selecting the highest-priority interrupt.
10. What is the purpose of an Interrupt Service Routine (ISR)? 14. The INTR interrupt in 8085 is:
a) Execute normal program instructions a) Maskable and vectored
b) Handle the task associated with an interrupt b) Maskable and non-vectored
c) Store data in memory c) Non-maskable and vectored
d) Clear the memory d) Non-maskable and non-vectored
Answer: b) Handle the task associated with an interrupt Answer: b) Maskable and non-vectored
Explanation: An ISR is a specific block of code executed in Explanation: INTR requires additional processing to determine the
response to an interrupt. ISR address, making it non-vectored.
11. Which interrupt is used for handling power failure in 8085? 15. Which interrupt is edge-triggered in the 8085 microprocessor?
a) INTR a) RST 5.5
b) RST 6.5 b) RST 6.5
c) TRAP c) RST 7.5
d) RST 7.5 d) TRAP
Answer: c) TRAP Answer: c) RST 7.5
Explanation: TRAP is commonly used for critical events like power Explanation: RST 7.5 is edge-triggered, meaning it responds to a
failure because it is non-maskable and has the highest priority. rising edge of the interrupt signal.
12. How are vectored interrupts handled? 16. What does the DI instruction do in the 8085 microprocessor?
a) They use fixed memory addresses for ISRs. a) Enable interrupts
b) They require polling to identify the source. b) Disable interrupts
c) They are executed sequentially. c) Process an interrupt
 d) Mask all interrupts permanently Answer: a) Interrupt controller
Answer: b) Disable interrupts Explanation: An interrupt controller manages and prioritizes
Explanation: DI (Disable Interrupts) disables all interrupt lines interrupt requests efficiently.
except for non-maskable interrupts like TRAP.
(Continuing with the remaining 10 questions...)
17. The polling method for handling interrupts is:
21. What is the significance of the vector table in handling
a) Faster than vectored interrupts
interrupts?
b) Less efficient than vectored interrupts
a) Stores data during an interrupt
c) Suitable for high-priority tasks
b) Provides the starting address of the ISR
d) Used only in non-maskable interrupts
c) Determines interrupt priorities
Answer: b) Less efficient than vectored interrupts
d) Handles memory management
Explanation: Polling involves checking each device sequentially,
Answer: b) Provides the starting address of the ISR
making it slower than vectored interrupts.
Explanation: The vector table contains predefined addresses that
18. How does a microprocessor handle nested interrupts? point to the ISRs for vectored interrupts.
a) Using the Program Counter only
22. What is the role of the RET instruction in an ISR?
b) By storing the current state on the stack
a) End the main program
c) By ignoring the new interrupt
b) Return to the main program after servicing an interrupt
d) By prioritizing the lower-priority interrupt
c) Halt the processor
Answer: b) By storing the current state on the stack
d) Reset all interrupts
Explanation: Nested interrupts require saving the current context on
Answer: b) Return to the main program after servicing an interrupt
the stack before servicing the new interrupt.
Explanation: RET restores the Program Counter to the address of
19. What is the purpose of the RIM instruction in 8085? the interrupted program to resume execution.
a) Enable interrupts
23. Which of the following interrupts has the lowest priority in
b) Read interrupt masks and status
8085?
c) Reset the microprocessor
a) TRAP
d) Clear interrupt flags
b) RST 7.5
Answer: b) Read interrupt masks and status
c) RST 5.5
Explanation: The RIM (Read Interrupt Mask) instruction reads the
d) INTR
status of interrupts and the interrupt masks.
Answer: d) INTR
20. Which component prioritizes multiple interrupts in a system? Explanation: INTR has the lowest priority among all hardware
a) Interrupt controller interrupts in the 8085 microprocessor.
b) DMA controller
24. Which flag is affected by the execution of the EI instruction?
c) Stack pointer
a) Carry flag
d) Timer
 b) Interrupt Enable flip-flop b) Check if the interrupt is enabled and then execute
c) Zero flag c) Always ignore the interrupt
d) Parity flag d) Disable all interrupts permanently
Answer: b) Interrupt Enable flip-flop Answer: b) Check if the interrupt is enabled and then execute
Explanation: The EI instruction sets the Interrupt Enable flip-flop to Explanation: Maskable interrupts are executed only if they are
enable all maskable interrupts. enabled via the EI instruction.
25. What type of interrupts does the 8085 microprocessor support? 29. What does the ISR of a non-maskable interrupt do after
a) Only maskable interrupts execution?
b) Only non-maskable interrupts a) Resumes the interrupted program
c) Both maskable and non-maskable interrupts b) Terminates the program
d) Software interrupts only c) Restarts the microprocessor
Answer: c) Both maskable and non-maskable interrupts d) Clears all flags
Explanation: The 8085 supports both types, such as TRAP (non- Answer: a) Resumes the interrupted program
maskable) and RST interrupts (maskable). Explanation: Like other interrupts, the ISR of a non-maskable
interrupt resumes the main program after execution.
26. What is a software interrupt?
a) Triggered by an internal instruction 30. What is the purpose of the Interrupt Acknowledge signal in
b) Triggered by external hardware 8085?
c) Always non-maskable a) Enables interrupts globally
d) Independent of program execution b) Informs the external device that the interrupt is being serviced
Answer: a) Triggered by an internal instruction c) Clears the interrupt flip-flop
Explanation: Software interrupts are invoked by executing specific d) Resets the stack pointer
instructions in the program, like RST instructions. Answer: b) Informs the external device that the interrupt is being
serviced
27. Which of the following interrupts is level-triggered in the 8085?
Explanation: The Interrupt Acknowledge signal ensures that the
a) TRAP
external device knows its request is being processed.
b) RST 7.5
c) RST 6.5
d) INTR
Answer: c) RST 6.5
Explanation: RST 6.5 is level-triggered, meaning it responds to a
steady high signal.
28. What is the default action of the 8085 on receiving a maskable
interrupt?
a) Execute the interrupt without checking the mask