Hardware

15.1 Computers and their

Components
Complex Instruction Set Computer
 Complex Instruction Set Computer

• Designed to execute tasks with minimal assembly code. [Efficiency at

higher-level coding]
 Complex Instruction Set Computer

• Designed to execute tasks with minimal assembly code. [Efficiency at

higher-level coding]
• Operates on complex instructions that may be internally decomposed
by the processor. [Microcode within the CPU handles this complexity]
 Complex Instruction Set Computer

Instruction Handling
 Complex Instruction Set Computer

Instruction Handling
• CISC processors enable a more streamlined approach to coding. For
instance, the instruction ADD x, y simplifies the addition of two variables.
[This reduces the lines of code needed for operations that might
otherwise take several steps.]
 Complex Instruction Set Computer

Instruction Handling
• CISC processors enable a more streamlined approach to coding. For
instance, the instruction ADD x, y simplifies the addition of two variables.
[This reduces the lines of code needed for operations that might
otherwise take several steps.]
• After execution, the result of the addition is stored back in the first
operand, depicted as x := x + y. [This is a common CISC practice, where
the operation’s result is stored in one of the input registers, promoting
efficiency in register usage.]
 Complex Instruction Set Computer

• Designed to execute tasks with minimal assembly code. [Efficiency at

higher-level coding]
 Complex Instruction Set Computer

• Designed to execute tasks with minimal assembly code. [Efficiency at

higher-level coding]
• Operates on complex instructions that may be internally decomposed
by the processor. [Microcode within the CPU handles this complexity]
 Complex Instruction Set Computer
Instruction Handling
 Complex Instruction Set Computer
Instruction Handling
• CISC processors enable a more streamlined approach to coding. For
instance, the instruction ADD x, y simplifies the addition of two variables.
[This reduces the lines of code needed for operations that might
otherwise take several steps.]
 Complex Instruction Set Computer
Instruction Handling
• CISC processors enable a more streamlined approach to coding. For
instance, the instruction ADD x, y simplifies the addition of two variables.
[This reduces the lines of code needed for operations that might
otherwise take several steps.]
• After execution, the result of the addition is stored back in the first
operand, depicted as x := x + y. [This is a common CISC practice, where
the operation’s result is stored in one of the input registers, promoting
efficiency in register usage.]
 Complex Instruction Set Computer

Instruction Length
 Complex Instruction Set Computer

Instruction Length
• Both Fixed and Variable Length instructions, providing flexibility to the
programmer and compiler.
 Complex Instruction Set Computer

Instruction Length
• Both Fixed and Variable Length instructions, providing flexibility to the
programmer and compiler.
• A Fixed Length instruction, simplifies the CPU's decoding process.
[However, it may not always be the most space-efficient, as simple
instructions occupy the same amount of space as more complex ones.]
 Complex Instruction Set Computer

Instruction Length
• Both Fixed and Variable Length instructions, providing flexibility to the
programmer and compiler.
• A Fixed Length instruction, simplifies the CPU's decoding process.
[However, it may not always be the most space-efficient, as simple
instructions occupy the same amount of space as more complex ones.]
• Variable Length instruction, can occupy varying amounts of space in
the instruction set. [This allows for a more compact representation of
complex instructions, but it requires a more sophisticated decoding
mechanism within the CPU to handle the variability in instruction size.]
 Complex Instruction Set Computer
Control Unit
 Complex Instruction Set Computer
Control Unit
• Hardwired Control Unit: Uses logic circuits for direct operation control.
[Faster due to fixed logic pathways]
 Complex Instruction Set Computer
Control Unit
• Hardwired Control Unit: Uses logic circuits for direct operation control.
[Faster due to fixed logic pathways]
• Programmable Control Unit: Employs microprograms for instruction
execution. [Complex instruction sets and adaptability]
 Complex Instruction Set Computer
Features
• Rich instruction set for diverse operations.
⚬ Small, individual instructions
• Fewer registers, with emphasis on memory-based processing. [Many
registers in modern CISC processors]
• Complex instructions for high-level operations.
• Various instruction formats for operational versatility. [Increased
complexity for flexibility]
 Complex Instruction Set Computer
Features
• Multicycle instructions, with one instruction leading to several micro-
operations.
⚬ MOVSB
￭ moves a byte from one memory location to another
￭ loading the source and destination addresses, moving the byte,
updating the pointers, and adjusting the counter.
• Utilizes variable length instructions for operational flexibility -> can
change number of bits utilised
• Challenges with instruction pipelining due to instruction complexity.
[Advanced pipelining techniques in modern processors]
 Cntd..

• Complex circuitry required to support the intricate instruction set.

 Cntd..

• Complex circuitry required to support the intricate instruction set.

• Multiple addressing modes for flexible data manipulation.
 Cntd..

• Complex circuitry required to support the intricate instruction set.

• Multiple addressing modes for flexible data manipulation.
• Generally, efficient RAM usage for instruction storage, not less RAM
usage overall.
 Cntd..

• Complex circuitry required to support the intricate instruction set.

• Multiple addressing modes for flexible data manipulation.
• Generally, efficient RAM usage for instruction storage, not less RAM
usage overall.
• Includes a programmable control unit for adaptable instruction
processing.
 Cntd..

• Complex circuitry required to support the intricate instruction set.

• Multiple addressing modes for flexible data manipulation.
• Generally, efficient RAM usage for instruction storage, not less RAM
usage overall.
• Includes a programmable control unit for adaptable instruction
processing.
• CISC relies on hardware to manage complex instructions. [Contrasts
with RISC’s software reliance]
Reduced Instruction Set Computer
 Reduced Instruction Set Computer

• Boasts fewer total number of instructions, optimizing processor

performance. [More straightforward CPU design can lead to efficiency
gains.]
 Reduced Instruction Set Computer

• Boasts fewer total number of instructions, optimizing processor

performance. [More straightforward CPU design can lead to efficiency
gains.]
• Eliminates the need for the CPU to decompose complex instructions.
[This can result in speedier and more predictable execution times.]
 Reduced Instruction Set Computer
Features
 Reduced Instruction Set Computer
Features
• Demonstrates a typical operation with loading, adding, and storing
values. [Illustrates RISC's load/store architecture which separates
memory access from ALU operations.]
 Reduced Instruction Set Computer
Example
 Reduced Instruction Set Computer
Example
• Fewer instructions which can lead to a more optimized set of
operations. [This approach can streamline the processor's instruction
set.]
 Reduced Instruction Set Computer
Example
• Fewer instructions which can lead to a more optimized set of
operations. [This approach can streamline the processor's instruction
set.]
• Many registers to minimize frequent memory access. [The use of
numerous registers facilitates quick data retrieval and storage.]
 Reduced Instruction Set Computer
Example
• Fewer instructions which can lead to a more optimized set of
operations. [This approach can streamline the processor's instruction
set.]
• Many registers to minimize frequent memory access. [The use of
numerous registers facilitates quick data retrieval and storage.]
• Simpler instructions for ease of implementation and efficiency. [Simpler
instructions typically result in faster, more efficient processing.]
Reduced Instruction Set Computer
 Reduced Instruction Set Computer

• Usually employs single-cycle instructions for rapid execution. [Each

instruction is executed in one clock cycle, which can enhance
performance.]
 Reduced Instruction Set Computer

• Usually employs single-cycle instructions for rapid execution. [Each

instruction is executed in one clock cycle, which can enhance
performance.]
• Predominantly fixed-length instructions contribute to simple and fast
decoding. [Fixed-length instructions allow for easier and more efficient
pipelining within the CPU.]
 Reduced Instruction Set Computer

• Usually employs single-cycle instructions for rapid execution. [Each

instruction is executed in one clock cycle, which can enhance
performance.]
• Predominantly fixed-length instructions contribute to simple and fast
decoding. [Fixed-length instructions allow for easier and more efficient
pipelining within the CPU.]
• Better pipelineability due to uniform instruction size and timing. [Uniform
instructions can improve throughput and reduce execution time.]
 Reduced Instruction Set Computer

• Requires less complex circuitry than CISC counterparts. [Simplified

instruction sets mean the hardware can be less complex.]
 Reduced Instruction Set Computer

• Requires less complex circuitry than CISC counterparts. [Simplified

instruction sets mean the hardware can be less complex.]
• Fewer addressing modes, which simplifies the instruction set. [Less
complexity in addressing modes can lead to more optimized instruction
processing.]
 Reduced Instruction Set Computer

• Requires less complex circuitry than CISC counterparts. [Simplified

instruction sets mean the hardware can be less complex.]
• Fewer addressing modes, which simplifies the instruction set. [Less
complexity in addressing modes can lead to more optimized instruction
processing.]
• Makes more use of RAM due to frequent load/store operations. [Despite
RISC's efficient register use, its architecture may lead to increased
memory usage.]
 Reduced Instruction Set Computer

• Typically incorporates a hardwired control unit for faster instruction

processing. [Hardwired logic facilitates quicker instruction decoding
compared to a programmable control unit.]
 Reduced Instruction Set Computer

• Typically incorporates a hardwired control unit for faster instruction

processing. [Hardwired logic facilitates quicker instruction decoding
compared to a programmable control unit.]
• RISC relies more on software optimizations to achieve efficiency.
[Compilers play a crucial role in translating high-level code into an
effective set of RISC instructions.]
Comparison
Pipelining
 Pipelining

• Pipelining is a form of instruction-level parallelism that allows for

multiple instructions to be in different stages of execution
simultaneously. [Enhances CPU throughput and efficiency]
 Pipelining

• Pipelining is a form of instruction-level parallelism that allows for

multiple instructions to be in different stages of execution
simultaneously. [Enhances CPU throughput and efficiency]
• Execution is divided into several sequential stages, enabling different
instructions to be processed at each stage during the same cycle.
[Similar to an assembly line in a factory]
 Pipelining

• As soon as the first stage of an instruction is complete, the first stage of

the next instruction can commence. [This overlapping process
increases the instruction flow rate]
 Pipelining

• As soon as the first stage of an instruction is complete, the first stage of

the next instruction can commence. [This overlapping process
increases the instruction flow rate]
• Subsequent instructions can begin execution before the previous ones
have completed all their stages. [Maximizes CPU resource utilization]
 Pipelining

• As soon as the first stage of an instruction is complete, the first stage of

the next instruction can commence. [This overlapping process
increases the instruction flow rate]
• Subsequent instructions can begin execution before the previous ones
have completed all their stages. [Maximizes CPU resource utilization]
• Multiple instructions are processed at once, though each at different
stages, allowing for concurrent processing. [Reduces idle time between
instruction executions]
The Five Stages of Processor Pipelining

• Instruction Fetch (IF): Retrieves the instruction from memory. [Critical for
lining up the next instruction to be executed]
The Five Stages of Processor Pipelining

• Instruction Fetch (IF): Retrieves the instruction from memory. [Critical for
lining up the next instruction to be executed]
• Instruction Decode (ID): Interprets what the instruction is and what
actions are required. [Translates binary code into control signals for
other CPU parts]
The Five Stages of Processor Pipelining

• Instruction Fetch (IF): Retrieves the instruction from memory. [Critical for
lining up the next instruction to be executed]
• Instruction Decode (ID): Interprets what the instruction is and what
actions are required. [Translates binary code into control signals for
other CPU parts]
• Operand Fetch (OF): Gathers the data needed for the execution.
[Involves accessing CPU registers or memory]
The Five Stages of Processor Pipelining

• Instruction Execution (IE): Carries out the instruction. [The actual

operation, like addition or comparison, takes place here]
The Five Stages of Processor Pipelining

• Instruction Execution (IE): Carries out the instruction. [The actual

operation, like addition or comparison, takes place here]
• Write Back (WB): Saves the result to the appropriate place, such as a
register or memory. [Completes the instruction cycle by storing the
output]
Interrupts
 Interrupts

• Pipelined architectures add complexity to interrupt handling due to

simultaneous instruction stages. [Careful management is required to
address interrupts without compromising ongoing processes.]
 Interrupts

• Pipelined architectures add complexity to interrupt handling due to

simultaneous instruction stages. [Careful management is required to
address interrupts without compromising ongoing processes.]
• Upon an interrupt, the standard protocol is to complete the instruction
in the write-back stage, ensuring data integrity. [Completing current
operations before servicing the interrupt avoids data loss or corruption.]
 Interrupts

• Pipelined architectures add complexity to interrupt handling due to

simultaneous instruction stages. [Careful management is required to
address interrupts without compromising ongoing processes.]
• Upon an interrupt, the standard protocol is to complete the instruction
in the write-back stage, ensuring data integrity. [Completing current
operations before servicing the interrupt avoids data loss or corruption.]
• The remaining instructions in the pipeline are typically flushed, except
for the one in the write-back stage. [Flushing instructions prevents
executing operations that may be affected by the interrupt.]
 Interrupts

• The interrupt handler routine is then executed for the remaining

instruction, and once serviced, the processor resumes with the next
instruction. [Efficient interrupt handling is essential to prevent
bottlenecks in system performance, especially in systems with high
interrupt loads.]
 Interrupts
Alt strategy
 Interrupts
Alt strategy
• An alternative interrupt handling method involves saving the context of
all pipeline stages. [This context saving is critical for complex
operations that cannot be easily discarded.]
 Interrupts
Alt strategy
• An alternative interrupt handling method involves saving the context of
all pipeline stages. [This context saving is critical for complex
operations that cannot be easily discarded.]
• After the interrupt is serviced, the processor can be restored to its
previous state, allowing for seamless continuation of tasks. [Restoring
the processor's state ensures that no computational progress is lost
and system stability is maintained.]
Flynn's Taxonomy
 Flynn's Taxonomy

Flynn's Taxonomy is a system for classifying computer architectures

based on the number of instruction streams and data streams they can
handle in parallel. [It is a foundational framework for understanding
different computer architectures.]
 Flynn's Taxonomy
SISD (Single Instruction, Single Data)
 Flynn's Taxonomy
SISD (Single Instruction, Single Data)

• Represents traditional non-parallel processing with a single processor

performing one operation at a time on a single data element. [Like a
person doing math with a paper and pencil, each problem is solved one
at a time.]
 Flynn's Taxonomy
SISD (Single Instruction, Single Data)

• Represents traditional non-parallel processing with a single processor

performing one operation at a time on a single data element. [Like a
person doing math with a paper and pencil, each problem is solved one
at a time.]
• There is only one processor, and each task is processed in a sequential
order, not allowing for parallel processing. [This can be visualized as a
single-lane road where each car (instruction) must wait for the one in
front to pass.]
SIMD (Single Instruction, Multiple Data)
SIMD (Single Instruction, Multiple Data)
• SIMD architectures use multiple processors, each with several ALUs, to
perform the same instruction on different data points simultaneously.
[A real-world example would be a washing machine that
simultaneously washes multiple clothes with the same cycle setting.]
SIMD (Single Instruction, Multiple Data)
• SIMD architectures use multiple processors, each with several ALUs, to
perform the same instruction on different data points simultaneously.
[A real-world example would be a washing machine that
simultaneously washes multiple clothes with the same cycle setting.]
• An example in computing could be an image processing operation
where each processor increases the brightness of different pixels in an
image concurrently. [If an image is divided into sections, each section's
pixels can be processed in parallel to enhance the image faster than if
done sequentially.]
MISD (Multiple Instruction, Multiple Data)
MISD (Multiple Instruction, Multiple Data)
• MIMD systems have several processors that can execute different
instructions on different sets of data. [Think of a team of workers in a
kitchen, each preparing a different dish independently.]
MISD (Multiple Instruction, Multiple Data)
• MIMD systems have several processors that can execute different
instructions on different sets of data. [Think of a team of workers in a
kitchen, each preparing a different dish independently.]
• This type of architecture allows for a high degree of parallelism and is
typical in multi-core processors. [In a data center, for example, different
servers might handle different tasks like web hosting, database
management, and email services concurrently.]
MISD (Multiple Instruction, Multiple Data)
• MIMD systems have several processors that can execute different
instructions on different sets of data. [Think of a team of workers in a
kitchen, each preparing a different dish independently.]
• This type of architecture allows for a high degree of parallelism and is
typical in multi-core processors. [In a data center, for example, different
servers might handle different tasks like web hosting, database
management, and email services concurrently.]
⚬ Parallel processing is the capability of a computer to perform many
operations simultaneously, enhancing performance and efficiency.
[This is akin to a team of employees working on different tasks at the
same time, increasing the overall productivity of a business.]
Massively Parallel Computers
 Massively Parallel Computers

• A massively parallel computer is characterized by a large number of

processors working in unison to solve complex computational
problems. [These systems are designed to perform a high volume of
calculations simultaneously, which is crucial for tasks like climate
modelling or large-scale simulations.]
 Massively Parallel Computers

• A massively parallel computer is characterized by a large number of

processors working in unison to solve complex computational
problems. [These systems are designed to perform a high volume of
calculations simultaneously, which is crucial for tasks like climate
modelling or large-scale simulations.]
• Processors work collaboratively on the same program and execute
different parts of it concurrently, often communicating via a
message-passing interface. [This is akin to a large orchestra where
each musician plays a different part of a composition in sync with
others.]
 Massively Parallel Computers

• They feature a vast number of processors that may range from

hundreds to thousands, all contributing to a common computational
goal. [The sheer number of processors allows for the division of tasks
into smaller, manageable chunks that can be processed in parallel.]
 Massively Parallel Computers

• They feature a vast number of processors that may range from

hundreds to thousands, all contributing to a common computational
goal. [The sheer number of processors allows for the division of tasks
into smaller, manageable chunks that can be processed in parallel.]
• Collaborative and simultaneous processing is fundamental, enabling
the system to tackle complex mathematical problems that are
beyond the capabilities of a single processor or a small cluster of
processors. [This parallelism is particularly effective for operations
that can be divided into independent units, such as processing
different pixels of an image.]
 Massively Parallel Computers

• A network infrastructure that allows processors to communicate by

sending and receiving messages. [Each processor acts like a node in
a vast network, exchanging information as needed to coordinate the
overall task.]
 Massively Parallel Computers

• A network infrastructure that allows processors to communicate by

sending and receiving messages. [Each processor acts like a node in
a vast network, exchanging information as needed to coordinate the
overall task.]
• A specialized bus or communication system is required to facilitate
the rapid exchange of data between processors. [The communication
system must be robust and efficient to prevent bottlenecks.]
Problems
Problems

• Hardware: Processors need to be able to communicate effectively so

that processed data can be transferred from one processor to another
without significant delays. [The hardware must support fast and
reliable communication channels between all processors to prevent
data transfer from becoming a limiting factor.]
• Software: An appropriate programming language should be used
which allows data to be processed by multiple processors
simultaneously. [The software must be designed to exploit the
hardware's parallel processing capabilities, which often requires
parallel programming paradigms and specialized languages or
libraries.]
Running Parallel Code
 Running Parallel Code

• Code Segmentation:
 Running Parallel Code

• Code Segmentation:
⚬ The program should be split into blocks of code. This division allows
tasks to be executed simultaneously across many processors. [For
example, in data analysis, different processors could handle
calculations for separate chunks of a large dataset at the same
time.]
 Running Parallel Code

• Distributed Processing:
 Running Parallel Code

• Distributed Processing:
⚬ Each block is then processed by a different processor, enabling
multiple blocks to be processed independently and concurrently.
[Consider a simulation of weather patterns where calculations for
different geographic regions are handled by separate processors.]
 Running Parallel Code

• Parallel Execution:
 Running Parallel Code

• Parallel Execution:
⚬ Requires orchestration between parallel tasks, ensuring that tasks
that are dependent on the output of others are synchronized. [In the
weather simulation, while one processor calculates temperature
changes, another might calculate humidity levels, and they must
exchange this information to predict weather patterns accurately.]
Virtual Machines
 Virtual Machines

• Computers are built on Hardware... Duhh!

 Virtual Machines

• Computers are built on Hardware... Duhh!

• But hardware is ugly, and it knows it is ugly
 Virtual Machines

• Computers are built on Hardware... Duhh!

• But hardware is ugly, and it knows it is ugly
• Hardware, therefore, begs the OS to make it pretty to the users
 Virtual Machines

• Computers are built on Hardware... Duhh!

• But hardware is ugly, and it knows it is ugly
• Hardware, therefore, begs the OS to make it pretty to the users
⚬ The OS acts as a liaison between Hardware and User / Applications
 Virtual Machines

• Computers are built on Hardware... Duhh!

• But hardware is ugly, and it knows it is ugly
• Hardware, therefore, begs the OS to make it pretty to the users
⚬ The OS acts as a liaison between Hardware and User / Applications
• Definition of VMM:
 Virtual Machines

• Computers are built on Hardware... Duhh!

• But hardware is ugly, and it knows it is ugly
• Hardware, therefore, begs the OS to make it pretty to the users
⚬ The OS acts as a liaison between Hardware and User / Applications
• Definition of VMM:
⚬ A VMM is software that allows an operating system (OS) to run within
another OS. (Think of it like a computer within a computer, where the
VMM creates isolated environments for different OSs to operate.)
 Virtual Machines

• Distinguishing Host and Guest OS:

 Virtual Machines

• Distinguishing Host and Guest OS:

⚬ Host Operating System: The primary OS that manages the physical
hardware and runs the VMM software. (The foundation that supports
virtualization.)
 Virtual Machines

• Distinguishing Host and Guest OS:

⚬ Host Operating System: The primary OS that manages the physical
hardware and runs the VMM software. (The foundation that supports
virtualization.)
⚬ Guest Operating System: An OS that operates within a virtual
machine, utilizing virtualized hardware provided by the VMM. (Similar
to a tenant living in a rented space provided by the landlord, the host
OS.)
• Role of Virtual Machines:
• Role of Virtual Machines:
⚬ A virtual machine is essentially a software emulation of a computer
system, allowing multiple, isolated OSs to run on a single physical
machine. (It's like having several distinct offices within one building,
each running independently.)
• Role of Virtual Machines:
⚬ A virtual machine is essentially a software emulation of a computer
system, allowing multiple, isolated OSs to run on a single physical
machine. (It's like having several distinct offices within one building,
each running independently.)

• Operation of Virtual Machines:

• Role of Virtual Machines:
⚬ A virtual machine is essentially a software emulation of a computer
system, allowing multiple, isolated OSs to run on a single physical
machine. (It's like having several distinct offices within one building,
each running independently.)

• Operation of Virtual Machines:

⚬ Each virtual machine operates its guest OS independently, sharing
the host's resources, which the VMM allocates and manages.
(Multiple guests can operate simultaneously without interfering with
each other, thanks to the VMM's management.)
The Mechanism
 The Mechanism

• When a Guest Operating System (OS) receives a data request from an

application, it processes the request as if it were operating on its own
physical hardware. The Guest OS is not aware that it is actually running
on a virtual machine.
 The Mechanism

• When a Guest Operating System (OS) receives a data request from an

application, it processes the request as if it were operating on its own
physical hardware. The Guest OS is not aware that it is actually running
on a virtual machine.
• The request from the application, which is running on the Guest OS,
might include actions like reading a file or writing data.
 The Mechanism

• When a Guest Operating System (OS) receives a data request from an

application, it processes the request as if it were operating on its own
physical hardware. The Guest OS is not aware that it is actually running
on a virtual machine.
• The request from the application, which is running on the Guest OS,
might include actions like reading a file or writing data.
• Virtual Machine (VM) software translates these input/output requests
into a form that the Host OS can understand and execute since the Host
OS has control over the physical resources.
 The Mechanism

• The Host OS retrieves the required data from its storage, like fetching
contents from a file on the disk.
 The Mechanism

• The Host OS retrieves the required data from its storage, like fetching
contents from a file on the disk.
• After retrieval, the Host OS passes the data back to the VM software.
 The Mechanism

• The Host OS retrieves the required data from its storage, like fetching
contents from a file on the disk.
• After retrieval, the Host OS passes the data back to the VM software.
• The VM software then relays the data to the Guest OS.
 The Mechanism

• The Host OS retrieves the required data from its storage, like fetching
contents from a file on the disk.
• After retrieval, the Host OS passes the data back to the VM software.
• The VM software then relays the data to the Guest OS.
• Finally, the Guest OS delivers the data to the application, completing
the request cycle
 The Mechanism

• The Host OS retrieves the required data from its storage, like fetching
contents from a file on the disk.
• After retrieval, the Host OS passes the data back to the VM software.
• The VM software then relays the data to the Guest OS.
• Finally, the Guest OS delivers the data to the application, completing
the request cycle
Tasks Performed By VM Software
 Tasks Performed By VM Software

• VM Creation: The VM software is responsible for creating virtual

machines, each acting as an independent computer. (This allows
multiple OS environments to coexist on a single physical machine.)
 Tasks Performed By VM Software

• VM Creation: The VM software is responsible for creating virtual

machines, each acting as an independent computer. (This allows
multiple OS environments to coexist on a single physical machine.)
• Hardware Emulation: It emulates computer hardware to allow guest
operating systems to operate as though they have their own dedicated
hardware. (This is crucial for compatibility and ensures that software
designed for different hardware can run without modifications.)
 Tasks Performed By VM Software

• Virtual Hardware Control: The software controls virtualized hardware

resources, allocating them as needed to different virtual machines. (It
manages resources such as CPU, memory, and storage, distributing
them among the VMs.)
 Tasks Performed By VM Software

• Virtual Hardware Control: The software controls virtualized hardware

resources, allocating them as needed to different virtual machines. (It
manages resources such as CPU, memory, and storage, distributing
them among the VMs.)
• Isolation of Virtual Machines: VM software ensures that each virtual
machine is isolated from others, preventing the actions within one VM
from affecting another. (Provides security and stability by containing
any issues within the individual VM.)
VMs in App Testing
 VMs in App Testing

• Virtual machine software enables the creation and management of

separate virtual environments, or VMs, where each can run a different
guest operating system. (Allows testing of an application across
different operating systems without the need for multiple physical
machines.)
 VMs in App Testing

• Virtual machine software enables the creation and management of

separate virtual environments, or VMs, where each can run a different
guest operating system. (Allows testing of an application across
different operating systems without the need for multiple physical
machines.)
• It translates instructions from the guest OS to the host OS and emulates
the required hardware for the guest OS. (Acts as a translator and a
mimic of physical hardware for the guest OS, making the application
believe it's running on a real machine.)
 VMs in App Testing

• With VMs, multiple instances of an application can be tested

simultaneously, ensuring that the app behaves consistently across
different environments. (Facilitates concurrent testing scenarios, which
is essential for cross-platform compatibility checks.)
Benefits
Benefits
• Multiple operating systems can exist and run tests concurrently on the
same physical hardware. (Imagine testing an app on Windows, Linux,
and macOS at the same time on a single computer.)
Benefits
• Multiple operating systems can exist and run tests concurrently on the
same physical hardware. (Imagine testing an app on Windows, Linux,
and macOS at the same time on a single computer.)
• Only one set of physical hardware is required, which can significantly
reduce the costs associated with testing on multiple devices. (Like
having one stage for multiple plays instead of building a new stage for
each one.)
Benefits
• Multiple operating systems can exist and run tests concurrently on the
same physical hardware. (Imagine testing an app on Windows, Linux,
and macOS at the same time on a single computer.)
• Only one set of physical hardware is required, which can significantly
reduce the costs associated with testing on multiple devices. (Like
having one stage for multiple plays instead of building a new stage for
each one.)
• It reduces the cost of producing the application as there is no need to
set up more than one computer for testing. (Cost-effective, similar to
needing just one test kitchen to try recipes for multiple cuisines.)
Drawbacks
Drawbacks
• The execution of extra code by the VM can lead to degraded
performance, potentially making it challenging to assess the app's true
response time and behavior under normal conditions. (Similar to
having a rehearsal with an extra layer of complexity, like actors
performing with additional props, which may not be present in the live
performance.)
 Software Production
Benefits
 Software Production
Benefits
• Cross-Platform Testing: Software can be tested on different operating
systems using the same hardware, eliminating the need for multiple
testing environments. (This simulates how the software would operate
on various platforms, ensuring compatibility.)
 Software Production
Benefits
• Cross-Platform Testing: Software can be tested on different operating
systems using the same hardware, eliminating the need for multiple
testing environments. (This simulates how the software would operate
on various platforms, ensuring compatibility.)
• Cost Efficiency: There's no need to purchase different types of hardware
for testing, which can reduce overall production costs. (Saves on the
expenses associated with acquiring and maintaining a diverse set of
physical machines.)
 Software Production
Benefits
• System Crash Recovery: If the software causes a system crash,
recovery is easier because the virtual environment can be reset or
recreated quickly. (Virtual machines can be snapshots or cloned,
allowing for rapid restoration to a pre-crash state.)
 Software Production
Benefits
• System Crash Recovery: If the software causes a system crash,
recovery is easier because the virtual environment can be reset or
recreated quickly. (Virtual machines can be snapshots or cloned,
allowing for rapid restoration to a pre-crash state.)
• Isolation: Virtual machines provide protection to the host system from
potentially malfunctioning software. (Acts like a sandbox, keeping the
main system safe from any instability caused by the software.)
Drawbacks
Drawbacks
• Performance Overhead: Using a VM involves the execution of extra
code, so there's an increase in processing time, affecting the
assessment of the software's performance. (The additional layer of
virtualization can introduce latency, which might not reflect the app's
true performance on a physical machine.)
Drawbacks
• Performance Overhead: Using a VM involves the execution of extra
code, so there's an increase in processing time, affecting the
assessment of the software's performance. (The additional layer of
virtualization can introduce latency, which might not reflect the app's
true performance on a physical machine.)
• Resource Constraints: A virtual machine might not be as efficient
because it may not have access to sufficient memory resources. (VMs
share the host's resources, which might lead to resource contention
and limited performance.)
Drawbacks
• Hardware Emulation Limits: Some hardware features may not be
emulated accurately by VMs, potentially limiting the scope of testing.
(Specific hardware-dependent features or performance characteristics
might not be fully replicated in a virtual environment.)
VM in Web Servers
 VM in Web Servers

• Operating System Replacement: VMs can be used to test alternative

operating systems easily, identifying potential compatibility issues.
(Instead of physically replacing the OS, a new VM can be spun up with
minimal effort.)
 VM in Web Servers

• Operating System Replacement: VMs can be used to test alternative

operating systems easily, identifying potential compatibility issues.
(Instead of physically replacing the OS, a new VM can be spun up with
minimal effort.)
• Safe Testing Environment: They provide a safe environment for testing
changes without disrupting live web server services. (Allows developers
and testers to try out new configurations without risk to the production
environment.)
 VM in Web Servers

• Web Server Software Testing: VMs enable testing of different web server
software across various operating systems and configurations.
(Facilitates a comprehensive testing strategy, ensuring that the web
server software performs well in diverse environments.)