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Shahzad HW8

The document outlines a homework assignment for CS21, focusing on integers and computer architecture, with a total of 10 points due on March 11, 2025. It includes tasks such as creating truth tables for logical operations, converting decimal numbers to hexadecimal and binary, and understanding the implications of carry and overflow in binary arithmetic. Additionally, it covers the requirements for implementing registers and adders in digital circuits.

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11 views3 pages

Shahzad HW8

The document outlines a homework assignment for CS21, focusing on integers and computer architecture, with a total of 10 points due on March 11, 2025. It includes tasks such as creating truth tables for logical operations, converting decimal numbers to hexadecimal and binary, and understanding the implications of carry and overflow in binary arithmetic. Additionally, it covers the requirements for implementing registers and adders in digital circuits.

Uploaded by

opbracc578
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CS21 - Section D01 - Spring 2025 – HW8

Topic:Integers and architecture

Points:10

Due : Thursday Mar 11by 9:30 AM

1. Provide the truth tables for AND, OR, and NAND.

X Y X AND Y

0 0 0

0 1 0

1 0 0

1 1 1

X Y X OR Y

0 0 0

0 1 1

1 0 1

1 1 1

X Y X NAND
Y
0 0 1

0 1 1

1 0 1

1 1 0

2. Convert decimal 68 to hex, then binary, then give its 2's compliment.
Decimal: 68
Hex: 44h
Binary: 0100 0100
Two’s Compliment: 1011 1100

3. Repeat #2 but for decimal 169.


Decimal: 169
Hex: A9h
Binary: 1010 0110
Two’s Compliment: 0101 0111

4. How many flip-flops do you need to implement a 16-bit register?


16 flip-flops as each flip-flop stores 1 bit so a 16-bit register needs 16 flip-flops

5. How many half-and full-adders do you need to implement 16-bit addition?


1 half-adder and 15 full-adders
The first bit uses a half-adder as there is no carry in and for the other 15 bits use a full-adder to
handle the carry in and out.

6. We subtract 4 from 5. What are the settings of the zero and sign flags?
5-4=1
The zero flag is 0 (not set) as the result is not equal to zero
The sign flag is 0 (not set) as the result is positive
7. We compare 6 and 4. What are the settings of the zero and sign flags?
Scenario 1:
MOV RAX, 6
CMP Rax, 4 ; does 6 - 4
;Zero flag is 0 (not set) result is not zero
;Sign flag is 0 ( not set) as the result is positive

Scenario 2:
MOV RAX, 4
CMP RAX, 6 ; does 4 - 6
;Zero flag is 0 (not set) result is not zero
; Sign flag is 1 ( set) result is negative

8. Here's a byte. 03h. What possible decimal values could it represent?


Since the MSB is 0, Signed or Unsigned, it represents decimal 3

9. Repeat #8 but for A3h.


Unsigned = 163
Signed = -93

10. Practically speaking, what does it mean when you get a carry? When you get an overflow?
Carry: It means the unsigned addition exceeded the bit limit
Overflow: Occurs when signed addition exceeds range (carry in and carry out don’t match)

11. We have this quadword in storage: 19283746abcdef01h. We load it into a 64-bit reg. What
is in the reg?
01 ef cd ab 46 37 28 19h

12. We subtract 1 from the reg. What's in the reg?


01 ef cd ab 46 37 28 18h

13. We store that reg back where it came from. What is in storage there, now?
18 28 37 46 ab cd ef 01h

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