Microcontroller versus general-purpose microprocessor

What is the difference between a microprocessor and microcontroller: By microprocessor is m

Prpose microprocessors such as Intel's x86 family (8086, 80286, 80386, 80486, and the Pentium) or M. eant the genera
auly (68000, 6S010, 68020, 68030, 68040, etc.). These microprocessors contain no RAM, no ROM,
tne
, and
and noos
no
Oports
orola's 6h
chp itself. For this reason, they are commonly referred to as general-purpose microprocessors.
ASy'stem designer using a general-purpose microprocessor such as the rentium Or the
b8040 must add
1/Oports, and timers externally to make them functional. Although the addition ot external RAM, ROM RA ROM RAM
makes these
can
systems bulkier
decide on the amount of
and much more expensive, they have the advantage of
versatility such tha
that the d
RAM, ROM, and I/O ports needed to fit the task at hand. This is not the case ui
Opots
cOntrollers. A microcontroller has a CPU
a timer all on a
(a microprocessor) inaddition to fixed amount of
a
RAM, ROM, I/O Doa
single chip. In other words, the processor, RAM, ROM, I/0 ports, and timer are all embedded tocel orts, and
o n one
chip; therefore, the designer cannot add any external memory, I/O, or timer to it. The fixed amount
ROM, RAM, and number of I/O of on-ch
ports in microcontrollers makes them ideal for many applications in which cost and
space are critical. In many applications, for
a 486 or even an 8086
example a TV remote control, there is no need for the
computing power of
microprocessor. In many applications, the space it takes, the power it consumes, and the
per unit are much more critical considerations than the prie
I/O computing power. These applications most often require some
operations to read signals and turn on and off certairn bits. For this reason some call these
processors" (see "Good Things in Small Packages Are Generating Big Product processors IBP, "itty-bity
magazine, September 1994; www.byte.com, for an excellent discussion of Opportunities" by Rick Grehan, bYIE
It is interesting to note that some microcontroller manufacturers
microcontrollers).
have gone as far as integrating an ADC
digital converter) and other peripherals into the microcontroller. (analog
 EXTERNAL
INTERRUPTS
ON-CHIP
ROM
for
INTERRUPT ETC.
program ON-CHIPP
CONTROL TIMER 0
code RAM
TIMER1

CPU

BUS 4 1/O SERIAL

OSC
CONTROL PORTS PORT

PO P2 P1 P3 TXD RXD

ADDRESS/DATA

Figure 1-2. Inside the 8051 Microcontroller Block Diagram

 SECTION 2.1: INSIDE THE 8051
In this section we examine the major registers of the 8051 and show their use with the simple instructions MOw
and ADD. MOV

Registers
In CPU, registers used to store information temporarily. That information could be byte of data toh
the are a
processed, or an address pointing to the data to be fetched. The vast majority of 8051 registers are 8-bit registers. Inthe
8051 there is only one data type: 8 bits. The 8 bits of a
register are shown in the diagram from the MSB (most significant
bit) D7 to the LSB (least significant bit) DO. With an 8-bit data type, any data larger than 8 bits must be broken into 8-bit
chunks before it is processed. Since there are a
large number of registers in the 8051, we will concentrate on some of the
widely used general-purpose registers and cover special registers in future chapters. See Appendix A.2 for a complete
list of 8051 registers.

D7 D6 D5 D4 D3 D2 D DO

The most widely used

registers of the 8051 are A (accumulator), B, RO, R1, R2, R3, R4, R5, R6, R7, DPTR (data
pointer), and PC (program counter). All of the above registers are 8-bits, except DPTR and the counter. The
accumulator, register A, is used for all arithmetic and logic instructions. To understand the useprogram
of these registers, we
will show them in the context of two
simple instructions, MOV and ADD.
SECTION 2.4: THE PROGRAM COUNTER AND ROM SPACE IN THE 8051
(PC) register in executing an 8051 program. We also
In this section we examine the role of the program counter
discuss ROM memory space for various 8051 family members.

Program counter in the 8051

Another important register in the8051 is the PC (program counter)-The program counter points to the address of
the next instruction to be executed/As the CPU fetches the opcode from the program ROM, the program counter is
incremented to point to the next instruction. The program counter in the 8051 is 16 bits wide. This means that the 8051
can access program addresses 0000 to FFFFH, a total of 64K bytes of code. However, not all members of the 8051 have
the entire 64K bytes of on-chip ROM installed, as we will see soon. Where does the 8051 wake up when it is powered?
We will discuss this important topic next.

8051 A.SSEMBLY LANGUAGE PROGRAMMING 35

 poweredup
whenit is is: At what address does
Where the 8051 wakes up microprocessor)
microcontroller (or
the 8051 family (thatis, al
C
must ask about any
we In the case ofdifferent. powbe
One question that microprocessor is address 0000 when it is
it? Each at memory
power to microcontroller
wakes up when theRa
Wake up upon applying the 4. In other words,
maker and variation), discussed in Chapter
as the first opcode to bec
regardless of the to the RESET pin it
we m e a n applying Ver in it. This m e a n s that expects locationo
By powering up has the value of 0000 be burned into memory
the PC (program counter) the first opcode must We achieve this by the Ob
powered up, r e a s o n in the
8051 system, it is booted.
address 0000H. For this instruction when
at ROM first action of the program counter i
since this is where
it looks for the
ROM we discuss the step-by-step
of program earlier. Next,
as shown
s o u r c e program
statement in the
a program.
fetching and executing sample
we examin_
program ROM a program,
Placing code in counter in fetching and executing more the list fil-
of the role of the program examine once
and executed. First, we
To get a better understanding instruction is fetched and operan-
counter as each As we can see, the opcode
the action of the program ROM of an 8051 chip.
in the
and how the code is placed
of the sample program the list file (Program 2-1). or DS5000,
the opcod
listed on the left side of or AT8951
for each instruction are member such as 8751
8051 family
burned into ROM of an the list below.
After the program is as shown in
locations starting at 0000
are placed in ROM memory
and operand
Assemb1y Language
ROM Address Machine Languagge
MOV R5, #25H
7D25
0000 MOV R7, #34H

7F34
0002 MOV A, #0
7400 ADD A, R5
0004
2D
0006 ADD A, R7
2F
0007 ADD A, # 12H
2412 HERE: SJMP HERE
0008
80FE
0 0A and address-
a value
into register R5,
for moving #25H" has a
contains 7D, which
is the opcode instruction "MOV R5,
that address 0000 Therefore, the
The list shows moved to R5. machine code "7F34"
is located
(in this case 25H) to be Similarly, the
0001 contains the operand and 25 is the operand. "MOV R7, #34H
instruction
where 7D is the opcode the for the
machine code of "7D25", and operand and
and represents the opcode 0005 and represents the opcode
locations 0002 and 0003 locations 0004 and
in memory located in memory of 2D, which is the opcode
machine code "7400" is location 0006 has the opcode
In the s a m e way, #0". The memory the opcode for the "ADD
instruction "MOV A, content 2F, which is
the operand for the location 0007 has the and the operand 12H at
instruction "ADD A,
R5" and memory is located at address 0008
for the "ADD A, #12H
instruction. The opcode
for the instruction
A, R7"

at location 0
ORG OH ; start
1 0000
MOV R5, #25H ;load 25H into R5
2 0000 7D25 34H into R7
MOV R7, #34H ;load
3 0002 7F34
MOV A, #0 ;load 0 into A
4 0004 7400 R5 to A
ADD A, R5 add c o n t e n t s of
5 0006 2D =
now A A + R5
;

ADD A, R7 ,add contents of R7 to A

6 0007 2P
; now A = A + R7

ADD A, #12H , -add to A value 12H

7 0008 2412
now A = A + 12H

8 000A 80FE HERE SJMP HERE ;stay in this loop

END end of asm source file
9 000C

Program 2-1: List File

DED SYSTEMS

36 THE 8051 MICROCONTROLLER AND EMBEDDE

 10W Llally
DB "1234" (b) MY_DATA -
for the following8
(a) ASC_DATA: locations 200H 205H
State the contents of memory
5.
ORG 20OH
DB "ABC123"
MYDATA:

REGISTER
BITS AND THE PSW conditions such as
FLAG arithmetic the c
SECTION 2.6: 8051 to indicate
8051 has a flag register this section we discuss varioe
the various bits
other microprocessor, register. In
Like any in the 8051 is called the program status word (PSW)
The flag register altered.
some examples
of how it is
register and provide

PSW (program status word) register referred to as

the jilag regisler. Althou
also
is an 8-bit register. It is
bits are user-definable fao
word (PSW) register The two unused
The program status used by the 8051. after an instr
6 bits of it are conditions that result
some uction
PSW register is 8 bits wide, only indicate
flags, meaning that they OV (overtlow).
of the are called
conditional and
flags carry), P (parity), and are i e .
executed. These four are CY (carry), AC (auxiliary as RS0 and RS1, respectively, Used
are designated
PSW.3 and PSW.4 and PSW.1 bits are general-purposesta
As seen
from Figure 2-4, the bits PSW.5
the next section. The user definable. See Figure
are explained in
bank registers. They other words, they are
change the for any purpose. In
used the programmer
flagbits and can be by
for the bits of the PSW register. PSW register. The impact of instructions
four of the flag bits of the
brief explanation of
The following text is a
these registers is then discussed.

P
RSO OV
CY AC FO RS1

CY PSW.7 Carry flag

AC PSW.6 Auxiliary carry flag
Available to the user for general purpose.
FO PSW.5
bit 1.
RS1 PSW4 Register Bank selector
selector bit 0.
RSO PSW.3 Register Bank
OV PSW2 Overflow flag.
User-definable bit.
PSW.1
instuction cycle
Set/cleared by hardware each
PSW.0 Parity flag
the accumulator.
to indicate an odd/even number of 1 bits in

RST RSO Register Bank Address

0 00H-07H
0
08H -OFHH
10H - 17H

18H - 1FH
3

Figure 2-4. Bits of the PSW Register

THE 8051 MICROCONTROLLER AND EMBEDDED SY51E

40
CY, the carry flag Table 2-1: Instructions
That
D7 bit. This flag bit is Affect El
This flag isset whenever
there is a carry out from the
also be set to 1 or 0 directl h
Bits
subtraction.
addition or nstruction CY OV AC
affected after an 8-bit
It can "sETB C" stands for "set bit
and "CLR
an instruction
such as "SETB C" C Where and other bit-addressable ADD X
More a b o u t these X
for "clear carry".
carry" and "CLR C" ADDC X
in Chapter 8.
given
instructions will be
SUBB X

MUL 0
carry flag
AC, the auxiliary ADD or SUB operation, this bit DIV
an 0 X
from D3 to D4 during
If there is a carry that perform BCD
is used by instructions DA
it is cleared. This flag information.
is set; otherwise, more
arithmetic. See Chapter 6 for
(binary coded decimal) RRC
RLC
P, the parity flag SETBC
number of 1s in the A (accumulator)
register only.
The parity flag reflects the number of then P = 1. Therefore, P = 0 if A has CLR C
contains an odd 1s,
If the A register CPLC X
an even number of 1s.
ANLC, bit X
ANLC, /bit X
OV, the overflow flag
result of a signed number operation
is too large, ORL C, bit X
This flag is set whenever the
In general, the carry flag is ORL C, /bit X
the high-order bit to overflow into the sign bit.
causing arithmetic operations. The
overflow flag is only
used to detect errors in unsigned discussed in detail in MOV C, bit X
arithmetic operations and is
used to detect errors in signed X
Chapter 6.
CINE
Note: X can be 0 or 1.

ADD instruction and PSW

P of the PSW register. Some exam-
examine the of the ADD instruction on the flag bits CY, AC, and
Next we impact P (parity
affected by the ADD instruction are CY (carry flag),
should clarify their status. Although the flag bits now. A discussion of
ples and OV (overflow flag) we will focus on flags CY,
AC, and P for
flag), AC (auxiliary carry flag), arithmetic. How the various flag bits are
since it relates only to signed number
the overflow flag is given in Chapter 6,
future chapters in the context of many applications.
used in programming is discussed in the ADD instruction.
on selected flag bits as a result of
See Examples 2-2 through 2-4 for the impact

Example 2-2
"SAM" in consecutive
a) Use assembler directives to place constants OFCH, 05H, 76H, 28D and character string
from location 0050H.
program memory locations beginning
Add the numbers 56H and 95H, and show how the CY, AC,
and P flags are affected.
b)
Solution:

a) ORG 050H
DB OFCH, 05H, 76H, 28
DB "SAM"
The program memory location will contain data as follows.
Address Data
0050 FC
0051 05
0052 76
0053 1C Hex equivalent of 28D

8051 ASSEMBLY LANGUAGE PROGRAMMING 41

Review Questions
1. The flag register in the 8051 is called,
2. What is the size of the flag register in the 8051?
3. Which bits of the PSW register are user-definable?
4. Find the CY and AC flag bits for the following code.
MOV A, # 0FFH
ADD A, #01
5. Find the CY and AC flag bits for the following code.
MOV A, #0c2H
ADD A, #3DH

SECTION 2.7: 8051 REGISTER BANKS AND STACK

The 8051 microcontroller has a total of 128 bytes ot KAM. In this Section we
discuss the allocation of
of RAM and examine their usage as registers and stack. these 128 hrtae

RAM memory space allocation in the 8051

There aré 128 bytes of RAM in the 8051 (kome members, notably the 8052, have 256 bytes of RAM). The 128 bvtes
of RAM inside the 8051 are assigned addresses 00 to 7FH. As we will see in Chapter 5, they can be accessed directiy a
memory locations. These 128 bytes are divided into three different groups as follows.

1. A total of 32 bytes from locations00 to 1F hex are set aside for register-banks-andthe stack.
2. A total of16 bytes from locations 20H to 2FHare set aside for bit-addressable read/write memory. A detailed dis-
cussion ofbit-addressable memory and instructions is given in Chapter 8.
3. A total of 80 bytes from locations 30H to 7FH are used for read and writestorage,or what is normally called a
scratch pad. These 80 locations of RAM are widely used for the purpose of storing data and parameters by 8051
programmers. We will use them in future chapters to store data brought into the CPU via I/O ports.

Register banks in the 8051

As mentioned earlier, á total of 32 bytes of RAM are set aside 7F
for the register banks and stack. These 32 bytes are divided into 4
banks of registers in which each bank has 8 registers, R0- R7. RAM
locations from 0 to 7 are set aside for bank 0 of RO - R7 where R0 is Scratch Pad RAM

RAM location 0, R1 is RAM location 1, R2 is location 2, and so on, 30

until memory location 7, which belongs to R7 of bank 0. The second
2F
bank of registers R0 - R7 starts at RAM location 08 arnd goes to loca-
Bit-Addressable RAM
tion OFH. The third bank of R0 - R7 starts at memory location 10HH
20
and goes to location 17H. Finally, RAM locations 18H to 1FH are set
aside for the fourth bank of RO - R7. Figure 2-6 shows how the 32
1F
Register Bank 3
bytes are allocated into 4 banks.
As we can see from Figure 2-5, bank 1 uses the same RAM space
as the stack. This is a major problem in programming the 8051. WNe Register Bank 2
must either not use register bank 1, or allocate another area of RAM 10
for the stack. This will be discussed in Example 2-5.
OF
Register Bank 1 (Stack)
J8
Default register bank 07
If RAM Register Bank 0
locations 00-1F are set aside for the four register banks,
which register bank of RO - R7 do we have access to when the 8051 is 00
powered up? The answer is register bank 0; that is, RAM locations 0,
1,2,3, 4, 5, 6, and 7 are accessed with the names R0, R1, R2, R3, R4, Figure 2-5. RAM Allocation in the 8051

8051 ASSEMBLY LANGUAGE PROGRAMMING 4

 PSW a r e often referred to
The D3 and D4 bits of register Table 2-2: PSW Bits Bank
Selection
be accessed by the bit-
and PSW.3 since they c a n
as PSW.4 For example, "SETB RS1 (PSw.4) RSO (PSW.3)
SETB and CLR.
addressable i n s t r u c t i o n s bank register 1. See Bank 0
= 1 and select
PSW.3" will make PSW.3

Example 2-7.
Bank 1 0
Bank 2
Stack in the 8051
store temporarily This information could he data.
hack is a section of RAM used by the CPU to a r e intormation or
Since there only a limited number of registers
an address. The
CPU needs this storage area

How stacks are accessed in the 8051

accace tha
there must be registers inside the CPU to point to it. The register used to e
If the stack is a section of RAM, in the 805I 1s
The stack pointer only 8 bits wide, which means that it can
stack is called the SP (stack pointer) register.
the SP value 07. This means that RAM location
take values of 00 to FFH. When the 8051 is powered up, register contains
the 8051. The storing of a CPU register in the stack is called a PUSH, and
08 is the first location used for the stack by
other words, a
pulling the contents off the stack back into
a CPU register 1s called a POP. n register is pushed onto the
stack to save it and popped off the stack to retrieve it.
of the sP critical when push and pop actions are
The job is very
and POP instructions.
performed. To see how the stack works, let's look at the PUSH

Pushing onto the stack

In the 8051 the stack pointer (SP) points to the last used location of the stack. As we push data onto the stack, the
stack pointer (SP) is incremented by one. Notice that this is different from many microprocessors, notably x86 proces-
sors in which the SP is decremented when data is pushed onto the stack. Examining Example 2-8, we see that as each
PUSH is executed, the contents of the register are saved on the stack and SP is incremented by 1. Notice that for every
byte of data saved on the stack, SP is incremented only once. Notice also that to push the registers onto the stack we
must use their RAM addresses. For example, the instruction "PUSH 1" pushes register R1 onto the stack.
 This chapter descrilbes the 1/O port progranu. discussed in detail
of the l/Oports is
and in Section 4.2, bit manipulation
access data,
using byte-size

PROGRAMMING
SECTION 4.1:
In the 8051
8051 VO
there are a total of four ports for 1/O operations. Examining Figure 4-1, note that ofthethe 40
pinsniate
takes 8 pins. The rest of the pins
the four P0, P1, P2, and P3, where each port
of 32 pins are set aside for ports discussed in Chapter 8.
RST, EA, ALE/PROG and PSEN are
nated as VccGND, XTAL1, XTAL2,

VO port pins and their functions RESET are con

each them 8-bit ports. All the ports upon
The four ports P0, P1, P2, and P3 use 8 pins, making
it becomes an output, To reconfi
to be used as input ports. When
the first 0 is written to a port,
as inputs, ready must be programmed, as we
sent to the port. To use any of
these ports as an input port, it
as an input, a 1 must be
we describe each port.
explain throughout this section. First,

Port 0
or To use the pins of port 0 as
Port 0 occupies atotal of 8 pins (pins 32 39). It can be used for input output.
to a 10K-ohm pull-up resistor.
This is due to the
and each must be connected externally
input output ports, pin the
and as we will soon see. Open
drain is a term used for MOS chips in
that PO is an open drain, unlike P1, P2, P3, PO to pu
the 8051/52 chip, we normally connect
used for TTL chips. In any system using
way that open collector is

PDIP/Cerdip

P1.0 1 40 Vcc

P1.1 2 39 PO.0 (AD0)

P1.2 38 PO.1 (AD1)
P1.3 37 P0.2(AD2)
8051
P14 36 PO.3 (AD3)
(8031)
t P1.5 6 35 PO.4 (AD4)
f (89420) PO.5 (AD5)
P1.6 34
P1.7 8 33 PO.6 (AD6)
RST 9 32 PO.7 (AD7)

(RXD)P3.0 1 0 31 EA/VPP
30
ALE/PROG d s la t
(TXD)P3.1 11
INTO) P3.2 12 29 PSEN PJm
(TNTI)P3.3 13 28 P2.7 (A15)
(TO)P3.4 14 P2.6 (A14)
(T1)P3.5 1 5 26 P2.5 (A13)
WR) P3.6 16 P2.4 (A12)
(RD)P3.7 17 24 P2.3 (A11)
XTAL2 18 23 P2.2 (A10)
XTALI 19 22 P2.1 (A9)
GND 20 21 P2.0(A8)

Figure 4-1. 8051 Pin Diagram

YSTE
76 THE 8051 MICROCONTROLLER AND EMBEDDED "
resistors. See Figure 4-2. In this way we take advantage of
and output. For example, the follow
port 0 for both input Vcc
ing code will continuously send out to port 0 the alternat 10 K
55FH and AAH.
ing values of
b i t s of Po
Toggle a l l
MOV A, #55H
BACK:
MOV
PO.0
PO,A PO.1
ACALL DELAY
P0.2
MOV A, # 0AAH 8051 PO.3
MOV PO,,A PO.4
ACALL DELAY PO.5
PO.6
SJMP BACK
PO.7
It must be noted that complementing 55H (01010101)
55H and AAH
turns it into AAH (10101010). By sending
to a given port continuously,we toggle all the bits of that

port. Figure 4-2. Port 0 with Pull-Up Resistors

Port 0 as input
With resistors connected to port 0, in order to make it an input, the port must be programmed by writing 1 to all the

bits. In the followingcode, 0 is configured first as an input port by writing 1s to it, and then data is received from
port
that port and sent to P1.

Get a bytefrom P0 and send it to P1

MOV A, #0FFH A = FF hex
MOV PO,A ;make P0 an input port
by writing all 1s to it
BACK: MOV A, PO g e t data from PO

MOV P1,A ; send i t to port 1

SJMP BACK ;keep doing it

Dual role of port 0

As shown in Figure 4-1, port 0 is also designated as ADO AD7, allowing it to be used for both address and data.
When connecting arn 8051/31 to an external memory, port 0 provides both address and data. The 8051 multiplexes
address and data through port 0 to save pins. We discuss that in Chapter 14.

Port 1
Port 1 occupies a total of 8 pins (pins 1 through 8). It can be used as input or output. In contrast to port 0, this port
since it has as
does not need anypul-up resistors already pull-up resistors internally, Uponreset port 1is configured
an input port.The following code will continuously send out to port 1 the alternating values 55H and AAH.

: Toggle all bits of P1 continuously

MOV A, #55H
BACK MOV ,A
ACALL DELAY
CPL A ;Complement (Invert) reg. A
SJMP BACK

Port 1 as input
If port 1 has been configured as an output port, to make it an input port again, it must programmed as such by writ
ing 1 to all its bits. The reason for this is discussed in Appendix C.2. In the following code, port 1 is configured first as
an input port by writing is to it, then data is received from that port and saved in R7, R6, and R5.

/O PORT PROGRAMMING 77
 MOV A, #OFFH ;A=FF hex
MOV P1,A make P1 an input port
MOV
by writing al1l 1s to it
A, P1 get data from P1
MOV R7,A ;save it in reg R7
ACALL DELAY wait
MOV A, P1
get another data from P1
MOV R6,A save it in reg R6
ACALL DELAY
wait
MOV A, P1 get another data from P1
MOV R5,A save it in reg R5

Port 2
Port 2
need any
occupies a
total of 8 pins (pins 21
28). It can be used as input or output. Just like P1,
pull-up resistors since it already hasthrough port 2
pull-up resistors internally. Upon reset, port 2 is configured
port. The following code will send out
all
of P2 toggle continuously to port 2 the alternating values 55H and AAH. That is,asa
continuously. t
MOV A, #55H
BACK MOV P2,A
ACALL DELAY
CPL A
Complement reg. A
SJMP BACK

Port 2 as input
To make port 2 an input, it must programmed as such by writing 1 to all its bits. In the following code, port2
figured first as an input port by writing 1s to it. Then data is received from that port and is sent to Pl continuo

Get a byte from P2 and send i t to P1

MOV A, #OFFH A=FF hex
MOV P2,A make P2 an input port by
writing all 1s to i t
MOV A, P2 get data from P2
BACK
MOV P1,A send i t to Port 1
SJMP BACK ;keep doing that

Dual role of port 2

as simple I/0. However, in
8031-based systems, port 2mus
In many systems based on the 8051, P2 is used
As shown in Figure 4-1, port 2 is also desie
with PO to provide the 16-bit address for external memory.
along an 8051/31 is capable of accessing 64Kbytes
of externalmemoy
-
A8- A15, indicating its dual function. Since it is the
8 bits via A0 A7, job of P2 to provide
for the 16 bits of the address. While P0 provides the lower
path the 8051/31 is connected to external memory,
P2 is used for theupl
A15 of the address. In other words, when 14.
used for I/O. This is discussed in detail in Chapter
of the 16-bit address, and it cannot be or DS589C4x0 microconto
conclude that in systems based on 8751, 89C51,
From the discussion so far, we microcontroller applian
This should be enough for most
have three ports, PO, P1, and P2, for 1/O operations.
as we will see next.
leaves port 3 for interrupts as well as other signals,

Port 3 eedan
17. It can be used as noti
input or output. P3 doestnsisnotthe
Port 3 occupies a total of 8 pins, pins 10 through
as
reset, i
3 is configured an input port upon
resistors, just as Pl and P2 did not. Although port
DEDS

MICROCONTROLLER AND EMBEDD

78 THE 8051
 monly used. Port 3 has the additional function of provid Table 4-1: Port 3 Alternate Functions
ing some extremely importantsignals such as interrupts. Table 4+1 P3 Bit Function Pin
provides these alternate functions of P3. This information applies to
both 8051 and 8031 chips. P3.0 RxD 10
P3.0 andP3.1 are used for the RxD and TxD serial communica-
P3.1 TxD 11
tions signals, See Chapter 10 to see how they are connected. Bits
P3.2 and P3.3 areset aside for external interrupts, and are discussed P3.2 ÎNTO 12
in Chapter 11. Bits P3.4 and P3.5 are used for timers 0 and 1, and
P3.3 INT1 13
arediscussed in Chapter 9 where timers are discussed. Finally, P3.6
and P3.7 are used to provide the WR and RD signals of external P3.4 TO 14
memories connected in 8031-based systems. Chapter 14 discusses P3.5 T1 15
how they are used in 8031-based systems. In systems based on the
8751, 89C51, or DS89C4x0, pins 3.6 and 3.7 are used for I/Owhile P3.6 WR 16
the rest of the pins in port3 are normally used in the alternate func- P3.7 RD 17
tion role.