Control S2 2024 V1
Control S2 2024 V1
Exercise n°1: /6
1) The bias used in the circuit of Fig.1.a is: 4) In P channel E-MOSFET with |VGS(th)|= 5V.
If VGSQ= - VGS(th) this transistor is:
a. Self bias
b. Fixed bias
a. On in Ohmic region
c. Voltage divider bias
b. Off
d. Drain feedback bias
c. On in Saturation region
d. None of these
2) If we use the circuit of Fig.1.b in Common
5) The voltage VG, In a Voltage divider bias
gate amplifier, the resistor RG is not
using N channel D-MOSFET, is:
necessary in :
a. < 0
a. DC
b. = 0
b. AC
c. DC and AC c. > 0
d. None of these d. = Vp
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Note: Give the expression of each parameter, after that give the numerical result
Exercise n°2: /8
1. Given the circuit of Fig.2 with: VCC=10V, RC= RL=1 K, RE=0.8 K,
RB=80K, hfe=100, hoe=hre0, hie =430.
a) Draw the equivalent AC small signal circuit.
b) Find the expressions and the values of Zi, Zo , the no-loaded and the
loaded gain in voltage (AvNL and AvL).
c) In order to improve the level of AvL we add an amplifier between (Stage 1)
and RL. Which amplifier among Ampli (A) and Ampli (B) provides the
right amplification? (Justify your answer by using the two-port system
presentation and by finding the new loaded gain in voltage (AvL)). Fig.2
{ {
Zi=50 Zi=67K
Zo =40K
Ampli (A) Av = 20 Ampli (B) Zo =7
Av = 1
Ai = - 1 Ai = - 67
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