Scribd
Upload
21 views1 page

Assignment 09

The document outlines Assignment 9 for the ECE 222 Digital Design Logic course, focusing on combinational logic design tasks. It includes designing a four-input priority encoder, specifying truth tables for octal-to-binary priority encoders, constructing a 16X1 multiplexer, and implementing Boolean functions using multiplexers. Additional tasks involve determining Boolean functions for given multiplexer configurations and implementing functions with external gates.

Uploaded by

Eslam Yassin
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
21 views1 page

Assignment 09

The document outlines Assignment 9 for the ECE 222 Digital Design Logic course, focusing on combinational logic design tasks. It includes designing a four-input priority encoder, specifying truth tables for octal-to-binary priority encoders, constructing a 16X1 multiplexer, and implementing Boolean functions using multiplexers. Additional tasks involve determining Boolean functions for given multiplexer configurations and implementing functions with external gates.

Uploaded by

Eslam Yassin
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

Course: ECE 222 Digital Design Logic Semester: Fall 2022

Assignment 9: Combinational Logic

1) Design a four-input priority encoder with inputs (𝐷0𝐷1𝐷2𝐷3), but with input 𝐷0 having the highest
priority and input 𝐷3 the lowest priority with valid bit output.

2) Specify the truth table of an octal-to-binary priority encoder. Provide an output V to indicate that at
least one of the inputs is present. The input with the highest subscript number has the highest priority.
What will be the value of the four outputs if inputs 𝐷2 and 𝐷6 are 1 at the same time?

3) Construct a 16X1 multiplexer with two 8X1 and one 2X1 multiplexers. Use block diagrams.

4) Implement the following Boolean function with multiplexer a.


a. 𝐹 (𝐴, 𝐵, 𝐶, 𝐷) = ∑ (0,2,5,8,10,14)
b. 𝐹 (𝐴, 𝐵, 𝐶, 𝐷) = ∏ (2,6,11)

Use 8X1 Multiplexers


5) Implement a full adder with two 4X1 multiplexers.

6) An 8X1 multiplexer has inputs A, B, and C connected to the selection inputs 𝑆2, 𝑆1, and 𝑆0, respectively.
The data inputs 𝐼0 through 𝐼7 are as follows:
a. 𝐼1 = 𝐼2 = 𝐼7 = 0 ; 𝐼3 = 𝐼5 = 1 ; 𝐼0 = 𝐼4 = 𝐷 ; and 𝐼6 = 𝐷′
b. 𝐼1 = 𝐼2 = 0 ; 𝐼3 = 𝐼7 = 1 ; 𝐼4 = 𝐼5 = 𝐷 ; and 𝐼0 = 𝐼6 = 𝐷′
Determine the Boolean function that the multiplexer implements.

7) Implement the following Boolean function with a 4X1 multiplexer and external gates.
a. 𝐹1(𝐴, 𝐵, 𝐶, 𝐷) = ∑(1,3,4,11,12,13,14,15)
b. 𝐹2(𝐴, 𝐵, 𝐶, 𝐷) = ∑(1,2,5,7,8,10,11,13,15)
Connect inputs A and B to the selection lines. The input requirements for the four data lines will be a
function of variables C and D. These values are obtained by expressing F as a function of C and D for
each of the four cases when AB 00, 01, 10, and 11. These functions may have to be implemented with
external gates.

You might also like