isro
isro
Table of Contents 1
Contributors 8
1 Algorithms (63) 10
1.1 Algorithm Design Technique (5) 10
1.2 Asymptotic Notation (1) 11
1.3 Binary Search (2) 11
1.4 Decision Table (1) 12
1.5 Dijkstras Algorithm (2) 12
1.6 Graph Algorithms (3) 12
1.7 Hashing (3) 13
1.8 Huffman Code (1) 14
1.9 Identify Function (6) 14
1.10 Linear Probing (3) 16
1.11 Machine Learning (1) 17
1.12 Master Theorem (1) 17
1.13 Matrix Chain Ordering (1) 17
1.14 Merge Sort (3) 17
1.15 Minimum Spanning Tree (1) 18
1.16 Non Gatecse (1) 18
1.17 P NP NPC NPH (2) 18
1.18 Quick Sort (1) 19
1.19 Recurrence Relation (5) 19
1.20 Relations (1) 20
1.21 Searching (2) 20
1.22 Sorting (11) 21
1.23 Symbol Table (1) 23
1.24 Time Complexity (3) 23
Answer Keys 24
2 Artificial Intelligence (3) 25
2.1 Neural Network (2) 25
2.2 Non Gatecse (1) 25
Answer Keys 25
3 CO and Architecture (116) 26
3.1 8085 Microprocessor (8) 26
3.2 Addressing Modes (11) 28
3.3 Analog Signal (1) 30
3.4 CO and Architecture (27) 30
3.5 Cache Memory (12) 37
3.6 Cpu (2) 39
3.7 DMA (1) 39
3.8 Disk (1) 40
3.9 Floating Point Representation (2) 40
3.10 IO Handling (6) 41
3.11 Instruction Format (5) 42
3.12 Interrupts (3) 43
3.13 Machine Instruction (3) 44
3.14 Memory Interfacing (9) 45
3.15 Memory Management (1) 46
3.16 Microprocessors (3) 46
3.17 Microprogramming (1) 47
3.18 Non Gatecse (1) 47
3.19 Parallel Programming (1) 47
3.20 Pipelining (12) 48
3.21 Registers (2) 50
3.22 Runtime Environment (1) 51
Answer Keys 51
4 Compiler Design (41) 53
4.1 Assembler (2) 53
4.2 Code Optimization (9) 53
4.3 Compilation Phases (1) 55
4.4 Compiler tokenization (1) 56
4.5 Context Free Grammar (1) 56
4.6 Expression Evaluation (1) 56
4.7 Grammar (5) 56
4.8 Intermediate Code (2) 58
4.9 Lexical Analysis (2) 58
4.10 Operator Grammar (1) 59
4.11 Operator Precedence (1) 59
4.12 Parameter Passing (2) 59
4.13 Parsing (8) 60
4.14 Runtime Environment (1) 62
4.15 Symbol Table (1) 62
4.16 Variable Binding (1) 62
Answer Keys 62
5 Computer Networks (153) 64
5.1 Application Layer Protocols (1) 73
5.2 CRC Polynomial (4) 73
5.3 CSMA CD (2) 74
5.4 Communication (7) 74
5.5 Cryptography (7) 75
5.6 Distance Vector Routing (1) 77
5.7 Dns (2) 77
5.8 Encoding (2) 77
5.9 Error Correction (2) 78
5.10 Error Detection (3) 78
5.11 Ethernet (6) 79
5.12 Firewall (1) 80
5.13 Huffman Code (1) 80
5.14 IP Addressing (2) 80
5.15 IP Packet (3) 80
5.16 Inter Process Communication (1) 81
5.17 Ipv6 (1) 81
5.18 LAN Technologies (1) 81
5.19 Link State Routing (1) 82
5.20 MAC Protocol (4) 82
5.21 Network Layer (2) 83
5.22 Network Layering (3) 83
5.23 Network Protocols (9) 83
5.24 Network Security (13) 85
5.25 Network topologies (2) 87
5.26 Out of Gatecse Syllabus (1) 88
5.27 Routers Bridge Hubs Switches (2) 88
5.28 Routing (2) 88
5.29 Sliding Window (3) 89
5.30 Slotted Aloha (1) 89
5.31 Stop and Wait (1) 90
5.32 Subnetting (11) 90
5.33 Supernetting (1) 92
5.34 TCP (6) 92
5.35 Token Ring (1) 93
5.36 Transport Layer (1) 93
5.37 Wifi (1) 94
5.38 Wireless Networks (1) 94
Answer Keys 94
6 Data Mining and Warehousing (2) 96
6.1 Knowledge Representation (2) 96
Answer Keys 96
7 Databases (78) 97
7.1 B Tree (6) 98
7.2 Candidate Key (1) 100
7.3 Database Normalization (12) 100
7.4 ER Diagram (5) 102
7.5 File System (6) 103
7.6 Functional Dependency (1) 104
7.7 Indexing (6) 105
7.8 Rdbms (2) 106
7.9 Referential Integrity (2) 106
7.10 Relational Algebra (4) 107
7.11 Relational Model (2) 108
7.12 SQL (13) 108
7.13 Transaction and Concurrency (12) 112
Transaction 113
Answer Keys 116
8 Digital Logic (178) 117
8.1 Adder (7) 131
8.2 Asynchronous Circuit (1) 133
8.3 Bcd (1) 133
8.4 Boolean Algebra (20) 133
8.5 Booths Algorithm (1) 137
8.6 CO and Architecture (1) 138
8.7 Canonical Normal Form (2) 138
8.8 Circuit Output (14) 138
8.9 Combinational Circuit (2) 142
8.10 Decoder (1) 143
8.11 Digital Circuits (3) 143
8.12 Digital Counter (3) 144
8.13 Flip Flop (10) 145
8.14 Floating Point Representation (3) 147
8.15 Functional Completeness (2) 147
8.16 Gray Code (1) 148
8.17 Hazards (1) 148
8.18 IEEE Representation (3) 148
8.19 K Map (1) 149
8.20 Matrix Chain Ordering (1) 149
8.21 Memory Interfacing (2) 149
8.22 Min No Gates (2) 150
8.23 Multiplexer (5) 150
8.24 Number Representation (27) 151
8.25 Number System (1) 156
8.26 Pla (1) 156
8.27 Sequential Circuit (4) 157
8.28 Shift Registers (2) 158
Answer Keys 159
9 Discrete Mathematics: Combinatory (2) 161
9.1 Counting (1) 161
9.2 Process Scheduling (1) 161
Answer Keys 161
10 Discrete Mathematics: Graph Theory (18) 162
10.1 Degree of Graph (1) 162
10.2 Euler Graph (2) 162
10.3 Graph Coloring (1) 163
10.4 Graph Connectivity (10) 163
10.5 Graph Planarity (1) 165
Answer Keys 165
11 Discrete Mathematics: Mathematical Logic (6) 166
11.1 Boolean Algebra (1) 166
11.2 First Order Logic (2) 166
11.3 Propositional Logic (1) 167
Answer Keys 167
12 Discrete Mathematics: Set Theory & Algebra (14) 168
12.1 Abelian Group (1) 168
12.2 Equivalence Class (1) 168
12.3 Functions (2) 169
12.4 Group Theory (1) 169
12.5 Relations (2) 169
12.6 Set Theory (4) 170
Answer Keys 170
13 Engineering Mathematics: Calculus (28) 171
13.1 Area (1) 174
13.2 Definite Integral (1) 175
13.3 Differentiation (2) 175
13.4 Functions (1) 175
13.5 Integration (2) 175
13.6 Limits (2) 176
13.7 Maxima Minima (2) 176
13.8 Vector Calculus (1) 176
Answer Keys 177
14 Engineering Mathematics: Linear Algebra (71) 178
14.1 Determinant (4) 189
14.2 Eigen Value (5) 189
14.3 Functions (1) 191
14.4 Geometry (2) 191
14.5 Matrix (11) 192
14.6 Rank of Matrix (1) 194
14.7 System of Equations (1) 194
14.8 Vector Space (1) 194
Answer Keys 195
15 Engineering Mathematics: Probability (34) 196
15.1 Arithmetic Mean (1) 196
15.2 Conditional Probability (4) 196
15.3 Expectation (1) 197
15.4 Mean Mode Median (1) 197
15.5 Normal Distribution (1) 197
15.6 Poisson Distribution (1) 198
15.7 Probability (20) 198
15.8 Probability Density Function (1) 203
15.9 Random Variable (1) 203
15.10 Standard Deviation (1) 203
Answer Keys 204
16 General Aptitude: Analytical Aptitude (1) 205
16.1 Sequence Series (1) 205
Answer Keys 205
17 General Aptitude: Quantitative Aptitude (4) 206
17.1 Geometry (1) 206
17.2 Inequality (1) 206
17.3 LCM HCF (1) 206
17.4 Summation (1) 206
Answer Keys 206
18 Non GATE CSE: Cloud Computing (1) 207
18.1 Cloud Computing (1) 207
Answer Keys 207
19 Non GATE CSE: Computer Graphics (9) 208
19.1 Computer Graphics (7) 208
19.2 Shading (1) 209
19.3 Unix (1) 209
Answer Keys 209
20 Non GATE CSE: Computer Peripherals (6) 210
20.1 Computer Peripherals (5) 210
20.2 Ieee1394 (1) 210
Answer Keys 211
21 Non GATE CSE: Digital Image Processing (4) 212
21.1 Digital Image Processing (3) 212
21.2 Image Compression (1) 212
Answer Keys 212
22 Non GATE CSE: Digital Signal Processing (1) 213
22.1 Semiconductor (1) 213
Answer Keys 213
23 Non GATE CSE: Distributed Computing (1) 214
23.1 Distributed Computing (1) 214
Answer Keys 214
24 Non GATE CSE: Geometry (4) 215
24.1 Circle (1) 215
24.2 Geometry (3) 215
Answer Keys 216
25 Non GATE CSE: Integrated Circuits (4) 217
25.1 Integrated Circuits (4) 217
Answer Keys 217
26 Non GATE CSE: IS&Software Engineering (50) 218
26.1 Cmm Model (1) 218
26.2 Cyclomatic Complexity (6) 218
26.3 Is&software Engineering (23) 220
26.4 Out of Gatecse Syllabus (1) 224
26.5 Project Cost (1) 224
26.6 Software Coupling (1) 224
26.7 Software Metrics (1) 225
26.8 Software Productivity (1) 225
26.9 Software Reliability (1) 225
26.10 Software Testing (10) 225
26.11 Spiral Model (1) 227
26.12 Uml (3) 227
Answer Keys 228
27 Non GATE CSE: Java (6) 229
27.1 Java (6) 229
Answer Keys 230
28 Non GATE CSE: Multimedia (2) 231
28.1 Multimedia (2) 231
Answer Keys 231
29 Non GATE CSE: Numerical Methods (9) 232
29.1 Guass Seidal Iterative Method (1) 232
29.2 Interpolation (1) 232
29.3 Newton Raphson (1) 232
29.4 Numerical Methods (4) 232
29.5 Polynomials (1) 233
Answer Keys 233
30 Non GATE CSE: Object Oriented Programming (10) 234
30.1 Copy Constructor (1) 234
30.2 Java (1) 234
30.3 Object Oriented Programming (6) 234
30.4 Operator Overloading (1) 236
30.5 Virtual Function (1) 236
Answer Keys 236
31 Non GATE CSE: Others (3) 237
31.1 Rs232 (1) 237
Answer Keys 237
32 Non GATE CSE: Web Technologies (10) 238
32.1 Html (4) 238
32.2 Javascript (1) 238
32.3 Web Technologies (3) 238
32.4 Xml (2) 239
Answer Keys 239
33 Operating System (146) 240
33.1 Bankers Algorithm (1) 245
33.2 Concurrency (1) 245
33.3 Context Switch (1) 245
33.4 Critical Section (1) 245
33.5 Deadlock Prevention Avoidance Detection (3) 245
33.6 Disk (11) 246
33.7 Disk Scheduling (2) 248
33.8 File System (1) 249
33.9 Fork System Call (4) 249
33.10 Fragmentation (1) 250
33.11 IO Devices (1) 250
33.12 IO Handling (3) 250
33.13 Interrupts (1) 251
33.14 Macros (1) 251
33.15 Memory Management (6) 251
33.16 Multilevel Paging (1) 253
33.17 Mutual Exclusion (2) 253
33.18 Page Replacement (12) 253
33.19 Pipes (1) 255
33.20 Process (7) 256
33.21 Process Scheduling (22) 257
33.22 Process Synchronization (7) 262
33.23 Realtime Systems (1) 263
33.24 Resource Allocation (10) 264
33.25 Runtime Environment (1) 266
33.26 Segmentation (2) 266
33.27 Semaphore (6) 267
33.28 Thrashing (1) 268
33.29 Threads (3) 268
33.30 Unix (1) 269
33.31 Virtual Memory (9) 269
Answer Keys 271
34 Others: Others (1) 273
Answer Keys 273
35 Programming and DS: DS (59) 274
35.1 AVL Tree (3) 275
35.2 Array (2) 275
35.3 Binary Heap (2) 276
35.4 Binary Search Tree (8) 276
35.5 Binary Tree (5) 278
35.6 Data Structures (3) 279
35.7 Infix Prefix (5) 280
35.8 Linked List (9) 281
35.9 Priority Queue (1) 283
35.10 Queue (1) 283
35.11 Stack (6) 284
35.12 Tree (3) 285
35.13 Tree Traversal (4) 285
Answer Keys 287
36 Programming: Programming in C (63) 288
36.1 Activation Record (1) 290
36.2 Array (4) 290
36.3 Array of Pointers (1) 291
36.4 Functions (2) 291
36.5 Identify Function (1) 292
36.6 Loop (7) 292
36.7 Loop Invariants (1) 295
36.8 Macros (2) 295
36.9 Non Gatecse (3) 295
36.10 Object Oriented Programming (1) 296
36.11 Output (5) 297
36.12 Parameter Passing (1) 298
36.13 Pointers (7) 299
36.14 Programming In C (7) 301
36.15 Recursion (3) 303
36.16 Runtime Environment (3) 303
36.17 Semantic Analysis (1) 304
36.18 Structure (2) 304
36.19 Undefined Behaviour (1) 305
36.20 Union (1) 305
Answer Keys 305
37 Theory of Computation (38) 307
37.1 Closure Property (2) 308
37.2 Context Free Grammar (3) 309
37.3 Context Free Language (3) 309
37.4 Context Sensitive (1) 310
37.5 Finite Automata (5) 310
37.6 Grammar (3) 312
37.7 Identify Class Language (2) 312
37.8 Minimal State Automata (1) 313
37.9 Pushdown Automata (1) 313
37.10 Recursive and Recursively Enumerable Languages (2) 313
37.11 Regular Expression (3) 314
37.12 Regular Language (3) 314
37.13 Turing Machine (2) 315
Answer Keys 316
38 Unknown Category (1) 317
Answer Keys 317
Contributors
User , Answers User Added User Done
Arjun 1404, 35 VIPIN NARAYAN 280 Lakshman Patel 397
Suresh GO 274 Arjun 298
shekhar 778, 59 Editor Suresh
chauhan Arjun 89 Naveen Kumar 164
Manoj Kumar 572, 50 Suresh srestha 98
Rajarshi Sarkar 457, 9 Misbah Ghaya 80 Manoj Kumar 85
Kapil Phulwani 426, 40 gatecse 78 Misbah Ghaya 67
Pooja Palod 411, 13 Satbir 78 GO 49
Leen Sharma 394, 32 Singh Editor
Gate Keeda 349, 7 Kathleen 76 Desert_Warrior 46
srestha 345, 37 Bankson Jeet 40
Akash Kanase 343, 6 ajit 61 kenzou 35
VIPIN NARAYAN 297, 38 Desert_Warrior 35 Prashant 31
Digvijay 272, 10 admin 33 Singh
Akhil Nadh PC 261, 3 Rucha 10 Sabiha 29
Anu 244, 3 Shelke banu
Vikrant 237, 3 Ishrat Jahan 10 Kapil Phulwani 26
Singh Anuanu 7 soujanyareddy13 24
sanjay 221, 25 sourav. 7 VIPIN NARAYAN 24
Akash Dinkar 217, 18 Isha Gupta 7 Hira 23
Dexter 214, 17 jaiganeshcse94 6 Milicevic3306 23
Rakesh P Kumar 200, 1 jenny101 6 Rahul Lalitkumar Jain 22
Desert_Warrior 194, 8 Manoj Kumar 6 Leen Sharma 22
Amar Vashishth 193, 4 shivanisrivarshini 5 sourav. 20
minal 184, 4 junaid ahmad 5 Anu 20
Mangilal Saraswat 168, 13 asutosh kumar Biswal 5 naga praveen 17
(Mars) SUSHMA SINGH 4 deepthi 14
Jeet 164, 32 Anu 3 Praveen Saini 13
shivanisrivarshini 161, 17 kvkumar 3 Pooja Khatri 11
Muktinath Vishwakarma 158, 9 Taymiyyah Bhat 3 Soumya Jain 9
Anurag Semwal 150, 2 srestha 3 Muktinath Vishwakarma 8
Dhananjay Kumar Sharma 134, 10 shivanisrivarshini 8
asutosh kumar Biswal 128, 11 Samujjal Das 8
Bhagirathi Nayak 122, 3 Pavan 7
Ankit Rokde 120, 2 Singh
Vidhi Sethi 112, 9 vamsi2376 7
Ashwani Kumar 111, 18 Sujith 7
naga praveen 111, 20 2018 6
jayendra 108, 2 gatecse 6
Pranabesh Ghosh 107, 9 pawan sahu 6
Sankaranarayanan P.N 106, 3 Manu Thakur 5
Danish 103, 1 asutosh kumar Biswal 5
Manu Thakur 99, 1 Anu007 5
Rajesh Pradhan 96, 6 sanjay 5
Prashant 96, 7 Satbir 5
Singh Singh
neha pawar 94, 2 Akhil Nadh PC 5
Mithlesh 94, 2 Ramayya 5
Upadhyay shekhar 5
kvkumar 93, 13 chauhan
gate_asp 90, 1 Deepak Poonia 4
Arpit Dhuriya 82, 2 Dhananjay Kumar Sharma 4
Shobhit 80, 1 Shubham Sharma 4
Prasanna Ranganathan 78, 1 Gaurav Sharma 4
Rahul Lalitkumar Jain 77, 43
Shashank Kumar 74, 1
Prateek 73, 1
Arora
Himanshu Agarwal 72, 1
IgnitorSandeep 68, 1
Sambit Kumar 68, 7
Soumya Jain 67, 6
abhishek kumar 67, 13
Kalpna Bhargav 64, 1
Ravi 64, 5
Singh
Vicky Bajoria 62, 1
sonveer 61, 11
tomar
Ashish Patel 59, 1
rameshbabu 59, 7
Umang Raman 58, 6
anshu 56, 2
Happy Mittal 55, 1
Sourav Roy 55, 1
"Shrowd" 55, 4
Prateek Dwivedi 54, 3
vamsi2376 53, 5
paradox 53, 5
gshivam63 45, 3
Keith Kr 44, 1
Shubham Sharma 44, 23
Praveen Saini 43, 3
Krishanveer Gangwar 42, 4
pawan sahu 42, 6
dd 42, 7
Tuhin Dutta 41, 8
sumit kumar singh dixit 39, 1
ranjan621 39, 1
habedo007 39, 7
Ankesh Gautam 38, 1
Catalan 1920 38, 2
sanjeev_zerocode 37, 1
Achintya Desai 36, 2
Pranay Datta 35, 2
ANKUR MAHIWAL 34, 1
Mojo Jojo 34, 2
Gate_15_isHere 33, 1
REGGIE S 33, 4
ponagraj 31, 1
Jithin Jayan 31, 2
gatecse 29, 1
1 Algorithms (63)
1.0.1 ISRO-DEC2017-20
Match the following and choose the correct answer for the order
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1.0.2 ISRO-DEC2017-44
A. If it takes time.
B. It uses divide and conquer technique.
C. Relative order of occurrence of non-distinct elements is maintained.
D. It takes space.
isrodec2017
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1.1.1 Algorithm Design Technique: GATE CSE 1994 | Question: 1.19, ISRO2016-31
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1.1.2 Algorithm Design Technique: GATE CSE 1998 | Question: 1.21, ISRO2008-16
Which one of the following algorithm design techniques is used in finding all pairs of shortest distances in
a graph?
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The following paradigm can be used to find the solution of the problem in minimum time:
Given a set of non-negative integer and a value , determine if there is a subset of the given set with sum
equal to :
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A. B. C. D.
isrodec2017 recurrence-relation asymptotic-notation
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The time taken by binary search algorithm to search a key in a sorted array of elements is
A. B.
C. D.
isro2007 algorithms binary-search time-complexity
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Suppose there are items in sorted order in an array. How many searches are required on the average, if
binary search is employed and all searches are successful in finding the item?
A.
B.
C.
D.
algorithms binary-search isro2014
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Which of the following data structure is useful in traversing a given graph by breadth first search?
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1.6.2 Graph Algorithms: ISRO CSE 2017 | Question: 76
Which of the following algorithms solves the all pair shortest path problem?
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A hash table with ten buckets with one slot per bucket is shown in the following figure. The symbols to
initially entered using a hashing function with linear probing. The maximum number of comparisons
needed in searching an item that is not present is
A. B. C. D.
hashing isro2015 gate1989 algorithms normal
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In linear hashing, if blocking factor , loading factor and file buckets are known, the number of
records will be
A. B.
C. D.
isro-2020 algorithms hashing normal
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The characters of the string are inserted into a hash table of the size of size using
a hash function
If linear probing is used to resolve collisions, then the following insertion causes the collision
A. B. C. D.
isrodec2017 hashing easy
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A. B. C. D.
isro-2020 algorithms huffman-code normal
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A. B. C. D.
isro2007 algorithms identify-function
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A. B. C. D.
isro2008 algorithms recursion identify-function
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A. B. C. D.
isro2011 algorithms identify-function
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Assume and are non-zero positive integers. The following code segment:
while(A!=B){
if*(A> B)
A -= B;
else
B -= A;
}
cout<<A; // printing the value of A
a. Computes the of two numbers b. Divides the larger number by the smaller number
c. Computes the of two numbers d. Finds the smaller of two numbers
isro2018 algorithms identify-function
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Consider a 13 element hash table for which f(key)=key mod 13 is used with integer keys. Assuming linear
probing is used for collision resolution, at which location would the key 103 be inserted, if the keys 661,
182, 24 and 103 are inserted in that order?
A. 0 B. 1 C. 11 D. 12
isro2014 hashing linear-probing
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A Hash Function defined as . With linear probing while inserting the keys
into a table indexed from , in which location key will be stored (Count table
index as location)?
A. 3 B. 4 C. 5 D. 6
hashing isro2016 linear-probing
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A hash table with buckets with one slot pet per bucket is depicted here. The symbols, to are
initially entered using a hashing function with linear probing. The maximum number of comparisons
needed in searching an item that is not present is
A. B. C. D.
isro2018 algorithms hashing linear-probing
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1.11 Machine Learning (1)
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Consider product of three matrices and having rows and columns, rows and columns,
and rows and columns. Under what condition will it take less time to compute the product as
than to compute ?
A. Always take the same time B.
C. D.
isro-2020 algorithms matrix-chain-ordering normal
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If one uses straight two-way merge sort algorithm to sort the following elements in ascending order:
then the order of these elements after second pass of the algorithm is:
A.
B.
C.
D.
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1.14.2 Merge Sort: ISRO CSE 2007 | Question: 58
The average case and worst case complexities for Merge sort algorithm are
A. B.
C. D.
isro2007 algorithms sorting merge-sort
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Given two sorted list of size and respectively. The number of comparisons needed the worst case by
the merge sort algorithm will be:
A. B. maximum of and
C. minimum of and D.
isro2018 algorithms merge-sort
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The number of spanning trees for a complete graph with seven vertices is
A. B. C. D.
isro2015 algorithms minimum-spanning-tree
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Let S be an NP-complete problem.Q and R are other two problems not known to be NP.Q is polynomial
time reducible to S and S is polynomial time reducible to R.Which of the following statements is true ?
A) R is NP-complete
B) R is NP-hard
C) Q is NP-complete
D) Q is NP-hard
isro2017 non-gatecse
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1.17.2 P NP NPC NPH: GATE CSE 2006 | Question: 16, ISRO-DEC2017-27
Let S be an NP-complete problem and Q and R be two other problems not known to be in NP. Q is
polynomial time reducible to S and S is polynomial-time reducible to R. Which one of the following
statements is true?
A. R is NP-complete B. R is NP-hard
C. Q is NP-complete D. Q is NP-hard
gatecse-2006 algorithms p-np-npc-nph normal isrodec2017 out-of-gatecse-syllabus
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A machine needs a minimum of sec to sort names by quick sort. The minimum time needed to
sort names will be approximately
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The recurrence relation that arises in relation with the complexity of binary search is:
A. B.
C. D.
gate1994 algorithms recurrence-relation easy isro2017
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A. B. C. D.
gatecse-2004 algorithms recurrence-relation time-complexity normal isro2015
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A. B.
C. D.
algorithms recurrence-relation isro2016 gatecse-2006
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A. B. C. D.
isro2011 algorithms time-complexity recurrence-relation
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The time complexity of computing the transitive closure of a binary relation on a set of elements is
known to be
a.
b.
c.
d.
isro2017 relations algorithms time-complexity
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The average number of key comparisons required for a successful search for sequential search on items
is
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1.21.2 Searching: ISRO CSE 2011 | Question: 70
A. L B. L/2 C. (L+1)/2 D. 2L
isro2011 algorithms searching
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Which one of the following in place sorting algorithms needs the minimum number of swaps?
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How many comparisons are needed to sort an array of length if a straight selection sort is used and array
is already in the opposite order?
A. B. C. D.
isro2008 algorithms sorting selection-sort
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I. Quicksort
II. Heapsort
III. Mergesort
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Which one of the following in-place sorting algorithms needs the minimum number of swaps?
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The number of swappings needed to sort the numbers in ascending order using bubble
sort is
A. B. C. D.
isro2017 algorithms sorting
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Of the following sorting algorithms, which has a running time that is least dependent on the initial ordering
of the input?
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If an array contains the items and in that order, what will be the resultant array
after third pass of insertion sort?
A. B.
C. D.
isro-2020 algorithms sorting normal
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Of the following sort algorithms, which has execution time that is least dependant on initial ordering of the
input?
Answer key ☟
Answer key ☟
Which of the following sorting algorithms has the minimum running time complexity in the best and
average case?
A. Insertion sort, Quick sort B. Quick sort, Quick sort
C. Quick sort, Insertion sort D. Insertion sort, Insertion sort
isro2013 sorting
Answer key ☟
A. B.
C. D. Cannot say anything for arbitrary
isrodec2017 sorting
Answer key ☟
Answer key ☟
The number of comparisons made in the execution of the loop for any is:
A. B.
C. D.
gatecse-2007 algorithms time-complexity normal isro2016
Answer key ☟
What is the time complexity for the following C module? Assume that .
int module(int n)
{
if (n == 1)
return 1;
else
return (n + module(n-1));
}
A. B. C. D.
isro2014 algorithms time-complexity
Answer key ☟
A. B. C. D.
isro-2020 algorithms time-complexity normal
Answer key ☟
Answer Keys
1.0.1 B 1.0.2 C 1.1.1 C 1.1.2 A 1.1.3 X
1.1.4 D 1.1.5 B 1.2.1 B 1.3.1 A 1.3.2 A
1.4.1 C 1.5.1 C 1.5.2 Q-Q 1.6.1 B 1.6.2 D
1.6.3 C 1.7.1 B 1.7.2 D 1.7.3 X 1.8.1 A
1.9.1 D 1.9.2 A 1.9.3 B 1.9.4 D 1.9.5 C
1.9.6 B 1.10.1 B 1.10.2 C 1.10.3 B 1.11.1 Q-Q
1.12.1 B 1.13.1 B 1.14.1 B 1.14.2 D 1.14.3 D
1.15.1 B 1.16.1 Q-Q 1.17.1 C 1.17.2 B 1.18.1 B
1.19.1 B 1.19.2 D 1.19.3 B 1.19.4 C 1.19.5 X
1.20.1 C 1.21.1 C 1.21.2 A 1.22.1 C 1.22.2 B
1.22.3 B 1.22.4 D 1.22.5 D 1.22.6 A 1.22.7 B
1.22.8 C 1.22.9 Q-Q 1.22.10 A 1.22.11 B 1.23.1 B
1.24.1 D 1.24.2 A 1.24.3 X
2 Artificial Intelligence (3)
A. RBS B. Hopfield
C. Back propagation D. Kohonen
isro2011 neural-network non-gatecse
Answer key ☟
Answer key ☟
isro-cse-2023 non-gatecse
Answer key ☟
Answer Keys
2.1.1 D 2.1.2 C 2.2.1 Q-Q
3 CO and Architecture (116)
Resistor of microprocessor which keeps track of the execution of program and which contain the memory
address of next instruction to be executed is called
(a) Index resistor (b) Program counter (c) Memory address resistor (d) Instruction resistor
isro-ee
Answer key ☟
3.0.2 ISRO-DEC2017-38
A. B. C. D.
isrodec2017
Answer key ☟
3.0.3 ISRO-DEC2017-42
In designing a computer's cache system, the cache block (or cache line) size es an important parameter.
Which one of the following statements is correct in this context?
isrodec2017
Answer key ☟
A. B. C. D. contents of stack
isro2008 8085-microprocessor non-gatecse
Answer key ☟
The TRAP is one of the interrupts available in Which one of the following statements is true
of TRAP ?
A. it is level triggered B. it is negative edge triggered
C. it is edge triggered D. it is both and edges triggered
isro2008 co-and-architecture 8085-microprocessor non-gatecse
Answer key ☟
Answer key ☟
Answer key ☟
The register in that is used to keep track of the memory address of the next opcode to be run in the
program is the:
a. Stack Pointer b. Program Counter
c. Accumulator d. Non of the above
isro-ece co-and-architecture isro2012-ece 8085-microprocessor
Answer key ☟
How many number of times the instruction sequence below will loop before coming out of the loop?
MOV AL, 00H
A1: INC AL
JNZ A1
A. 1 B. 255
C. 256 D. Will not come out of the loop.
isro2013 8085-microprocessor non-gatecse
Answer key ☟
In 8085 microprocessor, the ISR for handling trap interrupt is at which location?
A. B. C. D.
isro2013 8085-microprocessor non-gatecse
Answer key ☟
The contents of the flag register after execution of the following program by microprocessor will be
A. B. C. D.
8085-microprocessor non-gatecse isro2015
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
3.2.4 Addressing Modes: ISRO CSE 2009 | Question: 21, UGCNET-Dec2012-II: 12
In which addressing mode, the effectives address of the operand is generated by adding a constant value to
the content of a register?
A. Absolute mode B. Indirect mode
C. Immediate mode D. Index mode
isro2009 co-and-architecture ugcnetcse-dec2012-paper2 addressing-modes
Answer key ☟
Answer key ☟
A. B.
C. D.
isro2017 co-and-architecture addressing-modes match-the-following easy
Answer key ☟
A. Only B. Only
C. Both and D. Immediate mode refers to data in cache
isro-2020 co-and-architecture normal addressing-modes
Answer key ☟
Answer key ☟
Which of the following affects the processing power assuming they do not influence each other
1. Data bus capability
2. Address scheme
3. Clock speed
Answer key ☟
Consider a - bit processor which supports instructions. Each instruction is bit long and has fields
namely opcode, two register identifiers and an immediate operand of unsigned integer type. Maximum
value of the immediate operand that can be supported by the processor is . How many registers the processor
has?
A. B. C. D.
isro-2020 co-and-architecture addressing-modes normal
Answer key ☟
Consider an instruction of the type which during execution reads a - word from
memory and stores it in a - register The effective address of the memory location is obtained by
adding a constant and contents of Which one best reflects the source operand?
A. Immediate addressing B. Register addressing
C. Register Indirect addressing D. Indexed addressing
isrodec2017 addressing-modes
Answer key ☟
Minimum number of bits required to represent maximum value of an analog signal with accuracy of
is
If the memory chip size is 256 x 1 bits, then the number of chips required to make up 1K bytes of memory
is
a) 32
b) 24
c) 12
d) 8
isro-ece co-and-architecture
Answer key ☟
isro-ece co-and-architecture
Answer key ☟
When a program is being executed in an 8085 microprocessor, its Program Counter contains
a) The number of instructions in the current program that have already been executed
Answer key ☟
c) Total time available in the channel is divided between several users and each users is allotted a time slice.
Answer key ☟
A memory system of size 16K bytes is required to be designed using memory chips, which have 12
address lines and 4 data lines each. The number of such chips required to design the memory system is
a) 2
b) 4
c) 8
d) 16
isro-ece co-and-architecture
Answer key ☟
The performance gain that can be obtained by improving some portion of a computer can be calculated
using
Answer key ☟
------ machines tend to make use of internal resources of the processor, a rich set of registers and a
pipelined organization.
(a) CISC
(c) RISC
Answer key ☟
The advantage of write (copy) back data cache organization over write through organization is
Answer key ☟
(a) Emulation
(b) Programming at micro level
(c) The use of storage to implement the control unit
(d) Array processing
isro-ece co-and-architecture
Answer key ☟
3.4.10 CO and Architecture: ISRO 2008-ECE Computer architecture
Answer key ☟
(a) EPROM
(b) EEPROM
Answer key ☟
In a daisy chained connection to the CPU, the peripheral whose interrupt request has the highest priority is
the one
(a) With the largest vector address
Answer key ☟
(a) SIMD
(b) MIMD
(c) SISD
(d) MISD
isro-ece co-and-architecture
Answer key ☟
a) 8 times
b) once
c) 7 times
d) infinite times
co-and-architecture isro-ece
Answer key ☟
Answer key ☟
An 8-bit microcontroller has an external RAM with the memory map from 8000H to 9FFFH.
The number of bytes this RAM can store is
a) 8193
b) 8192
c) 8191
d) 8000
isro-ece co-and-architecture
Answer key ☟
Answer key ☟
A microprocessor has a cache memory with access time of 2 ns and a main memory with access time of 10
ns. If the cache miss ratio is 0.6, what is the average memory access time?
a) 6.8 ns
b) 6 ns
c) 5.2 ns
d) 12 ns
isro-ece co-and-architecture
Answer key ☟
a. Instruction cycle time period is exactly equal to machine cycle time period
b. Instruction cycle time period is shorter than machine cycle time period
c. Machine cycle time period is shorter than instruction cycle time period
d. Instruction cycle time period is exactly half of machine cycle time period
Answer key ☟
A microprocessor with 12 bit address bus will be able to access ________ kilobytes of memory
a) 0.4
b) 2
c) 10
d) 4
isro-ece isro2011-ece co-and-architecture
Answer key ☟
d. Arithmetic and logic operations can be directly performed with I/O data
isro-ece isro2011-ece co-and-architecture
When a microprocessor interfaces with a peripheral or memory device, the normal timing of the
microprocessor may need to be altered by introducing____
a. Latching
b. Wait states
c. Tristate logics
Answer key ☟
a. Constant defined in a package can be referenced by any entity or architecture for which package is used.
d. Constant defined in a process declarative region is not visible outside that process
isro-ece isro2011-ece co-and-architecture
Techniques that automatically move program and data blocks into physical main memory when they are
required for execution are called
(a) Main memory techniques
(b) Cache memory techniques
Answer key ☟
The microinstructions stored in the control memory of a processor have a width of bits. Each
microinstruction is divided into three fields. a micro operation field of bits, a next address field and
a MUX select field There are status bits in the inputs of the MUX. How many bits are there in the and
fields, and what is the size of the control memory in number of words?
A. B. C. D.
isro2009 co-and-architecture control-unit
Answer key ☟
Statements associated with registers of a CPU are given. Identify the false statement.
A. The program counter holds the memory address of the instruction in execution
B. Only opcode is transferred to the control unit
C. An instruction in the instruction register consists of the opcode and the operand
D. The value of the program counter is incremented by once its value has been read to the memory address
register
Answer key ☟
More than one word are put in one cache block to:
A. exploit the temporal locality of reference in a program B. exploit the spatial locality of reference in a program
C. reduce the miss penalty D. none of the above
gatecse-2001 co-and-architecture easy cache-memory isro2008
Answer key ☟
Consider a system with level cache. Access times of Level cache, Level cache and main memory are
, , and respectively. The hit rates of Level and Level caches are and ,
respectively. What is the average access time of the system ignoring the search time within the cache?
A. B. C. D.
gateit-2004 co-and-architecture cache-memory normal isro2016
Answer key ☟
Answer key ☟
3.5.4 Cache Memory: ISRO CSE 2007 | Question: 46
Consider a small -way set-associative cache memory, consisting of four blocks. For choosing the block to
be replaced, use the least recently (LRU) scheme. The number of cache misses for the following sequence
of block addresses is
A. B. C. D.
isro2007 co-and-architecture cache-memory
Answer key ☟
Consider a direct mapped cache with blocks and a block size of bytes. To what block number does
the byte address map to
Answer key ☟
Answer key ☟
A cache memory needs an access time of ns and main memory ns, what is average access time of
CPU (assume hit ratio
A. ns B. ns C. ns D. ns
isro2017 co-and-architecture cache-memory
Answer key ☟
For a multi-processor architecture, in which protocol a write transaction is forwarded to only those
processors that are known to possess a copy of newly altered cache line?
Answer key ☟
Answer key ☟
3.5.10 Cache Memory: ISRO CSE 2020 | Question: 47
How many total bits are required for a direct-mapped cache with KB of data and word block size,
assuming a -bit address and word size of bytes?
Answer key ☟
How much speed do we gain by using the cache, when cache is used % of the time? Assume cache is
faster than main memory.
A. B. C. D.
isro2013 co-and-architecture cache-memory
Answer key ☟
A two-way set associative cache memory unit with a capacity of is built using a block size of
The word length is The physical address space is
The number of bits in the TAG, SET fields are
A. B. C. D.
isrodec2017 cache-memory
Answer key ☟
If a microcomputer operates at MHz with an -bit bus and a newer version operates at MHz with a -
bit bus, the maximum speed-up possible approximately will be
A. B. C. D.
isro2011 co-and-architecture cpu
Answer key ☟
The number of logical CPUs in a computer having two physical quad-core chips with hyper threading
enabled is ______
A. B. C. D.
co-and-architecture isro2014 cpu non-gatecse
Answer key ☟
A processor is fetching instructions at the rate of MIPS. A DMA module is used to transfer characters to
RAM from a device transmitting at bps. How much time will the processor be slowed down due to
DMA activity?
A. ms B. ms C. ms D. ms
isro2013 dma
Answer key ☟
A magnetic disk has cylinders, each with tracks of sectors. If each sector contains bytes,
what is the maximum capacity of the disk in kilobytes?
A. B. C. D.
isro-2020 co-and-architecture disk normal
Answer key ☟
Answer key ☟
An array of two byte integers is stored in big endian machine in byte addresses as shown below. What
will be its storage pattern in little endian machine ?
A.
B.
C.
D.
Answer key ☟
Which of the following statements about synchronous and asynchronous I/O is NOT true?
A. An ISR is invoked on completion of I/O in synchronous I/O but not in asynchronous I/O
B. In both synchronous and asynchronous I/O, an ISR (Interrupt Service Routine) is invoked after completion of
the I/O
C. A process making a synchronous I/O call waits until I/O is complete, but a process making an
asynchronous I/O call does not wait for completion of the I/O
D. In the case of synchronous I/O, the process waiting for the completion of I/O is woken up by the ISR that is
invoked after the completion of I/O
Answer key ☟
An interrupt in which the external device supplies its address as well as the interrupt requests is known as
Answer key ☟
Answer key ☟
Two control signals in microprocessor which are related to Direct Memory Access (DMA) are
A. B.
C. D.
isro2011 co-and-architecture io-handling dma
Answer key ☟
In DMA transfer scheme, the transfer scheme other than burst mode is
Answer key ☟
Answer key ☟
Answer key ☟
3.11.2 Instruction Format: ISRO CSE 2016 | Question: 24
Answer key ☟
A byte addressable computer has a memory capacity of ( bytes) and can perform operations. An
instruction involving operands and one operator needs maximum of:
Answer key ☟
A data driven machine is one that executes an instruction if the needed data is available. The physical
ordering of the code listing does not dictate the course of execution. Consider the following pseudo-code:
A. Multiply by to get B. Add and to get
C. Add with to get D. Add and to get
E. Add with to get Assume are already assigned values and the
desired output is . Which of the following sequence of execution is valid?
a. B, C, D, A, E b. C, B, E, A, D
c. A, B, C, D, E d. E, D, C, B, A
isro2018 co-and-architecture instruction-format
Answer key ☟
One instruction tries to write an operand before it is written by previous instruction. This may lead to a
dependency called
A. True dependency B. Anti-dependency
C. Output dependency D. Control Hazard
isro-2020 co-and-architecture instruction-format normal
Answer key ☟
The ability to temporarily halt the CPU and use this time to send information on buses is called
A. direct memory access B. vectoring the interrupt
C. polling D. cycle stealing
isro2008 co-and-architecture interrupts
Answer key ☟
A certain microprocessor requires microseconds to respond to an interrupt. Assuming that the three
interrupts and require the following execution time after the interrupt is recognized:
i. requires microseconds
ii. requires microseconds
iii. requires microseconds
has the highest priority and has the lowest. What is the possible range of time for to be executed assuming
that it may or may not occur simultaneously with other interrupts?
A. microseconds to microseconds B. microseconds to microseconds
C. microseconds to microseconds D. microseconds microseconds
isro2009 co-and-architecture interrupts
Answer key ☟
Answer key ☟
A CPU has - instructions. A program starts at address (in decimal). Which one of the following is
a legal program counter (all values in decimal)?
A. B. C. D.
gatecse-2006 co-and-architecture machine-instruction easy isro2009
Answer key ☟
Which of the following architecture is/are not suitable for realising SIMD?
A. Vector processor B. Array processor
C. Von Neumann D. All of the above
isro2008 co-and-architecture machine-instruction
Answer key ☟
A computer which issues instructions in order, has only registers and opcodes and .
Consider different implementations of the following basic block :
Assume that all operands are initially in memory. Final value of computation also has to reside in memory. Which
one is better in terms of memory accesses and by how many instructions?
A. B. C. D.
isro-2020 co-and-architecture machine-instruction normal
Answer key ☟
In comparison with static RAM memory, the dynamic Ram memory has
Answer key ☟
The process of organizing the memory into two banks to allow -and -bit data operation is called
A. Bank switching B. Indexed mapping
C. Two-way memory interleaving D. Memory segmentation
isro2009 co-and-architecture memory-interfacing
Answer key ☟
A. B. C. D.
isro2011 co-and-architecture memory-interfacing
Answer key ☟
Consider a MHz cpu based system. What is the number of wait states required if it is interfaced with a
ns memory? Assume a maximum of ns delay for additional circuitry like buffering and decoding.
A. B.
C. D.
co-and-architecture isro2014 memory-interfacing
Answer key ☟
If each address space represents one byte of storage space, how many address lines are needed to access
RAM chips arranged in a array, where each chip is bits?
A. B. C. D.
co-and-architecture memory-interfacing isro2014
Answer key ☟
Assume that -bit CPU is trying to access a double word stating at an odd address. How many memory
operations are required to access the data?
A. B. C. D.
isro2014 co-and-architecture memory-interfacing
Answer key ☟
A. B. C. D.
isro2017 co-and-architecture memory-interfacing
Answer key ☟
A memory system of size bytes is required to be designed using memory chips which have
address lines and data lines each. The number of such chips required to design the system is:
a. b. c. d.
isro-ece isro2013-ece co-and-architecture memory-interfacing
A. B. C. D.
memory-interfacing co-and-architecture machine-instruction isro2015
Answer key ☟
The minimum time delay between the initiation of two independent memory operations is called
Answer key ☟
Answer key ☟
3.16.2 Microprocessors: ISRO CSE 2011 | Question: 37
Find the memory address of the next instruction executed by the microprocessor when operated in
real mode for and
A. B. C. D.
isro2011 co-and-architecture non-gatecse 8086 microprocessors
Answer key ☟
Answer key ☟
Answer key ☟
A. CF = 0 or ZF = 0 B. ZF = 0 and SF = 1 C. CF = 0 and ZF = 0 D. CF = 0
isro2013 8086 non-gatecse
Answer key ☟
A particular parallel program computation requires sec when executed on a single processor, if of
this computation is inherently sequential (i.e. will not benefit from additional processors), then
theoretically best possible elapsed times of this program running with and processors, respectively, are:
a. sec and sec b. sec and sec c. sec and sec d. sec and sec
isro2018 co-and-architecture parallel-programming
Answer key ☟
Answer key ☟
For a pipelined CPU with a single ALU, consider the following situations
A. I and II only B. II and III only C. III only D. All the three
gatecse-2003 co-and-architecture pipelining normal isrodec2017
Answer key ☟
The IF, ID and WB stages take one clock cycle each to complete the operation. The number of clock cycles for the
EX stage depends on the instruction. The ADD and SUB instructions need clock cycle and the MUL instruction
needs clock cycles in the EX stage. Operand forwarding is used in the pipelined processor. What is the number
of clock cycles taken to complete the following sequence of instructions?
A. B. C. D.
gatecse-2007 co-and-architecture pipelining normal isro2009
Answer key ☟
Answer key ☟
A processor takes cycles to complete an instruction I. The corresponding pipelined processor uses
stages with the execution times of and cycles respectively. What is the asymptotic speedup
assuming that a very large number of instructions are to be executed?
A. B. C. D.
gateit-2007 co-and-architecture pipelining normal isro2011
Answer key ☟
Assuming ideal conditions, the speed up obtained from a balanced N stage pipeline is
(a)
(b)
(c)
(d)
isro-ece co-and-architecture pipelining
Answer key ☟
Consider a non-pipelined processor with a clock rate of gigahertz and average cycles per instruction of
four. The same processor is upgraded to a pipelined processor with five stages; but due to the internal
pipeline delay, the clock speed is reduced to gigahertz. Assume that there are no stalls in the pipeline. The
speedup achieved in this pipelined processor is
A. B. C. D.
co-and-architecture pipelining isro2016
Answer key ☟
A. B. C. D.
isro-2020 co-and-architecture pipelining normal
Answer key ☟
Consider a - segment pipeline with a clock cycle time ns in each sub operation. Find out the
approximate speed-up ratio between pipelined and non-pipelined system to execute instructions. (if an
average, every five cycles, a bubble due to data hazard has to be introduced in the pipeline)
A. B. C. D.
isro-2020 co-and-architecture pipelining normal
Answer key ☟
Answer key ☟
A pipeline operating at MHz has a speedup factor of and operating at % efficiency. How many
stages are there in the pipeline?
A. B. C. D.
isro2013 co-and-architecture pipelining
Answer key ☟
Consider the following assembly code for a hypothetical RISC processor with a -stage pipeline
(Instruction Fetch, Decode/Register Read, Execute and Write).
add r1,r2,r3 // r1 = r2+r3
sub r4,r1,r3 //r4 = r1 - r3
mul r5,r2,r3 // r5 = r2*r3
a. Read after write hazard during mul b. Read after write hazard during sub
c. Read after write hazard during add d. Write after write hazard during mul
isro-ece isro2011-ece co-and-architecture pipelining
Answer key ☟
Answer key ☟
3.21.2 Registers: ISRO CSE 2008 | Question: 55
A. is a hardware memory device which denotes the location of the current instruction being executed.
B. is a group of electrical ckt, that performs the intent of instructions fetched from memory
C. contains the address of the memory location that is to be read from or stored into
D. contains a copy of the designated memory location specified by the MAR after a "read" or the new contents of
the memory prior to a "write"
Answer key ☟
The use of multiple register windows with overlap causes a reduction in the number of memory accesses
for:
Answer key ☟
Answer Keys
3.0.1 Q-Q 3.0.2 A 3.0.3 A 3.1.1 C 3.1.2 D
3.1.3 C 3.1.4 Q-Q 3.1.5 Q-Q 3.1.6 C 3.1.7 D
3.1.8 A 3.2.1 B 3.2.2 C 3.2.3 D 3.2.4 D
3.2.5 C 3.2.6 B 3.2.7 C 3.2.8 C 3.2.9 D
3.2.10 B 3.2.11 D 3.3.1 Q-Q 3.4.1 Q-Q 3.4.2 Q-Q
3.4.3 Q-Q 3.4.4 Q-Q 3.4.5 Q-Q 3.4.6 Q-Q 3.4.7 Q-Q
3.4.8 Q-Q 3.4.9 Q-Q 3.4.10 Q-Q 3.4.11 Q-Q 3.4.12 Q-Q
3.4.13 Q-Q 3.4.14 Q-Q 3.4.15 Q-Q 3.4.16 Q-Q 3.4.17 Q-Q
3.4.18 Q-Q 3.4.19 Q-Q 3.4.20 Q-Q 3.4.21 Q-Q 3.4.22 Q-Q
3.4.23 Q-Q 3.4.24 Q-Q 3.4.25 A 3.4.26 A 3.4.27 Q-Q
3.5.1 B 3.5.2 C 3.5.3 D 3.5.4 C 3.5.5 C
3.5.6 A 3.5.7 A 3.5.8 C 3.5.9 A 3.5.10 D
4.0.1 ISRO-DEC2017-66
Answer key ☟
A. two or more productions have the same non-terminal on the left hand side
B. a derivation tree has more than one associated sentence
C. there is a sentence with more than one derivation tree corresponding to it
D. brackets are not present in the grammar
Answer key ☟
A simple two-pass assembler does which of the following in the first pass:
A. Checks to see if the instructions are legal in the current assembly mode
B. It allocates space for the literals.
C. It builds the symbol table for the symbols and their values.
D. All of these
Answer key ☟
In a two-pass assembler, resolution of subroutine calls and inclusion of labels in the symbol table is done
during
A. second pass B. first pass and second pass respectively
C. second pass and first pass respectively D. first pass
isro-2020 compiler-design assembler easy
Answer key ☟
Which of the following class of statement usually produces no executable code when compiled?
A. declaration B. assignment statements
C. input and output statements D. structural statements
isro2008 compiler-design code-optimization
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
a. consist of a definition of a variable and all its uses, reachable from that definition
b. are created using a form static code analysis
c. are prerequisite for many compiler optimization including constant propagation and common sub-expression
elimination
d. All of the above
isro2018 compiler-design code-optimization
Answer key ☟
Answer key ☟
Which of the following is a type of a out-of-order execution, with the reordering done by a compiler
Answer key ☟
Answer key ☟
Answer key ☟
A. B. C. D.
isro-2020 compiler-design compiler-tokenization easy
Answer key ☟
I. pick
II. picks
III.
A. I, II and III B. I and II only C. I and III only D. II and III only
isro2018 compiler-design grammar context-free-grammar
Answer key ☟
A.
B.
C. 49152
D. 173458
Answer key ☟
I. is ambiguous
II. produces all strings with equal number of ’s and ’s
III. can be accepted by a deterministic PDA.
Answer key ☟
Answer key ☟
Answer key ☟
A grammar is defined as
The non terminal alphabet of the grammar is
A.
B.
C.
D.
Answer key ☟
Which of the following productions eliminate left recursion in the productions given below:
A.
B.
C.
D.
Answer key ☟
Relative to the program translated by a compiler, the same program when interpreted runs
A. Faster B. Slower
C. At the same speed D. May be faster or slower
isro2008 compiler-design intermediate-code
Answer key ☟
Incremental-Compiler is a compiler:
Answer key ☟
Answer key ☟
Answer key ☟
Which grammar rules violate the requirement of the operator grammar? are variables and
are terminals
i.
ii.
iii.
iv.
Answer key ☟
Answer key ☟
A. call
B. call
C. cannot be used as it does not return any value
D. cannot be used as the parameters are passed by value
Answer key ☟
What is the final value of in both call by value and call by reference, respectively?
Answer key ☟
A. A B. B C. C D. S
isro2011 compiler-design parsing
Answer key ☟
What is the number of steps required to derive the string for the following grammar?
A. B.
C. D.
isro2014 compiler-design parsing
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
In a resident – OS computer, which of the following systems must reside in the main memory under all
situations?
Answer key ☟
A symbol table of length is processing entries at any instant. What is occupation density?
A. B. C. D.
isro2011 compiler-design symbol-table
Answer key ☟
What does it print if the language uses dynamic scoping with deep binding?
A. B. C. D.
isro2013 runtime-environment variable-binding
Answer key ☟
Answer Keys
4.0.1 D 4.0.2 C 4.1.1 D 4.1.2 C 4.2.1 A
4.2.2 C 4.2.3 X 4.2.4 D 4.2.5 B 4.2.6 D
4.2.7 X 4.2.8 D 4.2.9 D 4.3.1 B 4.4.1 C
4.5.1 D 4.6.1 C 4.7.1 B 4.7.2 D 4.7.3 D
4.7.4 A 4.7.5 B 4.8.1 B 4.8.2 C 4.9.1 C
4.9.2 D 4.10.1 D 4.11.1 B 4.12.1 D 4.12.2 C
4.13.1 C 4.13.2 A 4.13.3 A 4.13.4 C 4.13.5 A
4.13.6 A 4.13.7 D 4.13.8 C 4.14.1 C 4.15.1 A
4.16.1 C
5 Computer Networks (153)
Answer key ☟
5.0.2 ISRO-2013-19
What is the maximum number of characters (7 bits + parity) that can be transmitted in a second on a
Kbps line. This asynchronous transmission requires start bit and stop bit.
A. B. C. D.
isro2013 serial-communication
Answer key ☟
5.0.3 ISRO-2013-44
Which algorithm is used to shape the bursty traffic into a fixed rate traffic by averaging the data rate?
Answer key ☟
Answer key ☟
Assume that each character code consists of bits. The number of characters that can be transmitted per
second through a synchronous serial line at baud rate, and with two stop bits is
A. B. C. D.
isro2007 serial-communication
Answer key ☟
5.0.6 ISRO2015-51
How many characters per sec can be transmitted over a bps line if the transfer is
synchronous start and stop bit)?
A. B. C. D.
isro2015 computer-networks serial-communication
Answer key ☟
isro2016-ece computer-networks
Answer key ☟
An FM signal at MHz IF needs to be digitized for demodulation in a digital domain. If the bandwidth
of this signal is kHz, the maximum usable sampling frequency is
Answer key ☟
Answer key ☟
Which of the following modulation scheme requires minimum power for transmission?
A signal transmitted from an Earth station bounces back from a geostationary satellite, with an altitude of
km from the Earth surface. The range from the Earth station, is km. The round trip time is
about: (excluding processing delays and assuming
a. ms b. ms c. ms d. ms
computer-networks isro2015-ece
Answer key ☟
A communication channel is having a bandwidth of Hz. The transmitted power is such that the
received Signal-to-Noise ratio is The maximum data rate that can be transmitted error-free through
the channel is:
Answer key ☟
A. B.
C. D.
isro-ece isro2014-ece computer-networks
Answer key ☟
In a fiber-optic cable, which phenomenon occurs for signal to propagate along the inner core:
Answer key ☟
Answer key ☟
b. QAM
c. APSK
The channel capacity under the Gaussian noise environment for a discrete memory less channel with a
bandwidth of 4 MHz and SNR 31 is
a. 20 Mbps
b. 4 Mbps
c. 8 Kbps
d. 4 Kbps
computer-networks isro2011-ece isro-ece
The critical angle of an optical fiber is given by __________ where n1 is refractive index of medium 1 and
n2 is the refractive index of medium 2
a) (n2/n1)
b) (n1/n2)
c) (n2*n1)
d) n2
isro-ece isro2011-ece computer-networks
The bandwidth of a 'N' bit binary coded PCM signal for modulating a signal having bandwidth of f Hz is
a. f/N Hz.
b. f
c. Nf
d. N
isro-ece isro2011-ece computer-networks
Answer key ☟
a) AM
b) FM
c) SSB
d) QPSK
isro-ece isro2011-ece computer-networks
a. 1000 km
b. 15000 km
c. 25000 km
d. 36000 km
isro-ece isro2011-ece computer-networks
Answer key ☟
a. Frequency only
b. Amplitude only
Answer key ☟
_________ is used to describe the light gathering or light collecting ability of an optical fiber
a. Critical angle
b. Cut-off wavelength
c. Numerical Aperture
d. Acceptance angle
isro-ece isro2011-ece computer-networks
Answer key ☟
a) CSMA/CA
b) SCPC
c) CSMA/CD
d) Slotted ALOHA
isro-ece computer-networks
Answer key ☟
A source produces 4 symbols with probabilities 1/2,1/4,1/8,1/8. For this source, a practical coding scheme
has an average code- word length of 2 bits/symbol. The efficiency of the code is
a) 1
b) 7/8
c) 1/2
d) 1/4
isro-ece
Answer key ☟
5.0.28 ISRO 2008- ECE Switch and Hub
Answer key ☟
(c) SONET
Answer key ☟
RS-232 interface
(a) Uses only positive voltage
(b) Cannot transmit signals over long distance .
(c) Uses only negative voltage
(d) A logic high uses positive voltage
isro-ece computer-networks
The transport layer protocol used for real time multimedia, file transfer, DNS and e-mail respectively are
Answer key ☟
5.0.32 ISRO 2015- Optical fiber [EE]
isro-ee computer-networks
Answer key ☟
5.0.33 ISRO-DEC2017-31
In the IPv4 addressing format, the number of networks allowed under Class C addresses is
A. B. C. D.
isrodec2017
Answer key ☟
5.0.34 ISRO-DEC2017-30
Which of the following are used to generate a message digest by the network security protocols?
(P) SHA-256
(Q) AES
(R) DES
(S) MD5
Answer key ☟
5.0.35 ISRO-DEC2017-33
Assume that Source and Destination are connected through an intermediate router
How many times a packet has to visit the network layer and data link layer during a transmission from to
?
isrodec2017
Answer key ☟
5.0.36 ISRO-DEC2017-35
A. SMTP,HTTPS,IMAP B. SMTP,POP,IMAP
C. SMTP,IMAP,HTTPS D. SMTP,IMAP,POP
isrodec2017
Answer key ☟
5.0.37 ISRO-DEC2017-36
Station uses packets to transmit messages to Station using a sliding window protocol.
The round trip time delay between and is and the bottleneck bandwidth on the path
and is What is the optimal window size that should use?
A. B. C. D.
isrodec2017
Answer key ☟
5.0.38 ISRO-DEC2017-34
Generally, TCP is reliable and UDP is not reliable. DNS which has to be reliable uses UDP because
A. UDP is slower.
B. DNS servers has to keep connections.
C. DNS requests are generally very small and fit well within UDP segments.
D. None of these.
isrodec2017
Answer key ☟
Which of the following is the cause of Ping of death issue related to ICMP packets?
A. Buffer overflow B. Divide by ZERO
C. Missing input sanitisation D. Privilege escalation
Answer key ☟
Match the following context of information Secuirty which are closely associated
Matching
(i) Ingress Filtering (P) Data Leakage Prevention
(ii) Egress Filtering (Q) Hiding indentity of systems
(iii) NAT (R) Keep Track of TCP/IP connections
(iv) Stateful firewall (S) Malicious traffic prevention
A. (i) - (S), (ii) - (P), (iii) - (Q), (iv) - (R)
B. (i) - (P), (ii) - (R), (iii) - (S), (iv) - (Q)
C. (i) - (S), (ii) - (R), (iii) - (P), (iv) - (Q)
D. (i) - (R), (ii) - (Q), (iii) - (S), (iv) - (P)
5.1.1 Application Layer Protocols: GATE CSE 2008 | Question: 14, ISRO2016-74
What is the maximum size of data that the application layer can pass on to the TCP layer below?
Answer key ☟
The message is to be transmitted using the CRC polynomial to protect it from errors.
The message that should be transmitted is:
A. B. C. D.
Answer key ☟
________ can detect burst error of length less than or equal to degree of the polynomial and detects burst
errors that affect odd number of bits.
A. Hamming Code
B. CRC
C. VRC
D. None of the above
Answer key ☟
If the frame to be transmitted is and the CRC polynomial to be used for generating checksum
is , than what is the transmitted frame?
A. B.
C. D.
isro2013 computer-networks crc-polynomial
Answer key ☟
5.2.4 CRC Polynomial: ISRO2015-52
In CRC if the data unit is and the divisor is then what is dividend at the receiver?
A. B. C. D.
isro2015 computer-networks crc-polynomial
Answer key ☟
Which of the following transmission media is not readily suitable to CSMA operation?
Answer key ☟
In Ethernet CSMA/CD, the special bit sequence transmitted by media access management to handle
collision is called
Answer key ☟
If the bandwidth of a signal is kHz and the lowest frequency is kHz, what is the highest frequency
Answer key ☟
Answer key ☟
5.4.3 Communication: ISRO CSE 2007 | Question: 24, ISRO CSE 2016 | Question: 67
Answer key ☟
What is the bandwidth of the signal that ranges from kHz MHz
Answer key ☟
The encoding technique used to transmit the signal in giga ethernet technology over fiber optic medium is
Answer key ☟
Consider a kbps satellite channel with a milliseconds round trip propagation delay. If the sender
wants to transmit bit frames, how much time will it take for the receiver to receive the frame?
A. milliseconds B. milliseconds
C. milliseconds D. milliseconds
isro2014 computer-networks communication
Answer key ☟
What frequency range is used for microwave communications, satellite and radar?
Answer key ☟
Answer key ☟
Answer key ☟
Which one of the following algorithm is not used in asymmetric key cryptography?
Answer key ☟
In a columnar transportation cipher, the plain text is “the tomato is a plant in the night shade family”,
keyword is “ ”. The cipher text is
A.
B.
C.
D.
Answer key ☟
Answer key ☟
What will be the cipher text produced by the following cipher function for the plain text ISRO with key
. [ Consider ]
Answer key ☟
A. B.
C. D.
isro2017 computer-networks distance-vector-routing
Answer key ☟
When a DNS server accepts and uses incorrect information from a host that has no authority giving that
information, then it is called
Answer key ☟
Answer key ☟
By using an eight bit optical encoder the degree of resolution that can be obtained is (approximately)
A. B. C. D.
isro2007 communication encoding
Answer key ☟
Answer key ☟
A. B. C. D.
isro2011 computer-networks error-correction hamming-code
Answer key ☟
A. Both Parity and Cyclic Redundancy Check are error correcting codes
B. Both Parity and Low Density Parity Check Code are error correcting codes
C. Both Reed-Solomon code and Low Density Parity Check Code are error correcting codes
D. Both Cyclic Redundancy Check and Low Density Parity Check Code are error correcting codes
Answer key ☟
Answer key ☟
Data is transmitted continuously at Mbps rate for hours and received bits errors. What is the
bit error rate?
A. B. C. D.
isro2011 computer-networks error-detection
Answer key ☟
How many check bits are required for bit data word to detect bit errors and single bit correction using
hamming code?
A. B. C. D.
isro2013 error-detection
Answer key ☟
An Ethernet hub
Answer key ☟
In Ethernet, the source address field in the MAC frame is the _______ address.
Answer key ☟
A mechanism or technology used in Ethernet by which two connected devices choose common
transmission parameters such as speed, duplex mode and flow control is called
Answer key ☟
An Ethernet frame that is less than the minimum length of octets is called
Answer key ☟
In the Ethernet, which field is actually added at the physical layer and is not part of the frame.
Answer key ☟
Answer key ☟
Answer key ☟
A zero memory source emits six messages with probabilities 0.3, 0.25, 0.15, 0.12, 0.1 and 0.08. If binary
Huffman coding is used, what will be the average code length?
a) 2.45 bits
b) 3.45 bits
c) 2.54 bits
d) 3.54 bits
isro-ece computer-networks huffman-code
Answer key ☟
The network is a
Answer key ☟
The process of modifying IP address information in IP packet headers while in transit across a traffic
routing device is called
Answer key ☟
Answer key ☟
A IP packet has arrived in which the fragmentation offset value is the value of is and the value
of total length field is What is the number of the last byte?
A. B. C. D.
computer-networks ip-packet isro2014
Answer key ☟
An IP packet has arrived with the first bits as Which of the following is correct?
Answer key ☟
A. communication between two processes remotely different from each other on the same system
B. communication between two processes on the same system
C. communication between two processes on the separate systems
D. none of the above
Answer key ☟
Answer key ☟
Answer key ☟
If there are five routers and six networks in intranet using link state routing, how many routing tables are
there?
A. B. C. D.
isro2007 computer-networks routing link-state-routing
Answer key ☟
A. B.
C. D.
isro2009 computer-networks mac-protocol
Answer key ☟
A. B.
C. D.
isro2011 non-gatecse computer-networks mac-protocol
Answer key ☟
A. B.
C. D.
computer-networks mac-protocol isro2014
Answer key ☟
Answer key ☟
5.21 Network Layer (2)
Answer key ☟
Answer key ☟
When a host on network A sends a message to a host on network B, which address does the router look at?
Answer key ☟
In which layer of network architecture, the secured socket layer (SSL) is used?
A. physical layer B. session layer
C. application layer D. presentation layer
isro2011 computer-networks network-security network-layering
Answer key ☟
Answer key ☟
Answer key ☟
A. B. C. D.
isro2008 computer-networks network-protocols
Answer key ☟
Answer key ☟
The network protocol which is used to get MAC address of a node by providing IP address is
Answer key ☟
Answer key ☟
Which network protocol allows hosts to dynamically get a unique IP number on each bootup
Answer key ☟
Which of the following protocol is used for transferring electronic mail messages from one machine to
another?
Answer key ☟
The protocol data unit for the transport layer in the internet stack is
Answer key ☟
A. PING is a TCP/IP application that sends datagrams once every second in the hope of an echo response from
the machine being PINGED
B. If the machine is connected and running a TCP/IP protocol stack, it should respond to the PING datagram with
a datagram of its own
C. If PING encounters an error condition, an ICMP message is not returned
D. PING display the time of the return response in milliseconds or one of several error message
Answer key ☟
Answer key ☟
A. B. C. D.
isro2007 computer-networks network-security
Answer key ☟
Answer key ☟
Answer key ☟
is a
Answer key ☟
Answer key ☟
In a system an RSA algorithm with and , is implemented for data security. What is the value
of the decryption key if the value of the encryption key is
A. B. C. D.
isro2014 computer-networks network-security
Answer key ☟
Which protocol suite designed by IETF to provide security for a packet at the Internet layer?
Answer key ☟
Answer key ☟
In cryptography, the following uses transposition ciphers and the keyword is LAYER. Encrypt the
following message. (Spaces are omitted during encrypton)
a. b.
c. d.
isro2018 computer-networks network-security
Answer key ☟
Answer key ☟
Answer key ☟
Using public key cryptography, adds a digital signature to a message encrypts and sends it
to where it is decrypted. Which one of the following sequence of keys is used for operations ?
A. Encryption: private key followed by private key; Decryption: public key followed by public
key.
B. Encryption: private key followed by public key; Decryption: public key followed by private
key.
C. Encryption: private key followed by public key; Decryption: private key followed by public
key.
D. Encryption: public key followed by private key; Decryption: public key followed by private
key.
isrodec2017 network-security
Answer key ☟
If there are devices (nodes) in a network, what is the number of cable links required for a fully connected
mesh and a star topology respectively
A. ,
B. ,
C. ,
D. ,
Answer key ☟
5.26.1 Out of Gatecse Syllabus: GATE CSE 1993 | Question: 6.4, ISRO2008-14
Assume that each character code consists of bits. The number of characters that can be transmitted per
second through an asynchronous serial line at baud rate, and with two stop bits is
A. B. C. D.
gate1993 computer-networks serial-communication normal isro2008 out-of-gatecse-syllabus
Answer key ☟
One SAN switch has ports. All supports Gbps Fiber Channel technology. What is the aggregate
bandwidth of that SAN switch?
Answer key ☟
A T-switch is used to
Answer key ☟
Answer key ☟
Answer key ☟
Frames of are sent over a duplex link between two hosts. The propagation time is .
Frames are to be transmitted into this link to maximally pack them in transit (within the link).
What is the minimum number of bits that will be required to represent the sequence numbers distinctly?
Assume that no time gap needs to be given between transmission of two frames.
A. B. C. D.
gatecse-2009 computer-networks sliding-window normal isro2016
Answer key ☟
A. can be used to control the flow of information B. always occurs when the field value is
C. always occurs when the field value is D. occurs horizontally
isro2008 computer-networks tcp sliding-window
Answer key ☟
Station uses byte packets to transmit messages to Station using a sliding window protocol. The
round trip delay between and is and the bottleneck bandwidth on the path between and is
. What is the optimal window size that should use?
a. b. c. d.
isro2018 computer-networks sliding-window
Answer key ☟
A certain population of ALOHA users manages to generate request/sec. If the time is slotted in units of
msec, then channel load would be
A. B. C. D.
isro2015 computer-networks slotted-aloha
Answer key ☟
What will be the efficiency of a Stop and Wait protocol, if the transmission time for a frame is ns and the
propagation time is ns?
A. % B. % C. % D. %
isro2013 computer-networks stop-and-wait
Answer key ☟
The subnet mask for a particular network is Which of the following pairs of addresses
could belong to this network?
A. and B. and
C. and D. and
gatecse-2003 computer-networks subnetting normal isro2009
Answer key ☟
The address of a class host is to be split into subnets with a subnet number. What is the maximum
number of subnets and the maximum number of hosts in each subnet?
Answer key ☟
An Internet Service Provider (ISP) has the following chunk of CIDR-based IP addresses available with it:
. The ISP wants to give half of this chunk of addresses to Organization , and a quarter to
Organization , while retaining the remaining with itself. Which of the following is a valid allocation of addresses
to and ?
A.
B.
C.
D.
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
A. B.
C. D.
isro2011 computer-networks subnetting
Answer key ☟
An organization is granted the block It needs to have subnets. Which of the following is
not an address of this organization?
A. B.
C. D.
computer-networks subnetting isro2014
Answer key ☟
Answer key ☟
Answer key ☟
In a class B subnet, we know the IP address of one host and the mask as given below:
IP address
Mask
What is the first address(Network address)?
A. B.
C. D.
isro2015 computer-networks subnetting
Answer key ☟
A. B. C. D.
isro2014 computer-networks supernetting
Answer key ☟
Answer key ☟
Suppose you are browsing the world wide web using a web browser and trying to access the web servers.
What is the underlying protocol and port number that are being used?
A. B. C. D.
isro2014 computer-networks tcp
Answer key ☟
5.34.3 TCP: ISRO CSE 2020 | Question: 53
A. To detect crashes from the other end of the connection B. To enable retransmission
C. To avoid deadlock condition D. To timeout condition
isro-2020 computer-networks tcp normal
Answer key ☟
Answer key ☟
How many bits internet address is assigned to each host on a TCP/IP internet which is used in all
communication with the host?
Answer key ☟
A. bytes have been successfully received B. bytes have been successfully received
C. bytes have been successfully received D. None of the above
isro2015 computer-networks tcp
Answer key ☟
In a token ring network the transmission speed is bps and the propagation speed is The
-bit delay in this network is equivalent to:
Answer key ☟
Assuming that for a given network layer implementation, connection establishment overhead is
and disconnection overhead is . What would be the minimum size of the packet the
transport layer needs to keep up, if it wishes to implement a datagram service above the network layer and needs
to keep its overhead to a minimum of (ignore transport layer overhead)
a. b. c. d.
isro2018 transport-layer
Answer key ☟
What is WPA?
Answer key ☟
is standard for
A. Ethernet
B. Bluetooth
C. Broadband Wireless
D. Wireless LANs
Answer key ☟
Answer Keys
5.0.1 A 5.0.2 C 5.0.3 D 5.0.4 D 5.0.5 C
5.0.6 A 5.0.7 Q-Q 5.0.8 Q-Q 5.0.9 Q-Q 5.0.10 Q-Q
5.0.11 Q-Q 5.0.12 Q-Q 5.0.13 Q-Q 5.0.14 Q-Q 5.0.15 Q-Q
5.0.16 Q-Q 5.0.17 Q-Q 5.0.18 Q-Q 5.0.19 Q-Q 5.0.20 Q-Q
5.0.21 Q-Q 5.0.22 Q-Q 5.0.23 Q-Q 5.0.24 Q-Q 5.0.25 Q-Q
5.0.26 Q-Q 5.0.27 Q-Q 5.0.28 Q-Q 5.0.29 Q-Q 5.0.30 Q-Q
5.0.31 Q-Q 5.0.32 Q-Q 5.0.33 D 5.0.34 A 5.0.35 D
5.0.36 C 5.0.37 B 5.0.38 C 5.0.39 Q-Q 5.0.40 N/A
5.1.1 A 5.2.1 B 5.2.2 B 5.2.3 C 5.2.4 B
5.3.1 A 5.3.2 C 5.4.1 D 5.4.2 C 5.4.3 A
5.4.4 C 5.4.5 D 5.4.6 D 5.4.7 D 5.5.1 B
5.5.2 B 5.5.3 C 5.5.4 A 5.5.5 B 5.5.6 A
5.5.7 C 5.6.1 A 5.7.1 C 5.7.2 C 5.8.1 D
5.8.2 B 5.9.1 C 5.9.2 Q-Q 5.10.1 A 5.10.2 A
5.10.3 6 5.11.1 A 5.11.2 B 5.11.3 D 5.11.4 D
5.11.5 A 5.11.6 A 5.12.1 A 5.13.1 Q-Q 5.14.1 C
5.14.2 B 5.15.1 B 5.15.2 C 5.15.3 D 5.16.1 C
5.17.1 C 5.18.1 C 5.19.1 B 5.20.1 D 5.20.2 A
5.20.3 D 5.20.4 B 5.21.1 B 5.21.2 C 5.22.1 B
5.22.2 D 5.22.3 A 5.23.1 D 5.23.2 C 5.23.3 D
5.23.4 B 5.23.5 B 5.23.6 A 5.23.7 D 5.23.8 A
5.23.9 C 5.24.1 D 5.24.2 D 5.24.3 B 5.24.4 C
5.24.5 D 5.24.6 D 5.24.7 A 5.24.8 A 5.24.9 C
5.24.10 B 5.24.11 A 5.24.12 D 5.24.13 C 5.25.1 B
5.25.2 A 5.26.1 C 5.27.1 B 5.27.2 D 5.28.1 D
5.28.2 D 5.29.1 D 5.29.2 A 5.29.3 B 5.30.1 B
5.31.1 B 5.32.1 D 5.32.2 C 5.32.3 A 5.32.4 C
5.32.5 C 5.32.6 B 5.32.7 B 5.32.8 D 5.32.9 D
5.32.10 B 5.32.11 A 5.33.1 D 5.34.1 C 5.34.2 B
5.34.3 C 5.34.4 B;C 5.34.5 B 5.34.6 D 5.35.1 C
5.36.1 D 5.37.1 B 5.38.1 D
6 Data Mining and Warehousing (2)
Answer key ☟
Consider the results of a medical experiment that aims to predict whether someone is going to develop
myopia based on some physical measurements and heredity. In this case, the input dataset consists of the
person's medical characteristics and the target variable is binary: for those who are likely to develop myopia and
for those who aren't. This can be best classified as
Answer key ☟
Answer Keys
6.1.1 B 6.1.2 B
7 Databases (78)
The 'command' used to change contents of one database using the contents of another database by linking
them on a common key field?
Answer key ☟
7.0.2 ISRO-DEC2017-12
The rating value is an integer in the range to and only two values
are recorded for Consider the query
The best indexing mechanism appropriate for the query is
Answer key ☟
7.0.3 ISRO-DEC2017-13
Two boats can have the same name but the colour differentiates them.
The two relations
isrodec2017
Answer key ☟
7.0.4 ISRO-DEC2017-15
Answer key ☟
7.0.5 ISRO-DEC2017-16
isrodec2017
Answer key ☟
Consider a database table containing two columns and each of type Integer. After the creation of
the table, one record is inserted in the table. Let and denote the respective
maximum values of and among all records in the table at any point in time. Using and , new
records are inserted in the table times with and values being respectively. It may
be noted that each time after the insertion, values of and change. What will be the output of the
following SQL query after the steps mentioned above are carried out?
SELECT FROM WHERE ;
A. B. C. D.
isro-cse-2023 databases
Answer key ☟
The order of a leaf node in a - tree is the maximum number of (value, data record pointer) pairs it can
hold. Given that the block size is , data record pointer is long, the value field is
long and a block pointer is long, what is the order of the leaf node?
A. B. C. D.
gatecse-2007 databases b-tree normal isro2016
Answer key ☟
A B-Tree used as an index for a large database table has four levels including the root node. If a new key is
inserted in this index, then the maximum number of nodes that could be newly created in the process are
A. B. C. D.
gateit-2005 databases b-tree normal isro2017
Answer key ☟
in a file which contains million records and the order of the tree is , then what is the maximum
number of nodes to be accessed if + tree index is used?
a. b. c. d.
isro2018 databases b-tree
Answer key ☟
Calculate the order of leaf ( ) and non leaf (P) nodes of a tree based on the information given
below.
Search key field = field
Record pointer = bytes
Block pointer = bytes
Block size = KB
A. = 51 & p = 46 B. = 47 & p = 52
C. = 46 & p = 51 D. = 52 & p = 47
isro2013 databases b-tree
Answer key ☟
The physical location of a record determined by a formula that transforms a file key into a record location
is
Answer key ☟
If a node has children in tree, then the node contains exactly _____ keys.
A. B. C. D.
isro2015 databases b-tree
Answer key ☟
Answer key ☟
Answer key ☟
A. Two (or more) candidate keys B. Two candidate keys and composite
C. The candidate key overlap D. Two mutually exclusive foreign keys
isro2007 databases database-normalization
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Every time the attribute A appears, it is matched with the same value of attribute B but not the same value
of attribute C. Which of the following is true?
Answer key ☟
Answer key ☟
For a database relation where the domain of and include only atomic value, only the
following functions dependencies and those that can be inferred from them hold
Answer key ☟
7.3.9 Database Normalization: ISRO CSE 2018 | Question: 5
According to the data shown in the table, which of the following could be a candidate key of the table?
a. b. c. d.
isro2018 databases database-normalization
Answer key ☟
The set of attributes will be fully functionally dependent on the set of attributes if the following
conditions are satisfied.
a. is functionally dependent on b. is not functionally dependent on any subset of
c. Both (a) and (b) d. None of these
isro2018 databases database-normalization
Answer key ☟
If every non-key attribute functionally dependent on the primary key, then the relation will be in
A. First normal form B. Second normal form
C. Third normal form D. Fourth Normal form
isro-2020 databases database-normalization easy
Answer key ☟
Consider the following dependencies and the BOOK table in a relational database design. Determine the
normal form of the given relation.
ISBN Title
ISBN Publisher
Publisher Address
A. First Normal Form B. Second Normal Form
C. Third Normal Form D. BCNF
isro2013 databases database-normalization
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Which of the following possible relations will not hold if the above ERD is mapped into a relation model?
Answer key ☟
A. Accessed by only one user B. Modified by users with the correct password
C. Used to hide sensitive information D. Updated by more than one user
isro2009 databases file-system
Answer key ☟
Which level gives block level striping with double distributed parity?
A. B. C. D.
isro2011 file-system
Answer key ☟
Answer key ☟
Answer key ☟
Immunity of the external schemas (or application programs) to changes in the conceptual scheme is
referred to as:
a. Physical Data Independence b. Logical Data Independence
c. Both (a) and (b) d. None of the above
isro2018 databases file-system
Answer key ☟
A.
B.
C.
D. Ordering is immaterial as all files are accessed with the same frequency.
isro2015 file-system
Answer key ☟
A. B. C. D.
isro2015 databases database-normalization functional-dependency
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
FROM Employee E
GROUP BY E.no
If an index on eno is available,the query can be answered by scanning only the index if
A) the index is only hash and clustered
B) the index is only B+ tree and clustered
C)index can be hash or B+ tree and clustered or non-clustered
D)index can be hash or B+ tree and clustered
Answer key ☟
7.7.5 Indexing: ISRO-2017
isro-2017 indexing
Answer key ☟
Given a block can hold either records or key pointers. A database contains n records, then how many
blocks do we need to hold the data file and the dense index
A. B. C. D.
isro2015 databases indexing
Answer key ☟
Answer key ☟
Which type of DBMS provides support for maintaining several versions of the same entity?
A. Relational Database Management System B. Hierarchical
C. Object Oriented Database Management System D. Network
isro2011 databases rdbms
Answer key ☟
Let and be two relations in which is the foreign key of that refers to the primary
key of . Consider the following four operations and
I. Insert into
II. Insert into
III. Delete from
IV. Delete from
Which of the following can cause violation of the referential integrity constraint above?
Answer key ☟
Answer key ☟
Consider the join of a relation with a relation . If has tuples and has tuples then the maximum
and minimum sizes of the join respectively are
A. and
B. and
C. and
D. and
Answer key ☟
Which of the following queries cannot be expressed using the basic relational algebra operations
?
Answer key ☟
Answer key ☟
7.10.4 Relational Algebra: ISRO CSE 2008 | Question: 33
Answer key ☟
Answer key ☟
If are domains in a relational model, then the relation is a table, which is a subset of
A. B.
C. D.
databases isro2015 relational-model
Answer key ☟
The relation book (title, price) contains the titles and prices of different books. Assuming that no two
books have the same price, what does the following SQL query list?
select title
from book as B
where (select count(*)
from book as T
where T.price>B.price) < 5
Answer key ☟
7.12.2 SQL: ISRO CSE 2007 | Question: 47
Which commands are used to control access over objects in relational database?
Answer key ☟
Answer key ☟
Answer key ☟
ls guaranteed to be same as if
Answer key ☟
Consider the set of relations given below and the SQL query that follows:
Students: (Roll_number, Name, Date_of_birth)
Coursed: (Course_number, Course_name, Instructor)
Grades: (Roll_number, Course_number, Grade)
a. Names of Students who have got an grade in all courses taught by Sriram
b. Names of Students who have got an grade in all courses
c. Names of Students who have got an grade in at least one of the courses taught by Sriram
d. None of the above
Answer key ☟
Answer key ☟
A. All rows in Table , which meets equality condition above and, none from Table which meets the
condition.
B. All rows in Table , which meets equality condition above and none from Table , which meets the
condition.
C. All rows in Table , which meets the equality condition
D. All rows in Table , which meets the equality condition
Answer key ☟
Answer key ☟
A. B. C. D.
isrodec2017 sql
Answer key ☟
A. B. C. D. It is variable
isro2015 databases sql
Answer key ☟
7.12.12 SQL: ISRO2015-22
A. Find the names of all suppliers who have supplied non-blue part.
B. Find the names of all suppliers who have not supplied non-blue part.
C. Find the names of all suppliers who have supplied only non-blue parts
D. Find the names of all suppliers who have not supplied only non-blue part.
Answer key ☟
Answer key ☟
7.13.1 Transaction and Concurrency: GATE CSE 2003 | Question: 29, ISRO2009-73
Which of the following scenarios may lead to an irrecoverable error in a database system?
Answer key ☟
7.13.2 Transaction and Concurrency: GATE CSE 2006 | Question: 20, ISRO2015-17
Consider the following log sequence of two transactions on a bank account, with initial balance that
transfer to a mortgage payment and then apply a interest.
1. T1 start
2. T1 B old new
3. T1 M old new
4. T1 commit
5. T2 start
6. T2 B old new
7. T2 commit
Suppose the database system crashes just before log record is written. When the system is restarted, which one
statement is true of the recovery procedure?
Answer key ☟
Which of the following concurrency control protocol ensures both conflict and free from deadlock? ,
Answer key ☟
Which of the following is correct with respect to Two phase commit protocol?
Answer key ☟
Which of the following contains complete record of all activity that affected the contents of a database
during a certain period of time?
A. Transaction log B. Query language
C. Report writer D. Data manipulation language
isro2009 databases transaction-and-concurrency
Answer key ☟
Transaction
T1 T2 T3
R(Y)
R(Z)
R(X)
W(X)
W(Y)
W(Z)
W(Z)
R(Y)
W(Y)
R(Y)
W(Y)
R(X)
W(X)
A. B.
C. D.
isro2011 databases transaction-and-concurrency
Answer key ☟
Trigger is
Answer key ☟
Answer key ☟
Let us assume that transaction has arrived before transaction . Consider the schedule
Answer key ☟
Answer key ☟
Amongst the ACID properties of a transaction, the 'Durability' property requires that the changes made to
the database by a successful transaction persist
Answer key ☟
Answer key ☟
Answer Keys
7.0.1 B 7.0.2 D 7.0.3 A 7.0.4 B 7.0.5 C
7.0.6 Q-Q 7.1.1 A 7.1.2 A 7.1.3 B 7.1.4 C
7.1.5 A 7.1.6 B 7.2.1 B 7.3.1 D 7.3.2 C
7.3.3 B 7.3.4 B 7.3.5 A 7.3.6 B 7.3.7 C
7.3.8 A 7.3.9 D 7.3.10 C 7.3.11 C 7.3.12 B
7.4.1 D 7.4.2 B 7.4.3 B 7.4.4 Q-Q 7.4.5 C
7.5.1 A 7.5.2 C 7.5.3 D 7.5.4 D 7.5.5 B
7.5.6 A 7.6.1 B 7.7.1 A 7.7.2 C 7.7.3 A
7.7.4 Q-Q 7.7.5 Q-Q 7.7.6 A 7.8.1 B 7.8.2 C
7.9.1 B 7.9.2 B 7.10.1 B 7.10.2 C 7.10.3 A
7.10.4 A 7.11.1 B 7.11.2 B 7.12.1 D 7.12.2 B
7.12.3 A 7.12.4 B 7.12.5 A 7.12.6 C 7.12.7 A;C
7.12.8 A 7.12.9 B 7.12.10 D 7.12.11 D 7.12.12 X
7.12.13 D 7.13.1 D 7.13.2 B 7.13.3 A 7.13.4 A
7.13.5 A 7.13.6 B 7.13.7 D 7.13.8 B 7.13.9 B
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
For a -bit digital ramp ADC using clock, the maximum conversion time is
a. b.
c. d.
isro2016-ece digital-logic
Answer key ☟
Answer key ☟
How is the status of the carry, auxiliary carry and parity flag affected if write instruction?
MOV A,#9C
ADD A,#64H
a. b.
c. d.
isro2016-ece digital-logic isro-ece
Answer key ☟
What is the functionality of following digital circuit? A is input data, CLK is system clock ind Y is output.
a. Falling edge detection of input A b. Clock division by
c. Rising edge detection of input A d. Clock division by
isro2015-ece isro-ece digital-logic
Answer key ☟
a. b. c. d.
digital-logic isro-ece isro2012-ece
Answer key ☟
In a JK Flipflop we have J= Q' and K=1. assuming that the flipflop was initially cleared and clocked for 6 pulses,
the sequence at the Q output will be
a) 010000
b) 011001
c) 010010
d) 010101
Answer key ☟
a. MOS
b. CMOS
c. ECL
d. RTL
isro-ece isro2011-ece digital-logic
8.0.13 ISRO 2011- ECE Digital Logic
What is the maximum clock frequency at the given circuit can be operated without timing violations? Assume that
the Combinational logic delay is 10 ns and the clock duty cycle varies from 40% to 60 %.
a) 100 MHz
b) 50 MHz
c) 40 MHz
d) 25 MHz
isro-ece digital-logic
Answer key ☟
Given shift register is initially loaded with the bit pattern "1010". After how many clock cycles will the content of
shift register be "1010" again?
a) 5
b) 9
c) 7
d) 15
isro-ece digital-logic
Answer key ☟
A certain JK FF has =12 ns. The largest MOD counter that can be constructed from such FFs and still
operate up to 10 MHz is
a) 16
b) 256
c) 8
d) 128
isro-ece digital-logic
Answer key ☟
a) FPGA
b) ASIC
c) CPLD
d) PLD
isro-ece digital-logic
a) CMOS
b) ECL
c) TTL
d) NMOS
isro-ece digital-logic
Answer key ☟
A 5 bit DAC has a current output. For a digital input of 10100, an output current of 10 mA is produced.
What will be the output current for a digital input of 11101?
a) 14.5 mA
b) 10 mA
c) 100 mA
(a) XNOR
(b) XOR
(c) Sequential
(d) OR
isro-ece digital-logic
Answer key ☟
(a) 256
(b) 255
(c) 9
(d) 8
isro-ece digital-logic
Minimum number of 2-input NAND gates that will be required to implement the function: Y = AB + CD
+ EF is
(a) 4
(b) 5
(c) 6
(d) 7
isro-ece digital-logic
Answer key ☟
8.0.24 ISRO 2008-ECE - Ripple counter
In a ripple counter how many changes in state happen when count changes from 7 to 8?
(a)
(b)
(c)
(d)
isro-ece digital-logic
Answer key ☟
isro-ece digital-logic
Answer key ☟
Which of the following represents the Moore model for sequential circuits?
isro-ece digital-logic
Answer key ☟
The circuit is a
a) Monostable MV
b) Astable MV
c) Adder
d) SR FF
digital-logic isro-ece
Answer key ☟
A 4-bit presetable UP counter has preset input 0101. The preset operation takes place as soon as the
counter reaches 1111. The modulus of the counter is
a) 5
b) 10
c) 11
d) 15
isro-ece digital-logic
Answer key ☟
A 4-bit synchronous counter uses flip-flops with propagation delay time of 25 ns each. The maximum
possible time required for change of state will be
a) 25 ns
b) 50 ns
c) 75 ns
d) 100 ns
isro-ece digital-logic
Answer key ☟
The shift register shown in the given figure is initially loaded with the bit pattern 1010. Subsequently the shift
register is clocked, and with each clock pulse the pattern gets shifted by one bit position to the right. With each
shift, the bit at the serial input is pushed to the left most position (MSB). After how many clock pulses will the
content of the shift register become 1010 again?
a) 3
b) 7
c) 11
d) 15
isro-ece
Answer key ☟
isro-ece digital-logic
Answer key ☟
The sum S of A and B in a half Adder can be implemented by using K NAND gates. The value of K is
a) 3
b) 4
c) 5
d) None of these
isro-ece digital-logic
Answer key ☟
Assuming that only the X and Y logic inputs are available and their complements X' and Y' are not
available, what is the minimum number of two-input NAND gates requires to implement X ⊕ Y?
a) 2
b) 3
c) 4
d) 5
digital-logic isro-ece
Answer key ☟
isro-ece digital-logic
A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-
flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is
a) 100 n sec
b) 50 n sec
c) 20 n sec
d) 10 n sec
isro-ece digital-logic
Answer key ☟
The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash
converter type (3) Dual slope converter type. The correct sequence in the increasing order of their
conversion times is
a) 1,2,3
b) 2,1,3
c) 3,2,1
d) 3,1,2
isro-ece digital-logic
a) 1
b) 2
c) 0.1
d) 0.2
isro-ece digital-logic
Answer key ☟
b) A+AB = A+B
c) A+A'B = A+B
d) A(A+B) = B
engineering-mathematics isro-ee
Answer key ☟
In an all NOR gate realization of a combinational circuit all EVEN and ODD level gates behave like
a) OR and AND
b) AND and OR
c) OR and NOT
Answer key ☟
isro-ee digital-logic
Answer key ☟
A three stage Johnson counter ring in figure is clocked at a constant frequency of fc from starting state of Q0Q1Q2
= 101. The frequency of output Q0Q1Q2 will be
(a) fc / 2
(b) fc /6
(c) fc/ 3
(d) fc /8
digital-logic isro-ee
Answer key ☟
A 4 bit module -16 ripple counter uses JK F/F. If the propagation delay of each F/F is 50 nano seconds, the
maximum clock frequency that can be used is equal to
(a) 20 MHz
(b) 5 MHz
(c) 10 MHz
(d) 4 MHz
isro-ee digital-logic
Answer key ☟
The 2-input XOR has a high output only when the input values are
(a) low
(b) high
(c) same
(d) different
isro2017
Answer key ☟
isro2017-ece
Answer key ☟
8.0.45 ISRO 2017-ECE T- Flip flops
If input to T flip flop is 200 Hz signal, then what will be the output signal frequency if four T flip flops are
connected in cascade
(a) 200 Hz
(b) 50 Hz
(c) 800 Hz
(d) None of the above
isro2017-ece
Answer key ☟
isro2017-ece
Answer key ☟
Which of the following statement is true for Programmable Logic array (PLA)?
(a) Fixed AND array and Fused programmable OR array
(b) Fused programmable AND array and Fixed OR array
(c) Fused programmable AND array and Fused programmable OR array
(d) None of the above
isro2017-ece
Answer key ☟
MVI A, DATA1
ORA A
JM DISPLAY
OUT PORT1
CMA
DISPLAY : ADI 01H
OT PORT1
HLT
isro2017-ece
8.0.49 ISRO-DEC2017-40
A. B. C. D.
isrodec2017
Answer key ☟
8.0.50 ISRO-DEC2017-39
A computer with - word size uses complement to represent numbers, The range of integers
that can be represented by this computer is
A. to B. to
C. to D. to
isrodec2017
Answer key ☟
8.0.51 ISRO-DEC2017-75
A. B. C. D.
isrodec2017
Answer key ☟
8.0.52 ISRO-DEC2017-71
A. B. C. D.
isrodec2017
Answer key ☟
8.0.53 ISRO-DEC2017-72
A.
B.
C.
D.
isrodec2017
Answer key ☟
A logic circuit that provides a LOW output when both inputs are HIGH or both inputs are LOW is
Answer key ☟
isro-cse-2023 digital-logic
Answer key ☟
A. two inputs and two outputs B. two inputs and three outputs
C. three inputs and two outputs D. three inputs and one output
isro-cse-2023 digital-logic
Answer key ☟
A half adder can be constructed using two -input logic gates. One of them is an -gate, the other is
A. B. C. D.
isro-ece digital-logic adder
Answer key ☟
Answer key ☟
For a binary half-subtractor having two inputs and , the correct set of logical outputs
and are
A. B.
C. D.
isro2016 digital-logic adder
Answer key ☟
When two -bit binary numbers are added the sum will contain at the most
Answer key ☟
In a -bit ripple carry adder using identical full adders, each full adder takes ns for computing sum. If
the time taken for -bit addition is ns, find time taken by each full adder to find carry.
A. ns B. ns C. ns D. ns
isro-2020 digital-logic combinational-circuit adder normal
Answer key ☟
a. b. c. d.
isro2016-ece digital-logic combinational-circuit adder
Answer key ☟
8.1.7 Adder: ISRO2015-7
If half adders and full adders are implements using gates, then for the addition of two bit numbers
(using minimum gates) the number of half adders and full adders required will be
A. B. C. D.
isro2015 digital-logic adder
Answer key ☟
Answer key ☟
When two numbers and are added what is the binary representation of the resultant
number ?
A. B. C. D. results in overflow
isro2013 number-representation bcd
Answer key ☟
For the switch circuit, taking open as 0 and closed as 1, the expression for the circuit is .
A. B. C. D. None of these
isro-ece digital-logic boolean-algebra
Answer key ☟
The Boolean expression for the output of the logic circuit shown in the figure is
A. B.
C. D.
digital-logic isro-ece boolean-algebra
Answer key ☟
Answer key ☟
A.
B.
C.
D.
Answer key ☟
A.
B.
C.
D.
Answer key ☟
A. B.
C. D. None of these
isro2008 digital-logic boolean-algebra
Answer key ☟
8.4.7 Boolean Algebra: ISRO CSE 2008 | Question: 25
In the expression by writing the first term as , the expression is best simplified as
A.
B.
C.
D.
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
A. B. C. D.
isro2011 digital-logic boolean-algebra
Answer key ☟
Evaluate
A. All B. All C. D.
isro2011 digital-logic boolean-algebra
Answer key ☟
8.4.13 Boolean Algebra: ISRO CSE 2014 | Question: 56
Answer key ☟
A. B.
C. D.
isro2016 digital-logic boolean-algebra
Answer key ☟
Any set of Boolean operation that is sufficient to represent all Boolean expression is said to be complete.
Which of the following is not complete ?
A. B. C. D.
isro2018 digital-logic boolean-algebra
Answer key ☟
The truth table for implementing a Boolean variable is given where represents don't care states. The minimized
expression for is:
A. B.
C. D. None of the above
isro-ece isro2012-ece digital-logic boolean-algebra
Answer key ☟
Which of the following is the Boolean function for majority voting, assuming are inputs and is
output?
a. b.
c. d.
isro-ece isro2013-ece digital-logic boolean-algebra
Answer key ☟
Answer key ☟
A. B. C. D. None of these
isro2015 digital-logic boolean-algebra
Answer key ☟
A.
B.
C.
D.
Answer key ☟
The two numbers given below are multiplied using the Booth's algorithm
Multiplicand
Multiplier
How many additions/subtractions are required for the multiplication of the above two numbers?
A. B. C. D.
isro2009 digital-logic booths-algorithm
Answer key ☟
8.6 CO and Architecture (1)
The theoretical dividing line between Reduced Instruction Set computing (RISC) microprocessor and
Complex Instructions Set Computing (CISC) microprocessor is
Answer key ☟
is
A. B.
C. D.
digital-logic canonical-normal-form isro2016
Answer key ☟
Answer key ☟
A. B.
C. D.
isro2007 digital-logic digital-circuits circuit-output
Answer key ☟
8.8.2 Circuit Output: ISRO CSE 2008 | Question: 12
A.
B.
C.
D.
Answer key ☟
The logic operations of two combinational circuits in Figure-I and Figure -II are
Answer key ☟
A. B. C. D.
isro2008 digital-logic circuit-output
Answer key ☟
__________?
A. B.
C. D.
isro2014 digital-logic circuit-output
Answer key ☟
8.8.6 Circuit Output: ISRO CSE 2014 | Question: 21, UGCNET-Dec2012-III: 23, UGCNET-Dec2013-III: 22
What are the final values of and after clock cycles, if initial values are in the sequential circuit
shown below:
A. B. C. D.
isro2014 digital-logic circuit-output ugcnetcse-dec2012-paper3 ugcnetcse-dec2013-paper3
Answer key ☟
The inverter, AND and OR gates have delays of and nanoseconds respectively. Assuming that wire delays
are negligible, what is the duration of glitch for before it becomes stable?
A. B. C. D.
isro2014 digital-logic circuit-output
Answer key ☟
Answer key ☟
Answer key ☟
In the diagram above, the inverter (NOT gate) and the AND-gates labeled and have delays of and
nanoseconds (ns), respectively. Wire delays are negligible. For certain values and , together with certain
transition of , a glitch (spurious output) is generated for a short time, after which the output assumes its correct
value. The duration of glitch is:
a. b. c. d.
isro2018 digital-logic circuit-output
Answer key ☟
Minimum number of NAND gates required to implement the following binary equation
A. B. C. D.
isro-2020 digital-logic combinational-circuit circuit-output normal
Answer key ☟
8.8.12 Circuit Output: ISRO CSE 2020 | Question: 12
If is a -bit binary number, then what is the code generated by the following circuit?
Answer key ☟
The following circuit compares two -bit binary numbers, and represented by and
respectively. ( and represent Least Significant Bits)
A. B. C. D.
isro-2020 digital-logic digital-circuits circuit-output normal
Answer key ☟
A.
B.
C.
D.
Answer key ☟
Answer key ☟
Answer key ☟
How many -to- line decoders with an enable input are needed to construct a -to- line decoder without
using any other logic gates?
A. B. C. D.
gatecse-2007 digital-logic normal isro2011 decoder
Answer key ☟
a) Excess -3 code
b) Gray code
c) BCD code
d) Hamming code
Answer key ☟
A.
B.
C.
D.
Answer key ☟
Answer key ☟
If a counter having flip flops is initially at what count will it hold after pulses?
a. b.
c. d.
digital-logic isro-ece isro2013-ece sequential-circuit digital-counter
Answer key ☟
Answer key ☟
In an latch made by cross-coupling two NAND gates, if both and inputs are set to , then it will
result in
A. B.
C. D. Indeterminate states
gatecse-2004 digital-logic easy isro2007 flip-flop
Answer key ☟
Answer key ☟
For one of the following conditions, clocked - flip-flop can be used as divided by circuit where the
pulse train to be divided is applied at clock input :
Answer key ☟
8.13.4 Flip Flop: ISRO 2008- ECE Flip flop counter
A counter is designed with six stages of flip flops. Determine the output frequency at the last (sixth) stage,
when input frequency is .
A. B. C. D.
digital-logic isro-ece flip-flop
The mod number of a Johnson counter will be always equal to the number of flip flops used :
A. same B. twice
C. where is the number of flip flops. D. None of the these
isro-ece digital-logic flip-flop
Answer key ☟
A - flip flop with a clock input can be converted to a flip flop using :
A. Two inverters
B. the flip flop outputs ( & ) connected to its inputs ( & )
C. One inverter
D. Not possible
Answer key ☟
Answer key ☟
In an flip-flop, if the line (Set line) is set high ( ) and the line (Reset line) is set low ( ), then the
state of the flip-flop is :
A. Set to B. Set to
C. No change in state D. Forbidden
isro2011 digital-logic flip-flop
Answer key ☟
Answer key ☟
8.13.10 Flip Flop: ISRO-2013-30
In a three stage counter, using flip flops what will be the value of the counter after giving pulses to its
input ? Assume that the value of counter before giving any pulses is :
A. B. C. D.
isro2013 digital-logic flip-flop
Answer key ☟
A.
B.
C.
D.
Answer key ☟
Consider a computer system that stores a floating-point numbers with -bit mantissa and an -bit
exponent, each in two’s complement. The smallest and largest positive values which can be stored are :
A. B.
C. D.
isro2007 digital-logic number-representation floating-point-representation
Answer key ☟
A computer uses digit mantissa and digit exponent. If and then will :
A. result in an overflow error B. result in an underflow error
C. be D. be +
isro2008 digital-logic number-representation floating-point-representation
Answer key ☟
Any set of Boolean operators that is sufficient to represent all Boolean expressions is said to be complete.
Which of the following is not complete ?
A. { , } B. { } C. { , } D. { , }
isro2013 functional-completeness digital-logic digital-circuits combinational-circuit
Answer key ☟
Which of the following set of components is sufficient to implement any arbitrary Boolean function?
A. gates, gates
B. gates, gates and
C. to multiplexer
D. Three input gates that output for the inputs
Answer key ☟
A. B. C. D.
isro2017-ece digital-logic number-system gray-code
Answer key ☟
Answer key ☟
What is the decimal value of the floating-point number (hexadecimal notation)? (Assume -
bit, single precision floating point representation)
A. B. C. D.
isro2011 digital-logic number-representation floating-point-representation ieee-representation
Answer key ☟
In the standard single precision floating point representation, there is bit for sign, bits for
fraction and bits for exponent. What is the precision in terms of the number of decimal digits?
A.
B.
C.
D.
Answer key ☟
8.18.3 IEEE Representation: ISRO2015-1
Which of the given number has its -bit floating point representation as
A. B. C. D.
isro2015 digital-logic number-representation floating-point-representation ieee-representation
Answer key ☟
The function shown in the figure when simplified will yield a result with _______ terms
A. B. C. D.
digital-logic isro-ece k-map
Answer key ☟
The complexity of matrix multiplication of two matrices A and B whose orders are and
respectively is
A.
B.
C.
D.
Answer key ☟
How many RAM chips are needed to provide a memory capacity of bytes?
A. B. C. D.
gatecse-2009 digital-logic memory-interfacing easy isro2015
Answer key ☟
Suppose you want to build a memory with byte words and a capacity of bits. What is type of decoder
required if the memory is built using chips?
A. B. C. D.
digital-logic memory-interfacing isro2014
Answer key ☟
A. (Zero) B. C. D.
digital-logic min-no-gates isro2016
Answer key ☟
What is the minimum number of two-input gates used to perform the function of two-input
gate?
Answer key ☟
A. B. C. D.
isro2008 digital-logic multiplexer
Answer key ☟
Answer key ☟
8.23.3 Multiplexer: ISRO CSE 2023 | Question: 70
i. A digital multiplexer takes one input from many inputs and outputs the selected one
ii. Four elect lines are required for 1-16 multiplexer
iii. Eight OR gates are required to implement an octal to binary encoder
A. (i) and (ii) B. (ii) and (iii) C. (i) alone D. none of the above
Answer key ☟
A. B. C. D.
isro2014-ece isro-ece digital-logic combinational-circuit multiplexer
Answer key ☟
A. B. C. D.
isro2015 digital-logic multiplexer
Answer key ☟
A. B. C. D.
gate1995 digital-logic number-representation normal isro2015
Answer key ☟
8.24.2 Number Representation: GATE CSE 2005 | Question: 16, ISRO2009-18, ISRO2015-2
The range of integers that can be represented by an bit complement number system is:
A. B.
C. D.
gatecse-2005 digital-logic number-representation easy isro2009 isro2015
Answer key ☟
is equivalent to
A. B. C. D.
gatecse-2009 digital-logic number-representation isro2017
Answer key ☟
Answer key ☟
a) 1100
b) 1001
c)0110
d) 0100
isro-ece digital-logic number-representation
Answer key ☟
Given the decimal number -19 an eight bit two's complement representation is given by
a) 11101110
b) 11101101
c) 11101100
d) none of these
isro-ece digital-logic number-representation
Answer key ☟
When two numbers are added in excess- code and the sum is less than , then in order to get the correct
answer it is necessary to
Answer key ☟
A. 8 B. 9 C. 10 D. 12
isro2007 digital-logic number-representation
Answer key ☟
A. B. C. D.
isro2007 digital-logic number-representation
Answer key ☟
One approach to handling fuzzy logic data might be to design a computer using ternary (base- ) logic so
that data could be stored as “true,” “false,” and “unknown.” If each ternary logic element is called a flit,
how many flits are required to represent at least different values?
A. B. C. D.
isro2007 digital-logic number-representation
Answer key ☟
A. B. C. D.
isro2008 digital-logic number-representation
Answer key ☟
A. B. or C. D. None of these
isro2008 digital-logic number-representation
Answer key ☟
A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs
addition of the following two complement numbers and After the execution of
this addition operation, the status of the carry, overflow and sign flags, respectively will be
A. B. C. D.
isro2009 number-representation digital-logic
Answer key ☟
How many different numbers can be stored in switches ? (Assume two position or on-off
switches).
A. B. C. D.
isro2014 digital-logic number-representation
Answer key ☟
A. B. C. D.
digital-logic number-representation isro2016
Answer key ☟
A. B. C. D.
digital-logic number-representation isro2016
Answer key ☟
a. b. c. d.
isro2018 number-representation digital-logic
Answer key ☟
If a variable can take only integral values from to , where is an integer, then the variable can be
represented as a bit-field whose width is the log in the answer are to the base , and means the
floor of
a.
b.
c.
d. None of the above
Answer key ☟
A computer uses ternary system instead of the traditional systen, An bit string in the binary system will
occupy
a. ternary digits b. ternary digits
c. ternary digits d. ternary digits
isro2018 digital-logic number-representation
Answer key ☟
a. b. c. d.
isro-ece isro2012-ece digital-logic number-representation
Answer key ☟
a. b. c. d.
isro-ece isro2013-ece digital-logic number-representation
Answer key ☟
A. B. C. D.
isro2013 number-representation
Answer key ☟
Two eight bit bytes and are added. What are the values of the overflow, carry and zero
flags respectively, if the arithmetic unit of the CPU uses 's complement form?
A. B. C. D.
isro2013 digital-logic number-representation
Answer key ☟
A. B. C. D.
isro2013 digital-logic number-representation
Answer key ☟
Answer key ☟
Answer key ☟
The decimal number has digits. The number of bits needed for its equivalent binary representation is?
A. B. C. D.
isro2015 digital-logic number-representation
Answer key ☟
a) 101101.100
b) 1101111.111
c) 111111.1111
d) 110110.011
isro-ece digital-logic number-system
Answer key ☟
How many programmable fuses are required in a PLA which takes inputs and gives outputs? It has to
use OR gates and AND gates.
A. B. C. D.
isro2013 digital-logic pla
Answer key ☟
Which of the following expresses the next state in terms of current state?
A.
B.
C.
D.
Answer key ☟
What is the frequency and duty cycle of output when CLK frequency is duty cyle?
Answer key ☟
a. b. c. d.
isro2013-ece isro-ece digital-logic sequential-circuit flip-flop
Answer key ☟
a. repeats
b. repeat
c. repeats
d. repeats
The time delay obtained through an -bit serial register with MHz clock is:
a. ns
b. µs
c. µs
d. µs
Answer key ☟
Answer Keys
8.0.1 B 8.0.2 D 8.0.3 C 8.0.4 X 8.0.5 Q-Q
8.0.6 Q-Q 8.0.7 Q-Q 8.0.8 Q-Q 8.0.9 Q-Q 8.0.10 Q-Q
8.0.11 Q-Q 8.0.12 Q-Q 8.0.13 Q-Q 8.0.14 Q-Q 8.0.15 Q-Q
8.0.16 Q-Q 8.0.17 Q-Q 8.0.18 Q-Q 8.0.19 Q-Q 8.0.20 Q-Q
8.0.21 Q-Q 8.0.22 Q-Q 8.0.23 Q-Q 8.0.24 Q-Q 8.0.25 Q-Q
8.0.26 Q-Q 8.0.27 Q-Q 8.0.28 Q-Q 8.0.29 Q-Q 8.0.30 Q-Q
8.0.31 Q-Q 8.0.32 Q-Q 8.0.33 Q-Q 8.0.34 Q-Q 8.0.35 Q-Q
8.0.36 Q-Q 8.0.37 Q-Q 8.0.38 Q-Q 8.0.39 Q-Q 8.0.40 Q-Q
8.0.41 Q-Q 8.0.42 Q-Q 8.0.43 D 8.0.44 Q-Q 8.0.45 Q-Q
8.0.46 Q-Q 8.0.47 Q-Q 8.0.48 Q-Q 8.0.49 A 8.0.50 C
8.0.51 D 8.0.52 B 8.0.53 X 8.0.54 Q-Q 8.0.55 Q-Q
8.0.56 Q-Q 8.1.1 Q-Q 8.1.2 B 8.1.3 C 8.1.4 D
8.1.5 D 8.1.6 Q-Q 8.1.7 C 8.2.1 A 8.3.1 A
8.4.1 C 8.4.2 Q-Q 8.4.3 A 8.4.4 C 8.4.5 A
8.4.6 A 8.4.7 X 8.4.8 B 8.4.9 A 8.4.10 B
8.4.11 B 8.4.12 C 8.4.13 C 8.4.14 A 8.4.15 A
8.4.16 Q-Q 8.4.17 Q-Q 8.4.18 Q-Q 8.4.19 B 8.4.20 A
8.5.1 B 8.6.1 Q-Q 8.7.1 B 8.7.2 C 8.8.1 A
8.8.2 X 8.8.3 A 8.8.4 C 8.8.5 C 8.8.6 D
8.8.7 A 8.8.8 B 8.8.9 A 8.8.10 A 8.8.11 A
8.8.12 B 8.8.13 A 8.8.14 B 8.9.1 Q-Q 8.9.2 Q-Q
8.10.1 C 8.11.1 Q-Q 8.11.2 A 8.11.3 X 8.12.1 C
8.12.2 Q-Q 8.12.3 B 8.13.1 C 8.13.2 Q-Q 8.13.3 Q-Q
8.13.4 Q-Q 8.13.5 Q-Q 8.13.6 Q-Q 8.13.7 D 8.13.8 A
8.13.9 C 8.13.10 B 8.14.1 A 8.14.2 D 8.14.3 C
8.15.1 C 8.15.2 B 8.16.1 Q-Q 8.17.1 C 8.18.1 C
8.18.2 C 8.18.3 C 8.19.1 Q-Q 8.20.1 Q-Q 8.21.1 C
8.21.2 A 8.22.1 A 8.22.2 C 8.23.1 A 8.23.2 A;D
8.23.3 Q-Q 8.23.4 D 8.23.5 B 8.24.1 C 8.24.2 A
8.24.3 B 8.24.4 C 8.24.5 Q-Q 8.24.6 Q-Q 8.24.7 A
8.24.8 B 8.24.9 C 8.24.10 C 8.24.11 B 8.24.12 D
8.24.13 B 8.24.14 D 8.24.15 D 8.24.16 C 8.24.17 D
8.24.18 A 8.24.19 D 8.24.20 C 8.24.21 Q-Q 8.24.22 B
8.24.23 D 8.24.24 A 8.24.25 D 8.24.26 A 8.24.27 B
8.25.1 Q-Q 8.26.1 C 8.27.1 A 8.27.2 Q-Q 8.27.3 Q-Q
8.27.4 Q-Q 8.28.1 Q-Q 8.28.2 Q-Q
9 Discrete Mathematics: Combinatory (2)
The number of bit strings of length that will either start with or end with is?
A.
B.
C.
D.
Answer key ☟
A CPU scheduling algorithm determines an order for the execution of its scheduled processes. Given 'n'
processes to be scheduled on one processor, how many possible different schedules are there?
A. B. C. D.
isro2013 process-scheduling combinatory
Answer key ☟
Answer Keys
9.1.1 C 9.2.1 C
10 Discrete Mathematics: Graph Theory (18)
10.0.1 ISRO-2013-76
Answer key ☟
A. B. C. D.
Answer key ☟
i. In a graph G with ‘n’ vertices and ‘e’ edges, sum of degrees of vertices = 2*e.
ii. Eccentricity of a connected graph can never be equal to radius of the graph
iii. Girth of a graph is the shortest cycle of the graph
iv. Graph with equal degree for all vertices is multigraph
Answer key ☟
If is a graph with e edges and n vertices the sum of the degrees of all vertices in is
A. B. C. D.
isro2009 graph-theory degree-of-graph
Answer key ☟
Answer key ☟
A given connected graph is a Euler Graph if and only if all vertices of are of
A. same degree
B. even degree
C. odd degree
D. different degree
Answer key ☟
If a graph requires different colours for its proper colouring, then the chromatic number of the graph is
A. B. C. D.
isro2007 graph-theory graph-coloring
Answer key ☟
A. B. C. D.
gate1994 graph-theory graph-connectivity combinatory normal isro2008 counting
Answer key ☟
10.4.2 Graph Connectivity: GATE CSE 2002 | Question: 1.25, ISRO2008-30, ISRO2016-6
The maximum number of edges in a -node undirected graph without self loops is
A. B. C. D.
gatecse-2002 graph-theory easy isro2008 isro2016 graph-connectivity
Answer key ☟
Let be an arbitrary graph with nodes and components. If a vertex is removed from , the number of
components in the resultant graph must necessarily lie down between
A. and B. and
C. and D. and
gatecse-2003 graph-theory graph-connectivity normal isro2009
Answer key ☟
10.4.4 Graph Connectivity: ISRO CSE 2007 | Question: 62
Let be the adjacency matrix of a graph with no self loops. The entries along the principal diagonal of
are
A. all zeros B. all ones
C. both zeros and ones D. different
isro2007 graph-theory graph-connectivity
Answer key ☟
A. B. C. D.
isro2008 graph-theory graph-connectivity
Answer key ☟
Answer key ☟
In a graph there is one and only one path between every pair of vertices then is a
Answer key ☟
A simple graph ( a graph without parallel edge or loops) with vertices and components can have at
most
A. edges B. edges
C. edges D. edges
isro2009 graph-theory graph-connectivity
Answer key ☟
How many edges are there in a forest with vertices and components?
A. B.
C. D.
isro2011 graph-theory graph-connectivity
Answer key ☟
A. maximum of and
B.
C.
D.
Answer key ☟
If there are five faces and nine vertices in an undirected planar graph, then number of edges is
Answer key ☟
Answer Keys
10.0.1 A 10.0.2 Q-Q 10.0.3 Q-Q 10.1.1 D 10.2.1 B
10.2.2 B 10.3.1 B 10.4.1 C 10.4.2 B 10.4.3 C
10.4.4 A 10.4.5 D 10.4.6 C 10.4.7 C 10.4.8 D
10.4.9 C 10.4.10 D 10.5.1 Q-Q
11 Discrete Mathematics: Mathematical Logic (6)
11.0.1 ISRO-DEC2017-6
The proposition is a
Answer key ☟
11.0.2 ISRO-DEC2017-7
A.
B.
C.
D.
isrodec2017
Answer key ☟
The Boolean expression for the shaded area in the Venn diagram is
a) X'+Y' +Z
b) XY'Z + X'YZ
c) X + Y + Z
d) X'Y'Z+XY
Answer key ☟
11.2.1 First Order Logic: GATE CSE 2004 | Question: 23, ISRO2007-32
Identify the correct translation into logical notation of the following assertion.
Some boys in the class are taller than all the girls
Note: is true if is taller than .
A.
B.
C.
D.
Answer key ☟
Given that
means “ is a bear”
means “ is a fish” and
means “ eats ”
Then what is the best meaning of
Answer key ☟
A.
B.
C.
D.
Answer key ☟
Answer Keys
11.0.1 C 11.0.2 A 11.1.1 Q-Q 11.2.1 D 11.2.2 D
11.3.1 B
12 Discrete Mathematics: Set Theory & Algebra (14)
12.0.1 ISRO-DEC2017-4
A. B.
C. D.
isrodec2017
Answer key ☟
12.0.2 ISRO-DEC2017-8
A. B. C. D.
isrodec2017
Answer key ☟
12.0.3 ISRO-DEC2017-9
Answer key ☟
Answer key ☟
Answer key ☟
Let be a finite set having elements and let be a finite set having elements. What is the number of
distinct functions mapping into .
A. B. C. D.
isro2014 set-theory&algebra functions combinatory
Answer key ☟
A. B. C. D.
isrodec2017 set-theory&algebra functions
Answer key ☟
Answer key ☟
The time complexity of computing the transitive closure of binary relation on a set of elements is known
to be
a. b. c. d.
isro2018 set-theory&algebra relations time-complexity
Answer key ☟
Consider the set of integers Let denote "divides with an integer quotient " (e.g. but not ).
Then is
A.
B.
C.
D.
Answer key ☟
A. B.
C. D.
isro2017 set-theory&algebra set-theory
Answer key ☟
Answer key ☟
The number of elements in the power set of the set {{A, B}, C} is
A. B. C. D.
isro2013 set-theory&algebra set-theory easy
Answer key ☟
Answer Keys
12.0.1 B 12.0.2 D 12.0.3 B 12.1.1 C 12.2.1 C
12.3.1 A 12.3.2 A 12.4.1 B 12.5.1 D 12.5.2 B
12.6.1 A 12.6.2 B 12.6.3 X 12.6.4 D
13 Engineering Mathematics: Calculus (28)
Answer key ☟
a) 3/2
b) 2/3
c) 8/9
d) 8/13
Answer key ☟
a) 5 π /16
b) 5 π /8
c) 0
d) 5 π /32
Answer key ☟
Answer key ☟
13.0.5 ISRO 2009- ECE Calculus
a) f(x) continuous at x = 0
c) f '(0) = 1
Answer key ☟
(x log sin x) is
a) 0
b) 1/2
c) 1
d) 2
isro-ece engineering-mathematics calculus
Answer key ☟
There is a function f(x), such that f(0) = 1 and f ' (0)= -1 and f(x) is positive for all values of x. Then,
Answer key ☟
(a) 0.900
(b) 1.001
(c) 0.802
(d) 0.994
engineering-mathematics isro-mech calculus
Answer key ☟
Area bounded by the parabola 2y= and the line x = y-4 is equal to
(a) 4.5
(b) 9
(c) 18
(d) 36
engineering-mathematics isro-mech calculus
Answer key ☟
Lim x 0
(a) 0
(b) ∞
(c) 1
Answer key ☟
a) Zero
b) undefined
c) Impulse function
d) Sine function
engineering-mathematics isro-ee calculus
Answer key ☟
b) x = -1
c) x = 0
d) x = 1/ √ 3
isro-ee engineering-mathematics calculus
Answer key ☟
a)
b)
c)
d)
isro-ee engineering-mathematics
Answer key ☟
(a) x =ce-xy
(b) y= cekx
(c) x =ke cy
(d) y= ce-kx
isro-ee engineering-mathematics calculus
Answer key ☟
a. b. c. d.
isro-ece isro2012-ece engineering-mathematics calculus area
Answer key ☟
13.2 Definite Integral (1)
Evaluate
A. B.
C. D.
isro2016-ece isro-ece calculus definite-integral
Answer key ☟
-th derivative of is
A. B. C. D.
isro2011 calculus differentiation
Answer key ☟
a. b. c. d.
engineering-mathematics isro2012-ece isro-ece calculus differentiation
Answer key ☟
Answer key ☟
b) 1/2
C) 3/2
d) 5/4
isro-ee engineering-mathematics integration
Answer key ☟
Answer key ☟
is given by
A. B. C. D.
calculus limits isro2016
Answer key ☟
The value of is
a. b. c. d.
isro2016-ece isro-ece engineering-mathematics calculus limits
Answer key ☟
A. B. C. D.
isro2009 calculus maxima-minima
Answer key ☟
A. B. C. D.
isro2013 maxima-minima
Answer key ☟
A.
B.
C.
D.
Answer key ☟
Answer Keys
13.0.1 A 13.0.2 Q-Q 13.0.3 Q-Q 13.0.4 Q-Q 13.0.5 Q-Q
13.0.6 Q-Q 13.0.7 Q-Q 13.0.8 Q-Q 13.0.9 Q-Q 13.0.10 Q-Q
13.0.11 Q-Q 13.0.12 Q-Q 13.0.13 Q-Q 13.0.14 Q-Q 13.0.15 Q-Q
13.0.16 Q-Q 13.1.1 Q-Q 13.2.1 Q-Q 13.3.1 D 13.3.2 Q-Q
13.4.1 C 13.5.1 Q-Q 13.5.2 Q-Q 13.6.1 C 13.6.2 Q-Q
13.7.1 B 13.7.2 C 13.8.1 B
14 Engineering Mathematics: Linear Algebra (71)
a) 2
b) 1
c) 0
d) -1
isro-ece engineering-mathematics linear-algebra
Answer key ☟
a) =
b) =A )+B
c) = ( )
d) =
isro-ece isro2011-ece engineering-mathematics linear-algebra
Answer key ☟
a. (2 - i)/5
b. 3 - i
c. 5 - 5i
d. (2 + i)/5
Answer key ☟
a. cos 10 ϴ + i sin 10 ϴ
b. cos 25 ϴ - sin 25 ϴ
c. (cos ϴ + i sin ϴ )
d. (cos ϴ - i sin ϴ )
isro-ece isro2011-ece engineering-mathematics
a. -3/2
b. 3/2
c. 0
d. None of these
isro-ece isro2011-ece engineering-mathematics linear-algebra
Answer key ☟
If every minor of order 'r' of a matrix 'A' is zero, then rank of 'A' is
Answer key ☟
14.0.9 ISRO 2010-ECE Matrices
Answer key ☟
a) 1
b) 2
c) 0
d) 3
isro-ece engineering-mathematics linear-algebra
Answer key ☟
a) 0
b) 1
c) n
d) None of the above
isro-ece engineering-mathematics
14.0.13 ISRO 2009- Engineering Mathematics
a) 1/4
b) 1/2
c) 1
d) None of above
Answer key ☟
a) 1
b) 1/ √ 2
c) -1/ √ 2
d) 0
isro-ece engineering-mathematics
Answer key ☟
Answer key ☟
a) (1/ √ 3 ) (–i+j+k)
b) (1/ √ 3 )(i+j- k)
d) (i+j+k)
isro-ece engineering-mathematics
Answer key ☟
14.0.17 ISRO 2007- ECE Z plane
a) x-axis
b) y axis
c) The straight line z = lal
d) None of the above
isro-ece engineering-mathematics
Answer key ☟
is
a) n π /4
b) n π /2
c) n π
d) 2n π
isro-ece engineering-mathematics
Answer key ☟
Answer key ☟
Answer key ☟
The value of k for which the lines 2x + y -1 = 0,4x + 3y - 3 = 0 and 3x + ky - 2 = 0. are concurrent is
a) -2
b) 3
c) 2
d) -3
isro-ece engineering-mathematics linear-algebra
Answer key ☟
Answer key ☟
The value of t for which A+ tB is perpendicular to C where A = i +2j + 3k, B = -i+2j+k and C = 3i+ j
(a) 5
(b) 4
(c) 12
(d) 0
isro-mech engineering-mathematics
14.0.25 ISRO 2012- [Mech] Engineering mathematics Cross product
A x B is a vector
Answer key ☟
1+ i Is equivalent to
(a) √ 2
(b) √ 2
(c) 2
(d) 2
Answer key ☟
In a class of 45 students, the mean mark of 25 girls is 32 and the mean mark of 20 boys is 27.5. What is
the class mean?
(a) 32
(b) 27.5
(c) 29.75
(d) 30
engineering-mathematics isro-mech linear-algebra
Answer key ☟
The sine of the angle between the two vectors a = 3i + j + k and b = 2i -2j + k is
(a) √ (74/99)
(b) √ (25/99)
(c) √ (37/99)
(d) √ (5/99)
Answer key ☟
(a) y = 3x -5
(b) 3y = x - 15
(c) 3y = x+15
(d) y=3x+5
engineering-mathematics isro-mech linear-algebra
Answer key ☟
Answer key ☟
Circular shapes appear in this fashion when viewed at an angle other than 90 degrees
Answer key ☟
Let A=
(b) A2=I
Answer key ☟
a) 4 /√29
b) 4 /√29
c) 4 /√29
d) 4 /√29
engineering-mathematics isro-mech linear-algebra
Answer key ☟
If A= then | - | is:
a) 0
b) 1
c) 120
d) 121
engineering-mathematics isro-mech linear-algebra
Answer key ☟
(d) 60°
engineering-mathematics isro-mech linear-algebra
Answer key ☟
b) Linearly dependent
c) No relation
d) Exponentially dependent
engineering-mathematics isro-ee
Answer key ☟
a) 2/3
b) 4/3
c) 1/3
d) 5/3
isro-ee engineering-mathematics
Answer key ☟
The unique polynomial P(x) of degree 2 such that: P(1) = 1, P(3) = 27, P(4) = 64 is
a) 8 -19x + 12
b) 8 + 19x + 12
c) -8 -19x + 12
d) -8 -19x - 12
isro-ee engineering-mathematics
Answer key ☟
If the sum of the roots of the quadratic equation a + b + c = 0 is equal to the sum of the squares of their
reciprocals, then a/c, b/a and c/b are in:
(A) arithmetic progression
(C) arithmetic-geometric-progression
Answer key ☟
If = then
Answer key ☟
If a vertex of a triangle is (1, 1) and the mid-points of two sides through this vertex are (-1, 2) and (3, 2),
then the centroid of the triangle is
(A)
(B)
(C)
(D)
engineering-mathematics isro-ee
Answer key ☟
If one root of the equation x 2+ px +12 =0 is 4, while the equation x 2 + px + q = 0 has equal roots, then
the value of 'q' is
(A) 49/4
(B) 4
(C) 49/16
(D) 12
isro-ee engineering-mathematics
Answer key ☟
(B) 8 / 15
(C) 17 / 8
(D) 17 / 15
isro-ee engineering-mathematics
Answer key ☟
(a) e- π /2
(b) x
(c) e π /2
(d) 1
isro-ee engineering-mathematics
Answer key ☟
14.0.45 ISRO-DEC2017-1
Suppose is a finite set with elements.The number of elements and the rank of the largest equivalence
relation on are
A. B. C. D.
isrodec2017
Answer key ☟
If the two matrices and have the same determinant, then the value of is
A. B. C. D.
isro2008 linear-algebra matrix determinant
Answer key ☟
If two adjacent rows of a determinant are interchanged, the value of the determinant
A. becomes zero B. remains unaltered
C. becomes infinitive D. becomes negative of its original value
isro2009 linear-algebra matrix determinant
Answer key ☟
A. B. C. D.
isro2009 linear-algebra matrix determinant
Answer key ☟
A. B. C. D.
isro2009 linear-algebra matrix determinant
Answer key ☟
Answer key ☟
a) ± cos∝
b) ± sin ∝
c) tan ∝ & cot ∝
d) cos ∝ ± sin ∝
Answer key ☟
a) 3,-3
b) -3, -5
c) 3, 5
d) 5 ,0
engineering-mathematics isro-mech linear-algebra eigen-value
Answer key ☟
A.
B.
C.
D.
What is the matrix transformation which takes the independent vectors and and
A. B.
C. D.
isro2013 linear-algebra eigen-value
Answer key ☟
+ sin is
a) Constant function
b) Odd function
c) Even function
d) Periodic function
Answer key ☟
Equation of a straight line passing through the point (-1,2) and making equal intercepts on the axes is
a) x -y =1
b)x-2y=1
c)x+y=1
d) x-y=2
isro-ece engineering-mathematics geometry
Answer key ☟
(a) =
(b) =
(c) =
(d) =
isro-mech engineering-mathematics geometry
14.5 Matrix (11)
Answer key ☟
Tha matrix is
(c) Symmetric
(d) Idempotent
engineering-mathematics isro-mech matrix linear-algebra
Answer key ☟
b) Same
d) None of these
isro-ee matrix
Answer key ☟
Answer key ☟
a) 2
b) 4
c) 8
d) 0
Answer key ☟
Answer key ☟
A. B. C. D.
isro2009 linear-algebra matrix
Answer key ☟
A. a null matrix B. C. D.
isro2009 linear-algebra matrix
Answer key ☟
If and are square matrices with same order and is symmetric, then is
A. Skew symmetric
B. Symmetric
C. Orthogonal
D. Idempotent
isro2011 linear-algebra matrix
Answer key ☟
A. Diagonal matrix B. C. D.
isro2017 linear-algebra matrix
Answer key ☟
A. scalar matrix B. null matrix C. unit matrix D. matrix will all elements
isrodec2017 matrix
Answer key ☟
A. B. C. D.
matrix linear-algebra isro2014 rank-of-matrix
Answer key ☟
Answer key ☟
A. B. C. D.
isrodec2017 vector-space
Answer key ☟
Answer Keys
14.0.1 Q-Q 14.0.2 Q-Q 14.0.3 Q-Q 14.0.4 Q-Q 14.0.5 Q-Q
14.0.6 Q-Q 14.0.7 Q-Q 14.0.8 Q-Q 14.0.9 Q-Q 14.0.10 Q-Q
14.0.11 Q-Q 14.0.12 Q-Q 14.0.13 Q-Q 14.0.14 Q-Q 14.0.15 Q-Q
14.0.16 Q-Q 14.0.17 Q-Q 14.0.18 Q-Q 14.0.19 Q-Q 14.0.20 Q-Q
14.0.21 Q-Q 14.0.22 Q-Q 14.0.23 Q-Q 14.0.24 Q-Q 14.0.25 Q-Q
14.0.26 Q-Q 14.0.27 Q-Q 14.0.28 Q-Q 14.0.29 Q-Q 14.0.30 Q-Q
14.0.31 Q-Q 14.0.32 Q-Q 14.0.33 Q-Q 14.0.34 Q-Q 14.0.35 Q-Q
14.0.36 Q-Q 14.0.37 Q-Q 14.0.38 Q-Q 14.0.39 Q-Q 14.0.40 Q-Q
14.0.41 Q-Q 14.0.42 Q-Q 14.0.43 Q-Q 14.0.44 Q-Q 14.0.45 C
14.1.1 A 14.1.2 D 14.1.3 C 14.1.4 C 14.2.1 Q-Q
14.2.2 Q-Q 14.2.3 Q-Q 14.2.4 Q-Q 14.2.5 D 14.3.1 Q-Q
14.4.1 Q-Q 14.4.2 Q-Q 14.5.1 Q-Q 14.5.2 Q-Q 14.5.3 Q-Q
14.5.4 Q-Q 14.5.5 Q-Q 14.5.6 C 14.5.7 A 14.5.8 C
14.5.9 B 14.5.10 D 14.5.11 B 14.6.1 C 14.7.1 Q-Q
14.8.1 D
15 Engineering Mathematics: Probability (34)
A straight line and a circle of radius a are given. A chord is drawn at random to this circle parallel to the
given line. Expected length of the chord is
a) 2a
b) π a
c) π a/2
d) None of the above
isro-ece engineering-mathematics
Answer key ☟
15.0.2 ISRO-DEC2017-3
A bag contains red balls and black balls.Two balls are removed at a time repeatedly and discarded if
they are of the same colour, but if they are different, black ball is discarded and red ball is returned to the
bag ,The probability that this process will terminate with one red ball is
A. B. C. D.
isrodec2017
Answer key ☟
The arithmetic mean of attendance of students of class is and that of students of class is
Then the percentage of arithmetic mean of attendance of class and is
A. B. C. D.
isro2011 probability arithmetic-mean
Answer key ☟
Let and be any two arbitrary events, then, which one of the following is TRUE?
A. B.
C. D.
gate1994 probability conditional-probability normal isro2017
Answer key ☟
Company shipped computer chips, of which was defective. and company shipped computer
chips, of which were defective. One computer chip is to be chosen uniformly at a random from the
chips shipped by the companies. If the chosen chip is found to be defective, what is the probability that the chip
came from the company
A. B. C. D.
isro2007 probability conditional-probability
Answer key ☟
Let denote the probability of the occurrence of event . If and then the
values of and respectively are
A. B. C. D.
isro2013 probability conditional-probability
Answer key ☟
A person on a trip has a choice between a private car and public transport. The probability of using a
private car is While using public transport, the further choice available are bus and metro. Out of
which the probability of commuting by a bus is In such a situation, the probability (rounded up to two
decimals) of using a car, bus and metro respectively would be
a. and b. and
c. and d. and
isro2016-ece isro-ece probability conditional-probability
Answer key ☟
A man with n keys wants to open a lock. He tries his keys at random.
The expected number of attempts for his success is (keys are replaced after every attempt)
a) n/2
b) n
c) √ n
A. B. C. D.
probability statistics mean-mode-median isro2014
Answer key ☟
If the mean of a normal frequency distribution of items is and its standard deviation is then its
maximum ordinate is
A. B.
C. D.
isro2009 statistics normal-distribution
Answer key ☟
A. B. C. D.
isro2009 probability poisson-distribution
Answer key ☟
A box contains 5 black and 5 red balls. Two balls are one after another from the box, without replacement.
The probability of both balls being red is
a) 1/90
b) 1/5
c) 19/90
d) 2/9
isro-ece engineering-mathematics probability
Answer key ☟
A bag contains eight white and six red marbles. The probability of drawing two marbles of same colour is
a) . /
b) / + /
c) . / .
d) / + /
isro-ece engineering-mathematics probability
Answer key ☟
A husband and wife appear in an interview for two vacancies for same post The. probability of husband
getting selected is 1 /5 while the probability of wife getting selected is 1/7. Then the probability that
anyone of them getting selected is
a) 1 /35
b) 11/35
c) 12/35
d) 34/35
isro-ece probability engineering-mathematics
Answer key ☟
a) 0 & 1
b) 1 & 2
c) 1 & 4
d) None of these
Answer key ☟
The probability that A happens is 1/3. the odds against happening A are:
a) 2:1
b) 3:2
c) 1:2
d) 2:3
engineering-mathematics isro-mech probability
Answer key ☟
Let E and F be any two events with P(E U F)= 0.8, P(E) = 0.4 and P (E/ F) = 0.3. Then P (F) is
(a) 3/7
(b) 4/7
(c) 3/5
(d) 2/5
engineering-mathematics isro-mech probability
Answer key ☟
An urn contains 5 black and 5 white balls. The probability of drawing two balls of the same colour
a) 2/9
b) 4/9
c) 1/9
d) 5/9
isro-ee engineering-mathematics probability
Answer key ☟
If the probability for A to fail an examination is 0.2 and that for B is 0.3, then probability that either A of B
fail is
(a) 0.5
(b) 0.06
(c) 0.44
(d) 0.38
engineering-mathematics isro-mech probability
Answer key ☟
Answer key ☟
Ten percent of screws produced in a certain factory turn out to be defective. Find the probability that in a
sample of 10 screws chosen at random, exactly two will be defective.
a) 0.2
b) 0.25
c) 0.8
d) 0.3 79.
isro-ee probability
Answer key ☟
A purse contains 4 copper coins and 3 silver coins. A second purse contains 6 copper coins and 4 silver
coins. A purse is chosen randomly and a coin is taken out of it. What is the probability that it is a copper
coin?
a) 70/82
b) 35/70
c) 41/82
d) 41/70
engineering-mathematics isro-mech probability
Answer key ☟
A student is to answer 10 out of 13 questions in an examination such that he must choose at least 4 from
the first five questions. The number of choices available to him is
(A) 140
(B) 196
(C) 280
(D) 346
isro-ee engineering-mathematics probability
Answer key ☟
The probability that a teacher will give an unannounced test during any class is 1/5. If a student is absent
twice, then probability that misses at least one test is
(a) 24/25
(b) 16/25
(c) 7/25
(d) 9/25
engineering-mathematics isro-mech probability
Answer key ☟
A and B are two candidates appearing for an interview by a company. The probability that A is selected is
0.5 and the probability that both A and B are selected is at most 0.3. The probability of B getting selected
is
(a) 0.9
(c) <=0.3
(d) 0.5
probability isromech2016 engineering-mathematics
Answer key ☟
There are 20 locks and 20 matching keys. Maximum number of trials required to match all the locks is
(a) 190
(b) 210
(c) 400
(d) 40
engineering-mathematics isro-mech probability
Answer key ☟
A and B are two candidates appearing for an interview by a company. The probability that A is selected is
0.5 and the probability that both A and B are selected is at most 0.3. The probability of B getting selected
is
(a) 0.9
(b) 0.3
(c) 0.6
(d) 0.5
engineering-mathematics isro-mech probability
Answer key ☟
Three coins are tossed simultaneously. The probability that they will fall two heads and one tail is
A. B. C. D.
isro2011 probability
Answer key ☟
The probability that two friends are born in the same month is ____ ?
A. B. C. D.
probability isro2014
Answer key ☟
A class of students occupy a classroom containing rows of seats, with seats in each row. If the
students seat themselves at random, the probability that sixth seat in the fifth row will be empty is:
a. b. c. d.
isro2018 probability
Answer key ☟
15.7.20 Probability: ISRO ECE 2012 | Probability
Person can solve of the ISRO question paper and Person can solve The probability that at
least one of them will solve a problem from the question paper, selected at random is :
a.
b.
c.
d.
isro2012-ece isro-ece engineering-mathematics probability
Answer key ☟
15.8.1 Probability Density Function: GATE CSE 2003 | Question: 60, ISRO2007-45
A program consists of two modules executed sequentially. Let and respectively denote the
probability density functions of time taken to execute the two modules. The probability density function of
the overall time taken to execute the program is given by
A. B.
C. D.
gatecse-2003 probability normal isro2007 probability-density-function
Answer key ☟
Let be the continuous probability density function of a random variable , the probability that
, is :
A. B.
C. D.
gatecse-2005 probability random-variable easy isro2009
Answer key ☟
Answer key ☟
Answer Keys
15.0.1 Q-Q 15.0.2 A 15.1.1 D 15.2.1 D 15.2.2 C
15.2.3 C 15.2.4 A 15.3.1 Q-Q 15.4.1 B 15.5.1 D
15.6.1 B 15.7.1 Q-Q 15.7.2 B 15.7.3 Q-Q 15.7.4 Q-Q
15.7.5 Q-Q 15.7.6 Q-Q 15.7.7 Q-Q 15.7.8 Q-Q 15.7.9 Q-Q
15.7.10 Q-Q 15.7.11 Q-Q 15.7.12 Q-Q 15.7.13 Q-Q 15.7.14 B
15.7.15 Q-Q 15.7.16 Q-Q 15.7.17 D 15.7.18 B 15.7.19 C
15.7.20 Q-Q 15.8.1 C 15.9.1 C 15.10.1 C
16 General Aptitude: Analytical Aptitude (1)
Answer key ☟
Answer Keys
16.1.1 B
17 General Aptitude: Quantitative Aptitude (4)
How many diagonals can be drawn by joining the angular points of an octagon?
A. B. C. D.
isro2013 quantitative-aptitude geometry
Answer key ☟
A. B.
C. D.
quantitative-aptitude isro2016 inequality
Answer key ☟
A. B. C. D.
isro-2020 quantitative-aptitude easy lcm-hcf
Answer key ☟
given
A. B. C. D.
quantitative-aptitude summation isro2016
Answer key ☟
Answer Keys
17.1.1 B 17.2.1 D 17.3.1 B 17.4.1 C
18 Non GATE CSE: Cloud Computing (1)
Answer key ☟
Answer Keys
18.1.1 B
19 Non GATE CSE: Computer Graphics (9)
Answer key ☟
A Steiner patch is
Answer key ☟
Answer key ☟
How much memory is required to implement -buffer algorithm for a bit-plane image?
A. KB B. MB C. MB D. MB
non-gatecse computer-graphics isro2014
Answer key ☟
A frame buffer array is addressed in row major order for a monitor with pixel locations starting from
and ending with What is address of the pixel Assume one bit storage per pixel and
starting pixel location is at
A. B. C. D.
isro2014 non-gatecse computer-graphics
Answer key ☟
Perform window to viewport transformation for the point (20,15). Assume that is ;
is ; is ; is . The value of and
in the viewport is
A.
B.
C.
D.
Answer key ☟
Answer key ☟
In which of the following shading models of polygons, the interpolation of intensity values is done along
the scan line?
A. Gourard shading B. Phong shading
C. Constant shading D. Flat shading
isro2013 shading non-gatecse
Answer key ☟
Which of the following UNIX command allows scheduling a program to be executed at the specifies time?
Answer key ☟
Answer Keys
19.1.1 B 19.1.2 A 19.1.3 D 19.1.4 Q-Q 19.1.5 A
19.1.6 C 19.1.7 Q-Q 19.2.1 A 19.3.1 A
20 Non GATE CSE: Computer Peripherals (6)
Answer key ☟
A system is having bytes of video memory for bit-mapped graphics with -bit colour. What is the
maximum resolution it can support?
A. B.
C. D.
isro2011 computer-peripherals
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
A. B. C. Firewire D. PCI
isro2013 ieee1394
Answer key ☟
Answer Keys
20.1.1 B 20.1.2 B 20.1.3 A 20.1.4 A 20.1.5 A
20.2.1 C
21 Non GATE CSE: Digital Image Processing (4)
Answer key ☟
If the frame buffer has 8 bits per pixel and 8 bits are allocated for each of the components, what
would be the size of the lookup table?
Answer key ☟
Answer key ☟
A. B. Deflate C. D. Huffman
isro2015 digital-image-processing image-compression non-gatecse
Answer key ☟
Answer Keys
21.1.1 D 21.1.2 C 21.1.3 A 21.2.1 B
22 Non GATE CSE: Digital Signal Processing (1)
Answer key ☟
Answer Keys
22.1.1 B
23 Non GATE CSE: Distributed Computing (1)
A computing architecture, which allows the user to use computers from multiple administrative domains to
reach a common goal is called as
A. Grid Computing B. Neutral Networks
C. Parallel Processing D. Cluster Computing
isro2014 non-gatecse distributed-computing
Answer key ☟
Answer Keys
23.1.1 A
24 Non GATE CSE: Geometry (4)
Let be the radius of the circle. What is the angle subtended by an arc of length at the center of the
circle?
A. degree B. radian
C. degrees D. radians
isro2014 circle geometry
Answer key ☟
What is the matrix that represents rotation of an object by about the origin in
A.
B.
C.
D.
isro2011 geometry
Answer key ☟
The conic section that is obtained when a right circular cone is cut through a plane that is parallel to the
side of the cone is called _____
Answer key ☟
A cube of side unit is placed in such a way that the origin coincides with one of its top vertices and the
three axes along three of its edges. What are the co-ordinates of the vertex which is diagonally opposite to
the vertex whose co-ordinates are
A. B. C. D.
isro2014 geometry non-gatecse
Answer key ☟
Answer Keys
24.1.1 B 24.2.1 A 24.2.2 A 24.2.3 B
25 Non GATE CSE: Integrated Circuits (4)
Answer key ☟
Answer key ☟
Answer key ☟
If the maximum output voltage of a DAC is volts and if the resolution is bits then the weight of the
most significant bit is ________
A.
B.
C.
D.
Answer key ☟
Answer Keys
25.1.1 B 25.1.2 D 25.1.3 A 25.1.4 B
26 Non GATE CSE: IS&Software Engineering (50)
Answer key ☟
The cyclomatic complexity of each of the modules and shown below is What is the cyclomatic
complexity of the sequential integration shown on the right hand side?
A. B. C. D.
gatecse-2010 is&software-engineering cyclomatic-complexity easy isro2017
Answer key ☟
The Cyclomatic Complexity metric V(G) of the following control flow graph
A. 3 B. 4 C. 5 D. 6
isro2011 is&software-engineering cyclomatic-complexity
Answer key ☟
26.2.3 Cyclomatic Complexity: ISRO CSE 2014 | Question: 4
A. 2 B. 3 C. 4 D. 5
isro2014 is&software-engineering cyclomatic-complexity non-gatecse
Answer key ☟
A. B. C. D.
isro-2020 is&software-engineering cyclomatic-complexity normal
Answer key ☟
McCabe's cyclomatic complexity number of a program control graph 'G' with e edges, nodes and
disconnected paths is defined as
A. B.
C. D.
Answer key ☟
What is the cyclomatic complexity of a module which has seventeen edges and thirteen nodes?
A. B. C. D.
isro2013 is&software-engineering cyclomatic-complexity non-gatecse
Answer key ☟
26.3 Is&software Engineering (23)
isro-ece is&software-engineering
Answer key ☟
Estimation at software development effort for organic software in basic COCOMO is:
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
26.3.6 Is&software Engineering: ISRO CSE 2011 | Question: 17
Answer key ☟
Answer key ☟
Which of the following is not a maturity level as per Capability Maturity Model?
Answer key ☟
For a software project, the spiral model was employed. When will the spiral stop?
Answer key ☟
The extent to which the s/w can continue to operate correctly despite the introduction of invalid inputs is
called as
Answer key ☟
Answer key ☟
26.3.12 Is&software Engineering: ISRO CSE 2016 | Question: 63
Answer key ☟
A company needs to develop a digital signal processing software for one of its newest inventions. The
software is expected to have 20000 lines of code. The company needs to determine the effort in person-
months needed to develop this software using the basic COCOMO model. The multiplicative factor for this model
is given as 2.2 for the software development on embedded systems, while the exponentiation factor is given as 1.5.
What is the estimated effort in person-months?
Answer key ☟
Answer key ☟
In software maintenance tackling the changes in the hardware or software environment where the software
works, is
A. Corrective maintenance B. Perfective maintenance
C. Adaptive maintenance D. Preventive maintenance
isro2017 is&software-engineering non-gatecse
Answer key ☟
Which product metric gives the measure of the average length of words and sentence in documents?
A. SCI number B. Cyclomatic complexity
C. LOC D. Fog index
isro2017 is&software-engineering non-gatecse
Answer key ☟
In a particular program, it is found that % of the code account for % of the execution time. To code a
program in C++, it takes man-days. Coding in assembly language is times harder than coding in
C++, but runs times faster. Converting an existing C++ program into an assembly language program is times
faster.
To completely write the program in C++ and rewrite the % code in assembly language, if a project team needs 13
days, the team consist of
a. programmers b. programmers
c. programmers d. programmers
isro2018 is&software-engineering
Answer key ☟
Answer key ☟
a. Content presented to search engine spider is different from that presented to user's browser
b. Content present to search engine spider and browser is same
c. Contents of user's requested website are changed
d. None of the above
isro2018 is&software-engineering
Answer key ☟
Answer key ☟
What is the availability of the software with the following reliability figures
Mean Time Between Failures (MTBF) is days
Mean Time To Repair (MTTR) is hours
A. B. C. D.
isro-2020 is&software-engineering normal
Answer key ☟
A. defect per million lines of code B. defects per million lines of code
C. defects per million lines of code D. defects per million lines of code
isro-2020 is&software-engineering normal
Answer key ☟
In a class definition with methods, to make the class maximally cohesive, number of direct and indirect
connections required among the methods are
A. B. C. D.
isro-2020 is&software-engineering normal
Answer key ☟
26.4.1 Out of Gatecse Syllabus: GATE CSE 2014 Set 3 | Question: 19, ISRO2017-78
In the context of modular software design, which one of the following combinations is desirable?
A. High cohesion and high coupling B. High cohesion and low coupling
C. Low cohesion and high coupling D. Low cohesion and low coupling
gatecse-2014-set3 is&software-engineering easy isro2017 out-of-gatecse-syllabus
Answer key ☟
A company needs to develop a strategy for software product development for which it has a choice of two programming languages L1 and L2. The number lines of code
(LOC) developed using L2 is estimated to be twice of the LOC developed with L1. The product will have to be maintained for five years. Various parameters for the
Language Language
Parameter
L1 L2
Man years needed for
LOC/10000 LOC/10000
development
Development Cost
र 10, 00, 000 र 7, 50, 000
per man year
Maintenance Time 5 years 5 years
Cost of maintenance
र 1,00,000 र 50, 000
per year
Total cost of the project includes cost of development and maintenance. What is the LOC for L1 for which of the cost of the project using L1 is equal to the cost of the project using L2?
Answer key ☟
Answer key ☟
26.7 Software Metrics (1)
Answer key ☟
If in a software project the number of user input, user output, enquiries, files and external interfaces are
(15, 50, 24, 12, 8), respectively, with complexity average weighing factor. The productivity if effort = 70
percent-month is
Answer key ☟
Answer key ☟
To execute all loops at their boundaries and within their operational bounds is an example of
A. Black Box Testing B. Alpha Testing
C. Recovery Testing D. White Box Testing
isro2007 is&software-engineering software-testing
Answer key ☟
Activities which ensure that the software that has been built, is traceable to customer requirement is
covered as part of
Answer key ☟
A testing method which is normally used as the acceptance test for a software system, is
A. Regression Testing B. Integration Testing
C. Unit Testing D. System Testing
isro2009 is&software-engineering software-testing
Answer key ☟
Answer key ☟
The test suite (set of test input) used to perform unit testing on a module could cover 70% of the code.
What is the reliability of the module if the probability of success is 0.95 during testing?
A. 0.665 to 0.95 B. At the most 0.665
C. At the most 0.95 D. At least 0.665
Answer key ☟
In unit testing of a module, it is found that for a set of test data, at the maximum % of the code alone
were tested with the probability of success . The reliability of module is
a. Greater than b. Equal to
c. At most d. At least
isro2018 is&software-engineering software-testing
Answer key ☟
Answer key ☟
Answer key ☟
If a program calls two subprograms and and can fail % of the time and can fail % of
the time, what is the failure rate of program ?
A. % B. % C. % D. %
isro2013 is&software-engineering software-testing non-gatecse ugcnetcse-dec2012-paper3
Answer key ☟
Answer key ☟
In the Spiral model of software development, the primary determinant in selecting activities in each
iteration is
A. Iteration size
B. Cost
C. Adopted process such as Rational Unified Process or Extreme Programming
D. Risk
Answer key ☟
Answer key ☟
Answer key ☟
The above figure represents which one of the following UML diagram for a single send session of an online chat
system?
A. Package diagram B. Activity diagram
C. Class diagram D. Sequence diagram
isro2011 is&software-engineering uml
Answer key ☟
Answer Keys
26.1.1 A 26.2.1 A 26.2.2 B 26.2.3 C 26.2.4 C
26.2.5 Q-Q 26.2.6 C 26.3.1 Q-Q 26.3.2 C 26.3.3 A
26.3.4 D 26.3.5 B 26.3.6 A 26.3.7 B 26.3.8 B
26.3.9 A 26.3.10 B 26.3.11 D 26.3.12 B 26.3.13 A
26.3.14 D 26.3.15 C 26.3.16 D 26.3.17 C 26.3.18 B
26.3.19 A 26.3.20 D 26.3.21 B 26.3.22 D 26.3.23 B
26.4.1 B 26.5.1 B 26.6.1 D 26.7.1 C 26.8.1 B
26.9.1 D 26.10.1 D 26.10.2 B 26.10.3 D 26.10.4 C
26.10.5 B 26.10.6 C 26.10.7 Q-Q 26.10.8 D 26.10.9 C
26.10.10 C 26.11.1 D 26.12.1 C 26.12.2 C 26.12.3 B
27 Non GATE CSE: Java (6)
In Java, after executing the following code what are the values of x, y and z?
int x,y=10; z=12;
x=y++ + z++;
A. x=22, y=10, z=12 B. x=24, y=10, z=12
C. x=24, y=11, z=13 D. x=22, y=11, z=13
isro2011 non-gatecse java
Answer key ☟
A. -7 B. -8 C. -7.4 D. -7.0
isro2011 non-gatecse java
Answer key ☟
Answer key ☟
Which of these is a super class of all errors and exceptions in the Java language?
A. Runtime Exceptions B. Throwable
C. Catchable D. None of the above
isro2017 java
Answer key ☟
27.1.5 Java: ISRO-2013-64
Class Test
{
public static void main (String [] args)
{
int x = 0;
int y = 0
for (int z = 0; z < 5; z++)
{
if((++x >2)||(++y > 2))
{
x++;
}
}
System.out.printIn (x+ "" + y);
}
}
A. 8 2 B. 8 5 C. 8 3 D. 5 3
isro2013 java non-gatecse
Answer key ☟
The built-in base class in java, which is used to handle all exceptions is
Answer key ☟
Answer Keys
27.1.1 D 27.1.2 B 27.1.3 D 27.1.4 B 27.1.5 A
27.1.6 D
28 Non GATE CSE: Multimedia (2)
Consider an uncompressed stereo audio signal of CD quality which is sampled at 44.1 kHz and quantized
using 16 bits. What is required storage space if a compression ratio of 0.5 is achieved for 10 seconds of
this audio?
Answer key ☟
Answer key ☟
Answer Keys
28.1.1 C 28.1.2 D
29 Non GATE CSE: Numerical Methods (9)
A. B. C. D.
isro2009
Answer key ☟
The Guass-Seidal iterative method can be used to solve which of the following sets?
Answer key ☟
Given
X: 0 10 16
Y: 6 16 28
The interpolated value X=4 using piecewise linear interpolation is
A. 11 B. 4 C. 22 D. 10
isro2011 interpolation non-gatecse
Answer key ☟
Answer key ☟
A. 3 B. 4 C. 6 D. 9
gatecse-2006 numerical-methods normal isro2009
Answer key ☟
A root of equation can be computed to any degree of accuracy if a 'good' initial approximation
is chosen for which
A. B.
C. D.
isro2009 numerical-methods
Answer key ☟
The formula
is called
A. Simpson rule B. Trapezoidal rule
C. Romberg's rule D. Gregory's formula
isro2009 numerical-methods non-gatecse
Answer key ☟
The formula is
Answer key ☟
isro2009 polynomials
Answer key ☟
Answer Keys
29.0.1 A 29.1.1 A 29.2.1 D 29.3.1 C 29.4.1 A
29.4.2 Q-Q 29.4.3 B 29.4.4 A 29.5.1 D
30 Non GATE CSE: Object Oriented Programming (10)
What is the right way to declare a copy constructor of a class if the name of the class is MyClass?
A. MyClass (constant MyClass * arg) B. MyClass (constant MyClass & arg)
C. MyClass (MyClass arg) D. MyClass (MyClass * arg)
isro2013 copy-constructor non-gatecse
Answer key ☟
A. 4 16 B. 4 10 16 C. 0 6 12 18 D. 1 4 7 10 13 16 19
isro2008 java
Answer key ☟
The feature in object-oriented programming that allows the same operation to be carried out differently,
depending on the object, is
A. Inheritance B. Polymorphism
C. Overfunctioning D. Overriding
isro2009 object-oriented-programming non-gatecse
Answer key ☟
If a class is derived from class , which is derived form class , all through public inheritance, then a
class member function can access
A. only protected and public data of and B. Only protected and public data of
C. all data of and private data of and D. public and protected data of and and all data of
non-gatecse object-oriented-programming isro2016
Answer key ☟
#include <iostream>
using namespace std;
void square(int *x){
*x = (*x)++ * (*x);
}
int main()
{
int number = 30;
square(&number, &number);
cout<<number;
return 0;
}
Answer key ☟
Which of the following UML 2.0 diagrams capture behavioral aspects of a system?
A. Use case diagram, Object diagram, Activity diagram and state machine diagram
B. Use case diagram, Activity diagram and state machine diagram
C. Object diagram, Communication Diagram, Timing diagram and Interaction diagram
D. Object diagram, Composite structure diagram, package diagram and Deployment diagram
Answer key ☟
Answer key ☟
Assuming the required header first are already included, the above program
a. results in compilation error b. print
c. print d. print
isro2018 object-oriented-programming non-gatecse
Answer key ☟
Answer key ☟
Answer key ☟
Answer Keys
30.1.1 B 30.2.1 B 30.3.1 B 30.3.2 D 30.3.3 C
30.3.4 B 30.3.5 D 30.3.6 A 30.4.1 D 30.5.1 C
31 Non GATE CSE: Others (3)
31.0.1 ISRO-DEC2017-77
Black box
A. Condition Coverage p.
testing
Equivalence Class
B. q. System testing
partitioning
White box
C. Volume Testing r.
testing
Performance
D. Beta Testing s.
testing
Matching in the same order gives,
Answer key ☟
31.0.2 ISRO-DEC2017-79
isrodec2017
Answer key ☟
The voltage ranges for a logic high and a logic low in RS- C standard is
A. Low is to , High is to
B. Low is to , High is to
C. Low is to , High is to
D. Low is to , High is to
isro2013 rs232
Answer key ☟
Answer Keys
31.0.1 A 31.0.2 C 31.1.1 C
32 Non GATE CSE: Web Technologies (10)
Answer key ☟
Answer key ☟
Choose the most appropriate HTML tag in the following to create a numbered list
Answer key ☟
To add a background color for all <h1> elements, which of the following HTML syntax is used
A. h1 { background-color :#FFFFFF} B. { background-color :#FFFFFF} . h1
C. h1 { background-color :#FFFFFF} . h1(all) D. h1. all{bgcolor= #FFFFFF}
isro2015 html non-gatecse
Answer key ☟
Answer key ☟
An email contains a texual birthday greeting, a picture of a cake and a song. The order is not important.
What is the content-type?
A. Multipart/mixed B. Multipart/parallel
C. Multipart/digest D. Multipart/alternative
isro2007 web-technologies
Answer key ☟
A web client sends a request to a web server. The web server transmits a program to that client ans is
executed at client. It creates a web document. What are such web documents called?
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
Answer Keys
32.1.1 C 32.1.2 D 32.1.3 D 32.1.4 A 32.2.1 X
32.3.1 B 32.3.2 A 32.3.3 Q-Q 32.4.1 B 32.4.2 C
33 Operating System (146)
Thrashing
Answer key ☟
Answer key ☟
isro2009 operating-system
Answer key ☟
What is the name of the technique in which the operating system of a computer executes several programs
concurrently by switching back and forth between them?
Answer key ☟
What is the name of the operating system that reads and reacts in terms of operating system?
Checkpointing a job
Answer key ☟
A page fault
Answer key ☟
Suppose we have variable logical records of lengths of 55 bytes, 1010 bytes and 2525 bytes while the physical
block size in disk is 1515 bytes. What is the maximum and minimum fragmentation seen in bytes?
1. 2525 and 55
2. 1515 and 55
3. 1515 and 00
4. 1010 and 5
isro2013 operating-system
_______________ is a primitive that can execute code. It contains an instruction pointer (=program
counter) and sometimes has its own stack.
a)
b)
c)
d)
isro-ece isro2011-ece operating-system
Answer key ☟
33.0.10 ISRO 2011-ECE Operating System
A run-time stack cannot be used in a round-robin scheduling system because of the _______ nature of
scheduling.
Answer key ☟
In a real time system, the simplest scheme that allows the operating system to allocate memory to two
processes simultaneously is _____
a. Over lays
b. Pipeline
c. Swapping
Answer key ☟
OS that permits multiples programs to run simultaneously using single processor is referred as
(a) Multitasking
(b) Multi user
(c) Multithreading
(d) Multiprocessing
isro-ee operating-system
Answer key ☟
Answer key ☟
33.0.14 ISRO-DEC2017-58
A virtual memory system uses page replacement policy and allocates a fixed number of frames to
the process. Consider the following statements
Answer key ☟
33.0.15 ISRO-DEC2017-63
isrodec2017
Answer key ☟
33.0.16 ISRO-DEC2017-61
Guaranteed
A. Gang scheduling s.
scheduling
Rate monotonic
B. t. Thread scheduling
scheduling
Real-
C. Fair share scheduling u.
time scheduling
Matching the table in the order gives
Answer key ☟
33.0.17 ISRO-DEC2017-62
A system uses policy for page replacement.It has page frames with no pages loaded,
to begin with.The system first accesses distinct pages in some order and then accesses
the same pages in reverse order.How many page faults will occur?
A. B. C. D.
isrodec2017
Answer key ☟
33.0.18 ISRO-DEC2017-60
A. B. C. D.
isrodec2017
33.0.19 ISRO-DEC2017-69
Consider a disk sequence with cylinders. The request to access the cylinder occur in the following
sequence :
Assuming that the head is currently at cylinder , what is the time taken to satisfy all requests if it
takes to move from one cylinder to adjacent one and shortest seek time first policy is used?
A. B. C. D.
isrodec2017
Answer key ☟
33.0.20 ISRO-DEC2017-64
Which of the following is not true with respect to deadlock prevention and deadlock avoidance schemes?
A. In deadlock prevention, the request for resources is always granted if resulting state is safe.
B. In deadlock avoidance, the request for resources is always granted. if the resulting state is safe.
C. Deadlock avoidance requires knowledge of resource requirements a priori.
D. Deadlock prevention is more restrictive than deadlock avoidance.
isrodec2017
Answer key ☟
Determine the number of page faults when references to pages occur in the order - .
Assume that the main memory can accommodate pages and the main memory already has the pages
and , with page having brought earlier than page . (assume LRU i.e. Least-Recently-Used algorithm is applied)
Answer key ☟
Answer key ☟
Answer key ☟
A particular parallel program computation requires seconds when executed on a single CPU. If % of
this computation is strictly sequential, then theoretically the best possible elapsed times for this program
running on CPUs and CPUs respectively are
Answer key ☟
Which of the following need not necessarily be saved on a context switch between processes?
Answer key ☟
A critical region
Answer key ☟
When a process is rolled back as a result of deadlock the difficulty which arises is
A. Starvation B. System throughput
C. Low device utilization D. Cycle stealing
isro2009 deadlock-prevention-avoidance-detection
Answer key ☟
Consider a system having resources of the same type. These resources are shared by processes
which have peak time demands of respectively. The minimum value of that ensures that
deadlock will never occur is:
a. b. c. d.
isro2018 deadlock-prevention-avoidance-detection operating-system
Answer key ☟
Answer key ☟
Answer key ☟
Using a larger block size in a fixed block size file system leads to
Answer key ☟
Consider a disk pack with surfaces, tracks per surface and sectors per track. bytes of data
are stored in a bit serial manner in a sector. The capacity of the disk pack and the number of bits required
to specify a particular sector in the disk are respectively:
A. Mbyte, bits B. Mbyte, bits
C. Mbyte, bits D. Gbyte, bits
gatecse-2007 operating-system disk normal isro2016
Answer key ☟
Number of tracks
Number of sectors/track
Number of bytes /sector
Time taken by the head to move from one track to adjacent track
Rotation speed .
What is the average time taken for transferring bytes from the disk ?
A. B. C. D.
gateit-2007 operating-system disk normal isro2015
Answer key ☟
Disk requests are received by a disk drive for cylinder 5, 25, 18, 3, 39, 8 and 35 in that order. A seek takes
5 msec per cylinder moved. How much seek time is needed to serve these requests for a Shortest Seek First
(SSF) algorithm? Assume that the arm is at cylinder 20 when the last of these requests is made with none of the
requests yet served
Answer key ☟
Which of the following RAID level provides the highest Data Transfer Rate (Read/Write)
Answer key ☟
The total time to prepare a disk drive mechanism for a block of data to be read from it is
A. seek time B. latency
C. latency plus seek time D. transmission time
isro2008 operating-system disk
Answer key ☟
Consider a disk pack with 16 surfaces, 128 tracks per surface and 256 sectors per track. 512 bytes of data
are stores in a bit serial manner in a sector. The capacity of the disk pack and the number of bits required
to specify a particular sector in the disk are respectively
A. 256 Mbyte, 19 bits B. 256 Mbute, 28 bits
C. 512 Mbyte, 20 bits D. 64 Gbyte, 28 bits
isro2009 operating-system disk
Answer key ☟
33.6.9 Disk: ISRO CSE 2011 | Question: 38
A fast wide SCSI-II disk drive spins at 7200 RPM, has a sector size of 512 bytes, and holds 160 sectors
per track. Estimate the sustained transfer rate of this drive
Answer key ☟
Disk requests come to a disk driver for cylinders in the order , , , , , and at a time when the
disk drive is reading from cylinder . The seek time is ms/cylinder. The total seek time, if the disk arm
scheduling algorithms is first-come-first-served is
Answer key ☟
A particular disk unit uses a bit string to record the occupancy or vacancy of its tracks, with denoting
vacant and for occupied. A - segment of this string has hexadecimal value D4FE2003. The
percentage of occupied tracks for the corresponding part of the disk, to the nearest percentage is:
a. b. c. d.
isro2018 disk operating-system
Answer key ☟
There are 200 tracks on a disc platter and the pending requests have come in the order - 36, 69, 167, 76,
42, 51, 126, 12 and 199. Assume the arm is located at the 100 th track and moving towards track 200. If
sequence of disc access is 126, 167, 199, 12, 36, 42, 51, 69 and 76 then which disc access scheduling policy is
used?
A. Elevator B. Shortest seek-time first
C. C-SCAN D. First Come First Served
disk-scheduling isro2014 operating-system
Answer key ☟
Consider the disk system with 100 cylinders. The request to access the cylinders occur in the following
sequence.
4, 37, 10,7,19,73,2,15,6,20
Assuming the head is currently at cylinder 50 what is the time taken to satisfy all requests if it takes 1 ms to move
from one cylinder to adjacent one and shortest seek time first algorithm is used.
Answer key ☟
33.8 File System (1)
Consider a system where each file is associated with a 16 bit number. For each file, each user should have
the read and write capability. How much memory is needed to store each user's access data?
A. 16 KB B. 32 KB C. 64 KB D. 128 KB
isro2014 operating-system file-system
Answer key ☟
Fork is
A. the creation of a new job B. the dispatching of a task
C. increasing the priority of a task D. the creation of a new process
isro2008 operating-system fork-system-call
Answer key ☟
A. 10 and 11 B. 10 C. 11 D. 11 and 11
isro2017 operating-system fork-system-call
Answer key ☟
If we execute this core segment, how many times the string yes will be printed?
Answer key ☟
A. 8 B. 6 C. 7 D. 5
isro2015 operating-system fork-system-call
Answer key ☟
A computer has of main memory. The jobs arrive and finish in the following sequence.
Job requiring arrives
Job requiring arrives
Job requiring arrives
Job finishes
Job requiring arrives
Job requiring arrives
Job requiring arrives
Among best fit and first fit, which performs better for this sequence?
a. First fit b. Best fit
c. Both perform the same d. None of the above
isro2018 memory-management fragmentation operating-system
Answer key ☟
Answer key ☟
Answer key ☟
33.12.2 IO Handling: GATE IT 2004 | Question: 11, ISRO2011-33
What is the bit rate of a video terminal unit with characters/line, and horizontal sweep
time of µ (including µ of retrace time)?
A. B. C. D.
gateit-2004 operating-system io-handling easy isro2011
Answer key ☟
Suppose we have variable logical records of lengths of bytes, bytes and bytes while the physical
block size in disk is bytes. What is the maximum and minimum fragmentation seen in bytes?
Answer key ☟
a. If a high priority thread becomes ready to run, low priority thread is preempted
b. The kernel checks for the high priority ready to run threads when ever called
c. The executing thread is never interrupted
d. There are special demands on communication between threads and handling common resources
Answer key ☟
In multi-programmed systems, it is advantageous if some programs such as editors anf compilers can be
shared by several users.
Which of the following must be true of multi-programmed systems in order that a single copy of a program can be
shared by several users?
Answer key ☟
The Operating System of a computer may periodically collect all the free memory space to form
contiguous block of free space. This is called:
Answer key ☟
Answer key ☟
Which of the following heap memory allocation strategies is likely to exploit spatial locality of memory
accesses in a program, the most?
Answer key ☟
Any attempt by a process to access memory allocated to OS or process of other user results into
A. Trap to OS B. Context Switching
C. Page fault D. Invocation to Scheduler Despatch
Answer key ☟
In a - bit machine, with GB RAM, and KB page size, how many entries will be there in the page table
if its is inverted?
A. B. C. D.
isro2013 operating-system memory-management paging
Answer key ☟
Consider a logical address space of pages of words each, mapped onto a physical memory of
frames. How many bits are there in the physical address and logical address respectively?
A. B. C. D.
isro2013 operating-system memory-management
Answer key ☟
Consider a 32-bit machine where four-level paging scheme is used. If the hit ratio to TLB is 98%, and it
takes 20 nanosecond to search the TLB and 100 nanoseconds to access the main memory what is effective
memory access time in nanoseconds?
Answer key ☟
Answer key ☟
Answer key ☟
33.18.1 Page Replacement: GATE CSE 1997 | Question: 3.10, ISRO2008-57, ISRO2015-64
Answer key ☟
The minimum number of page frames that must be allocated to a running process in a virtual memory
environment is determined by
A. the instruction set architecture B. page size
C. number of processes in memory D. physical memory size
gatecse-2004 operating-system virtual-memory page-replacement normal isro2007
Answer key ☟
33.18.3 Page Replacement: GATE CSE 2005 | Question: 22, ISRO2015-36
Answer key ☟
In which one of the following page replacement policies, Belady's anomaly may occur?
Answer key ☟
Answer key ☟
The page replacement algorithm which gives the lowest page fault rate is
A. LRU B. FIFO
C. Optimal page replacement D. Second chance algorithm
isro2008 operating-system page-replacement
Answer key ☟
A. Page fault rate is constant even on increasing the number of allocated frames
B. Page fault rate may increase on increasing the number of allocated frames
C. Page fault rate may increase on decreasing the number of allocated frames
D. Page fault rate may decrease on increasing the number of allocated frames
Answer key ☟
Determine the number of page faults when references to pages occur in the following order:
1, 2, 4, 5, 2, 1, 2, 4
Assume that the main memory can accommodate 3 pages and the main memory already has the pages 1 and 2,
with page one having brought earlier than page 2. (LRU page replacement algorithm is used)
A. 3 B. 5 C. 4 D. None of these
page-replacement page-fault isro2016 operating-system
Answer key ☟
Answer key ☟
Determine the number of page faults when references to pages occur in the order
Assume that the main memory can accommodate pages and the main memory already has the pages
and with page brought earlier than page (assume LRU i.e., Least-Recently-Used algorithm is applied)
Answer key ☟
What are the minimum number of frames required to get a single page fault for the above sequence assuming LRU
replacement strategy?
A. B. C. D.
isro-2020 operating-system memory-management page-replacement page-fault normal
Answer key ☟
Answer key ☟
The difference between a named pipe and a regular file in Unix is that
Answer key ☟
Answer key ☟
Which of the following need not necessarily be saved on a Context Switch between processes?
A. General purpose registers B. Translation look-aside buffer
C. Program counter D. Stack pointer
isro2008 operating-system process
Answer key ☟
Answer key ☟
Process is
A. A program in high level language kept on disk B. Contents of main memory
C. A program in execution D. A job in secondary memory
isro2009 operating-system process
Answer key ☟
Answer key ☟
33.20.6 Process: ISRO CSE 2011 | Question: 55
There are three processes in the ready queue. When the currently running process requests for I/O how
many process switches take place?
A. 1 B. 2 C. 3 D. 4
isro2011 operating-system process
Answer key ☟
Answer key ☟
Four jobs to be executed on a single processor system arrive at time in the order . Their burst
CPU time requirements are time units respectively. The completion time of under round robin
scheduling with time slice of one time unit is
A. B. C. D.
gate1996 operating-system process-scheduling normal isro2008
Answer key ☟
Consider three CPU-intensive processes, which require , and time units and arrive at times , and
, respectively. How many context switches are needed if the operating system implements a shortest
remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end.
A. B. C. D.
gatecse-2006 operating-system process-scheduling normal isro2009
Answer key ☟
33.21.3 Process Scheduling: ISRO CSE 2007 | Question: 11, GATE CSE 2001 | Question: 1.19
Consider a set of n tasks with known runtimes to be run on a uniprocessor machine. Which of
the following processor scheduling algorithms will result in the maximum throughput?
A. Round Robin B. Shortest job first
C. Highest response ratio next D. first come first served
isro2007 operating-system process-scheduling gatecse-2001
Answer key ☟
Consider a job scheduling problem with 4 jobs and with corresponding deadlines:
. Which of the following is not a feasible schedule without violating any job
schedule?
A. B.
C. D.
isro2007 operating-system process-scheduling
Answer key ☟
Answer key ☟
On a system using non-preemptive scheduling, processes with expected run times of 5, 18, 9 and 12 are in
the ready queue. In what order should they be run to minimize wait time?
Answer key ☟
33.21.7 Process Scheduling: ISRO CSE 2007 | Question: 64, ISRO CSE 2008 | Question: 50
Feedback queues
Answer key ☟
A. using very large time slices (quantas) degenerates into First-Come First served (FCFS) algorithm.
B. using extremely small time slices improves performance
C. using very small time slices degenerates into Last-In First-Out (LIFO) algorithm.
D. using medium sized times slices leads to shortest Request time First (SRTF) algorithm
Answer key ☟
33.21.9 Process Scheduling: ISRO CSE 2008 | Question: 66, ISRO CSE 2009 | Question: 15
Answer key ☟
33.21.10 Process Scheduling: ISRO CSE 2009 | Question: 10
Answer key ☟
Consider a set of 5 processes whose arrival time, CPU time needed and the priority are given below:
Process Arrival Time CPU Time
Priority
Priority (in ms) Needed
P1 0 10 5
P2 0 5 2
P3 2 3 1
P4 5 20 4
P5 10 2 3
(smaller the number, higher the priority)
If the CPU scheduling policy is priority scheduling without pre-emption, the average waiting time will be
Answer key ☟
The following table shows the processes in the ready queue and time required for each process for
completing its job.
Process Time
10
5
20
8
15
If round-robin scheduling with 5 ms is used what is the average waiting time of the processes in the queue?
Answer key ☟
33.21.13 Process Scheduling: ISRO CSE 2014 | Question: 78
Which of the following is not an optimization criterion in the design of a CPU scheduling algorithm?
A. Minimum CPU utilization B. Maximum throughput
C. Minimum turnaround time D. Minimum waiting time
isro2014 operating-system process-scheduling
Answer key ☟
For the real time operating system, which of the following is the most suitable scheduling scheme?
A. Round robin B. First come first serve
C. Pre-emptive D. Random scheduling
isro2016 operating-system process-scheduling
Answer key ☟
Answer key ☟
Three CPU-bound tasks, with execution times of and time units respectively arrive at times and
, respectively. If the operating system implements a shortest remaining time first scheduling algorithm,
what should be the value of to have context switches? Ignore the context switches at time and at the end.
A. B. C. D.
isro-2020 operating-system process-scheduling normal
Answer key ☟
Answer key ☟
33.21.18 Process Scheduling: ISRO-2013-50
Consider the following set of processes, with arrival times and the required CPU-burst times given in
milliseconds.
What is the sequence in which the processes are completed? Assume round robin scheduling with a time quantum
of milliseconds?
A. B. C. D.
isro2013 process-scheduling round-robin-scheduling
Answer key ☟
A starvation free job scheduling policy guarantees that no job indefinitely waits for a service. Which of the
following job scheduling policies is starvation free?
A. Priority queing B. Shortest job first
C. Youngest job first D. Round robin
isro2013 operating-system process-scheduling
Answer key ☟
Which of the following strategy is employed for overcoming the priority inversion problem?
Answer key ☟
Suppose a system contains processes and system uses the round-robin algorithm for CPU scheduling
then which data structure is best suited ready queue of the process
Answer key ☟
Suppose two jobs, each of which needs minutes of CPU time, start simultaneously. Assume I/O
wait time. How long will it take for both to complete, if they run sequentially?
A. 10 B. 20 C. 30 D. 40
process-scheduling isro2015
Answer key ☟
Answer key ☟
Below is the precedence graph for a set of tasks to be executed on a parallel processing system .
What is the efficiency of this precedence graph on if each of the tasks takes the same time and the
system has five processors?
A. B. C. D.
isro2011 operating-system process-synchronization
Answer key ☟
In a system using single processor, a new process arrives at the rate of six processes per minute and each
such process requires seven seconds of service time. What is the CPU utilization?
Answer key ☟
Answer key ☟
The operating system and the other processes are protected from being modified by an already running
process because
Answer key ☟
Answer key ☟
In a producer-consumer scenario also known as Bounded-Buffer Problem, what would be the most
appropriate synchronization primitive to ensure that the consumer waits when the buffer is empty?
Answer key ☟
A. Hard real time OS has less jitter than soft real time OS
B. Hard real time OS has more jitter than soft real time OS
C. Hard real time OS has equal jitter as soft real time OS
D. None of the above
Answer key ☟
Consider a system having ‘m’ resources of the same type. The resources are shared by 3 processes A, B, C,
which have peak time demands of 3, 4, 6 respectively. The minimum value of ‘m’ that ensures that
deadlock will never occur is
A. 11 B. 12 C. 13 D. 14
isro2007 operating-system resource-allocation
Answer key ☟
In which of the following four necessary conditions for deadlock processes claim exclusive control of the
resources they require?
A. no preemption B. mutual exclusion
C. circular wait D. hold and wait
isro2008 operating-system resource-allocation deadlock-prevention-avoidance-detection
Answer key ☟
Consider a system having "n" resources of same type. These resources are shared by 3 processes, A, B, C.
These have peak demands of 3, 4, and 6 respectively. For what value of "n" deadlock won't occur
A. 15 B. 9 C. 10 D. 13
isro2009 operating-system resource-allocation deadlock-prevention-avoidance-detection
Answer key ☟
A total of 9 units of a resource type available, and given the safe state shown below, which of the
following sequence will be a safe state?
Process Used Max
2 7
1 6
2 5
1 4
A. B.
C. D.
isro2011 operating-system resource-allocation
Answer key ☟
33.24.5 Resource Allocation: ISRO CSE 2014 | Question: 68
What is the minimum number of resources required to ensure that deadlock will never occur, if there are
currently three processes and running in a system whose maximum demand for the resources of
same type are 3, 4, and 5 respectively.
A. 3 B. 7 C. 9 D. 10
isro2014 operating-system resource-allocation
Answer key ☟
A. if there are more than two processes competing for that resources
B. if there are only two processes competing for that resources
C. if there is a single process competing for that resources
D. none of these
Answer key ☟
A system has 3 processes sharing 4 resources. If each process needs a maximum of 2 units, then
A. Deadlock can never occur B. Deadlock may occur
C. Deadlock has to occur D. None of these
operating-system resource-allocation isro2016
Answer key ☟
Answer key ☟
Type 1 Type 2
Process
Used Max Used Max
P1 1 2 1 3
P2 1 3 1 2
P3 2 4 1 4
Predict the state of this system, assuming that there are a total of instances of resource type and instances of
resource type .
A. Can go to safe or unsafe state based on sequence B. Safe state
C. Unsafe state D. Deadlock state
isro2013 operating-system resource-allocation
Answer key ☟
In a lottery scheduler with 40 tickets, how we will distribute the tickets among 4 processes and
such that each process gets 10%, 5%, 60% and 25% respectively?
A 12 4 70 30
B 7 5 20 10
C 4 2 24 10
D 8 5 30 40
Answer key ☟
A. B.
C. D.
isrodec2017 runtime-environment compiler-design
Answer key ☟
Answer key ☟
33.26.2 Segmentation: ISRO2015-31
If there are 32 segments, each size 1 k bytes, then the logical address should have
Answer key ☟
At a particular time of computation, the value of a counting semaphore is . Then operations and
operations were completed on this semaphore. The resulting value of the semaphore is :
A. B. C. D.
gate1992 operating-system semaphore easy isro2015 process-synchronization
Answer key ☟
Semaphores
Answer key ☟
At a particular time of computation the value of a counting semaphore is 7. Then 20 operations and
operations were completed on this semaphore. If the new value of semaphore is , will be
A. 18 B. 22 C. 15 D. 13
operating-system process-synchronization semaphore isro2016
Answer key ☟
At a particular time the value of counting semaphore is 10. It will become 7 after:
A. 3 V operations B. 3 P operations
C. 5 V operations and 2 P operations D. 2 V operations and 5 P operations
isro2017 operating-system semaphore
Answer key ☟
A. B. C. D.
isrodec2017 semaphore
Answer key ☟
i. Race Condition
ii. Process Synchronization
iii. Mutual Exclusion
iv. None of the above
A. I and II
B. II and III
C. All of the above
D. None of the above
Answer key ☟
Answer key ☟
Overlaying
A. requires use of a loader B. allows larger programs, but requires more effort
C. is most used on large computers D. is transparent to the user
isro2008 operating-system threads
Answer key ☟
A. To prevent priority inversion in systems having two or lesser priorities for a resource
B. To provide mutual exclusion between threads and prevent data corruption
C. To prevent priority inversion and ensure fairness in resource allocation
D. To allow multiple threads to access any resource simultaneously
Answer key ☟
A CPU generates -bit virtual addresses. The page size is KB. The processor has a translation look-aside
buffer (TLB) which can hold a total of page table entries and is -way set associative. The minimum
size of the TLB tag is:
A. B. C. D.
gatecse-2006 operating-system virtual-memory normal isro2016
Answer key ☟
Virtual memory is
Answer key ☟
Consider a logical address space of 8 pages of 1024 words mapped into memory of 32 frames. How many
bits are there in the logical address?
If the page size in a 32-bit machine is 4K bytes then the size of page table is
Answer key ☟
Using the page table shown below, translate the physical address 25 to virtual address. The address length
is 16 bits and page size is 2048 words while the size of the physical memory is four frames.
Answer key ☟
A computer has 16 pages of virtual address space but the size of main memory is only four frames.
Initially the memory is empty. A program references the virtual pages in the order 0, 2, 4, 5, 2, 4, 3, 11, 2,
10. How many page faults occur if LRU page replacement algorithm is used?
A. 3 B. 5 C. 7 D. 8
isro2014 operating-system virtual-memory paging
Answer key ☟
Answer key ☟
What is the size of the physical address space in a paging system which has a page table containing 64
entries of 11 bit each (including valid and invalid bit) and a page size of 512 bytes?
A. B. C. D.
isro2014 virtual-memory paging
Answer key ☟
33.31.9 Virtual Memory: ISRO CSE 2016 | Question: 22
Let the page fault service time be ms in a computer with average memory access time being ns. If
one page fault is generated for every memory accesses, what is the effective access time for the
memory?
Answer key ☟
Answer Keys
33.0.1 D 33.0.2 C 33.0.3 D 33.0.4 B 33.0.5 C
33.0.6 B 33.0.7 D 33.0.8 Q-Q 33.0.9 Q-Q 33.0.10 Q-Q
33.0.11 Q-Q 33.0.12 Q-Q 33.0.13 A 33.0.14 B 33.0.15 D
33.0.16 A 33.0.17 A 33.0.18 D 33.0.19 B 33.0.20 A
33.0.21 B 33.0.22 Q-Q 33.1.1 C 33.2.1 D 33.3.1 B
33.4.1 A 33.5.1 A 33.5.2 A 33.5.3 A 33.6.1 D
33.6.2 A 33.6.3 A 33.6.4 D 33.6.5 B 33.6.6 A
33.6.7 C 33.6.8 A 33.6.9 B 33.6.10 D 33.6.11 D
33.7.1 C 33.7.2 B 33.8.1 A 33.9.1 D 33.9.2 A
33.9.3 C 33.9.4 C 33.10.1 A 33.11.1 B 33.12.1 A
33.12.2 B 33.12.3 D 33.13.1 Q-Q 33.14.1 C 33.15.1 B
33.15.2 C 33.15.3 Q-Q 33.15.4 Q-Q 33.15.5 A 33.15.6 C
33.16.1 B 33.17.1 B 33.17.2 B 33.18.1 A 33.18.2 A
33.18.3 C 33.18.4 A 33.18.5 B 33.18.6 C 33.18.7 B
33.18.8 C 33.18.9 D 33.18.10 B 33.18.11 C 33.18.12 D
33.19.1 D 33.20.1 D 33.20.2 B 33.20.3 B 33.20.4 C
33.20.5 B 33.20.6 B 33.20.7 B 33.21.1 D 33.21.2 B
33.21.3 B 33.21.4 B 33.21.5 A 33.21.6 B 33.21.7 B
33.21.8 A 33.21.9 D 33.21.10 D 33.21.11 C 33.21.12 B
33.21.13 A 33.21.14 C 33.21.15 B 33.21.16 A 33.21.17 Q-Q
33.21.18 B 33.21.19 D 33.21.20 A 33.21.21 C 33.21.22 D
33.22.1 C 33.22.2 B 33.22.3 A 33.22.4 C 33.22.5 D
33.22.6 C 33.22.7 Q-Q 33.23.1 A 33.24.1 A 33.24.2 B
33.24.3 D 33.24.4 D 33.24.5 D 33.24.6 D 33.24.7 A
33.24.8 B 33.24.9 C 33.24.10 C 33.25.1 C 33.26.1 B
What languages,Scripts should learn to serve best at ISRO and what kind of skills and experience are
required to get ISRO/Scientist Post?
isro-preparation
Answer key ☟
Answer Keys
34.0.1 Q-Q
35 Programming and DS: DS (59)
35.0.1 ISRO-DEC2017-28
A. B. C. D.
isrodec2017
Answer key ☟
35.0.2 ISRO-DEC2017-47
Which of the following permutation can be obtained in the same order using a stack assuming that
input is the sequence in that order?
A. B. C. D.
isrodec2017
Answer key ☟
35.0.3 ISRO-DEC2017-49
A binary search tree is used to locate the number Which one of the following
probe sequence is not possible?
A. B.
C. D.
isrodec2017
Answer key ☟
35.0.4 ISRO-DEC2017-54
Answer key ☟
35.0.5 ISRO-DEC2017-56
A. Every simple path from anode to a descendant leaf contains the same number of black nodes.
B. If a node is red, then one children is red and another is black.
C. If a node is red, then both its children are red.
D. Every leaf node (sentinel node) is red.
isrodec2017
Answer key ☟
35.0.6 ISRO-DEC2017-52
A priority queue is implemented as a - Initially, it has elements. The level order traversal of the
heap is Two new elements and are inserted into the heap in that order. The level order
traversal of the heap after the insertion of the elements is
1.
2.
3.
4.
isrodec2017
Answer key ☟
35.0.7 ISRO-DEC2017-53
A. B. C. D.
isrodec2017
Answer key ☟
What is the maximum height of any AVL-tree with nodes? Assume that the height of a tree with a single
node is .
A. B. C. D.
gatecse-2009 data-structures binary-search-tree normal isrodec2017 avl-tree
Answer key ☟
A. B.
C. D.
isro-2020 data-structures avl-tree normal
Answer key ☟
The number of rotations required to insert a sequence of elements into an empty tree
is?
A. B. C. D.
isro2013 data-structures avl-tree
Answer key ☟
Let be a three dimensional array. How many elements are there in the array ?
A. B. C. D.
isro2013 array easy
Answer key ☟
In an array of elements that is both 2-ordered and 3-ordered, what is the maximum number of positions
that an element can be from its position if the array were 1-ordered?
A. B. C. D.
isro2013 array
Answer key ☟
Given a binary-max heap. The elements are stored in an arrays as . What is the
content of the array after two delete operations?
a. b.
c. d.
isro2018 data-structures binary-heap
Answer key ☟
Match the following and choose the correct answer in the order
Answer key ☟
35.4.1 Binary Search Tree: GATE CSE 2003 | Question: 19, ISRO2009-24
Suppose the numbers are inserted in that order into an initially empty binary search
tree. The binary search tree uses the usual ordering on natural numbers. What is the in-order traversal
sequence of the resultant tree?
A.
B.
C.
D.
Answer key ☟
35.4.2 Binary Search Tree: GATE CSE 2003 | Question: 63, ISRO2009-25
A data structure is required for storing a set of integers such that each of the following operations can be
done in time, where is the number of elements in the set.
Which of the following data structures can be used for this purpose?
Answer key ☟
The following numbers are inserted into an empty binary search tree in the given order:
. What is the height of the binary search tree (the height is the maximum distance of a
leaf node from the root)?
A. B. C. D.
gatecse-2004 data-structures binary-search-tree easy isro2009
Answer key ☟
How many distinct binary search trees can be created out of distinct keys?
A. B. C. D.
isro2011 data-structures binary-search-tree combinatory
Answer key ☟
A. B. C. D.
isro2011 data-structures binary-search-tree time-complexity
Answer key ☟
Consider the following binary search tree T given below: Which node contains the fourth smallest element
in T?
A. Q B. V C. W D. X
isro2014 data-structures binary-search-tree
Answer key ☟
A. B. C. D.
isro-2020 data-structures binary-search-tree easy
Answer key ☟
Suppose the numbers are inserted in that order into an initially empty binary search
tree.The binary search tree uses the reversal ordering on natural numbers i.e. is assumed to be smallest
and is assumed to be largest. The - traversal of the resultant binary search tree is
A. B.
C. D.
isrodec2017 binary-search-tree
Answer key ☟
A complete binary tree with the property that the value at each node is at least as large as the values at its
children is known as
A. binary search tree B. AVL tree
C. completely balanced tree D. Heap
isro2008 data-structures binary-tree
Answer key ☟
35.5.2 Binary Tree: ISRO CSE 2009 | Question: 31
Answer key ☟
Answer key ☟
Which of the following number of nodes can form a full binary tree?
A. 8 B. 15 C. 14 D. 13
isro2013 binary-tree easy
Answer key ☟
1.
2.
3.
4.
Answer key ☟
Answer key ☟
Answer key ☟
isro-cse-2023 data-structures
Answer key ☟
Assume that the operators are left associative and is right associative. The order of precedence
(from highest to lowest) is . The postfix expression corresponding to the infix expression
is
A.
B.
C.
D.
Answer key ☟
The following postfix expression with single digit operands is evaluated using a stack:
Note that is the exponentiation operator. The top two elements of the stack after the first is evaluated are
A. B. C. D.
gatecse-2007 data-structures stack normal infix-prefix isro2016
Answer key ☟
Answer key ☟
35.7.4 Infix Prefix: ISRO CSE 2017 | Question: 69
Answer key ☟
Answer key ☟
A. B. C. D.
isro2008 data-structures linked-list time-complexity
Answer key ☟
Which of the following operations is performed more efficiently by doubly linked list than by linear linked
list?
Answer key ☟
The minimum number of fields with each node of doubly linked list is
A. 1 B. 2 C. 3 D. 4
isro2008 data-structures linked-list
Answer key ☟
35.8.4 Linked List: ISRO CSE 2014 | Question: 49
Consider a single linked list where and are pointers to the first and last elements respectively of the
linked list. The time for performing which of the given operations depends on the length of the linked list?
Answer key ☟
I. Insertion of an element should be done at the last node of the circular list
II. Deletion of an element should be done at the last node of the circular list
Answer key ☟
In a doubly linked list the number of pointers affected for an insertion operation will be
A. 4 B. 0
C. 1 D. Depends on the nodes of doubly linked list
isro2017 data-structures linked-list bad-question
Answer key ☟
Consider a singly linked list of the form where is a pointer to the first element in the linked list and is
the pointer to the last element in the list. The time of which of the following operations depends on the
length of the list?
Answer key ☟
35.8.8 Linked List: ISRO CSE 2018 | Question: 79
Where Fwd and Bwd represent forward and backward link to the adjacent elements of the list. Which of the
following segment of code deletes the node pointed to by from the doubly linked list, if it is assumed that
points to neither the first nor the last node of the list?
Answer key ☟
Answer key ☟
Answer key ☟
Consider a standard Circular Queue implementation (which has the same condition for Queue Full and
Queue Empty) whose size is and the elements of the queue are .
The front and rear pointers are initialized to point at . In which position will the ninth element be added?
A. B. C. D.
data-structures queue isro2014
Answer key ☟
35.11.1 Stack: ISRO CSE 2007 | Question: 16, ISRO CSE 2009 | Question: 30, ISRO CSE 2014 | Question: 43
The five items: A, B, C, D, and E are pushed in a stack, one after other starting from A. The stack is
popped four items and each element is inserted in a queue. The two elements are deleted from the queue
and pushed back on the stack. Now one item is popped from the stack. The popped item is
A. A B. B C. C D. D
isro2007 stack isro2009 isro2014
Answer key ☟
Stack A has the entries a, b, c (with a on top). Stack B is empty. An entry popped out of stack A can be
printed immediately or pushed to stack B. An entry popped out of the stack B can be only be printed. In
this arrangement, which of the following permutations of a, b, c are not possible?
A. b a c B. b c a C. c a b D. a b c
isro2008 data-structures stack
Answer key ☟
The best data structure to check whether an arithmetic expression has balanced parenthesis is a:
Answer key ☟
A stack is implemented with an array of and a variable ‘ ’. The push and pop operations
are defined by the following code.
push (x)
A[pos] <- x
pos <- pos -1
end push
pop()
pos <- pos+1
return A[pos]
end pop
Which of the following will initialize an empty stack with capacity for the above implementation
A. B. C. D.
isro-2020 data-structures stack normal
Answer key ☟
If the sequence of operations - push (1), push (2), pop, push (1), push (2), pop, pop, pop, push (2), pop are
performed on a stack, the sequence of popped out values
A. 2,2,1,1,2 B. 2,2,1,2,2 C. 2,1,2,2,1 D. 2,1,2,2,2
isro2015 data-structures stack easy
Answer key ☟
The queue data structure is to be realized by using stack. The number of stacks needed would be
Answer key ☟
A. 0 B. 3 C. 4 D. 5
isro2011 data-structures tree
Answer key ☟
How many different trees are there with four nodes and
A. B. C. D.
isro2014 data-structures tree combinatory
Answer key ☟
Of the following, which best approximates the ratio of the number of nonterminal nodes in the total
number of nodes in a complete -ary tree of depth ?
A. B. C. D.
isro-2020 data-structures tree normal
Answer key ☟
The in-order traversal of a tree resulted in FBGADCE. Then the pre-order traversal of that tree would
result in
Answer key ☟
Answer key ☟
Answer key ☟
35.13.4 Tree Traversal: ISRO CSE 2020 | Question: 23
A. B.
C. D.
isro-2020 data-structures binary-tree tree-traversal normal
Answer key ☟
Answer Keys
35.0.1 A 35.0.2 C 35.0.3 D 35.0.4 B 35.0.5 A
35.0.6 D 35.0.7 C 35.1.1 B 35.1.2 C 35.1.3 D
35.2.1 B 35.2.2 A 35.3.1 C 35.3.2 D 35.4.1 C
35.4.2 B 35.4.3 B 35.4.4 B 35.4.5 C 35.4.6 C
35.4.7 C 35.4.8 D 35.5.1 D 35.5.2 C 35.5.3 D
35.5.4 B 35.5.5 C 35.6.1 Q-Q 35.6.2 B 35.6.3 Q-Q
35.7.1 A 35.7.2 A 35.7.3 B 35.7.4 A 35.7.5 B
35.8.1 B 35.8.2 A 35.8.3 C 35.8.4 C 35.8.5 B
35.8.6 X 35.8.7 A 35.8.8 A 35.8.9 C 35.9.1 Q-Q
35.10.1 A 35.11.1 D 35.11.2 C 35.11.3 B 35.11.4 D
35.11.5 A 35.11.6 B 35.12.1 X 35.12.2 Q-Q 35.12.3 C
35.13.1 B 35.13.2 A 35.13.3 X 35.13.4 B
36 Programming: Programming in C (63)
Answer key ☟
isro-ece
Answer key ☟
36.0.3 ISRO-DEC2017-14
driver is a driver
A. which is written in
B. which requires an intermediate layer
C. which communicates through Java sockets
D. which translates function calls into not native to
isrodec2017
Answer key ☟
36.0.4 ISRO-DEC2017-19
A. B. C. D.
isrodec2017
Answer key ☟
36.0.5 ISRO-DEC2017-46
In a compact one-dimensional array representation for lower triangular matrix (all elements
above diagonal are zero) of size non zero elements of each row are stored one
after another, starting from first row, the index of element in this niw representation is
A. B. C. D.
isrodec2017
Answer key ☟
36.0.6 ISRO-DEC2017-65
Answer key ☟
36.0.7 ISRO-DEC2017-74
A. B. C. D.
isrodec2017
Answer key ☟
36.0.8 ISRO-DEC2017-73
A. B. C. D.
isrodec2017
Answer key ☟
36.0.9 ISRO-DEC2017-80
A. B. C. D.
isrodec2017
Answer key ☟
Which of the following is NOT represented in a subroutine's activation record frame for a stack-based
programming language?
A. Values of local variables B. Return address
C. Heap area D. Information needed to access non local variables
isro2014 programming activation-record
Answer key ☟
A. Type COLONGE : (LIME, PINE, MUSK, MENTHOL); var a : array [COLONGE] of REAL;
B. var a : array [REAL] of REAL;
C. var a : array [‘A’…’Z’] of REAL;
D. var a : array [BOOLEAN] of REAL;
isro2008 array
Answer key ☟
A one dimensional array A has indices 1....75. Each element is a string and takes up three memory words.
The array is stored at location 1120 decimal. The starting address of A[49] is
Answer key ☟
Consider a -dimensional array with rows and columns, with each element storing a value
equivalent to the product of row number and column number. The array is stored in row-major format. If
the first element occupies the memory location with address and each element occupies only one
memory location, which all locations (in decimal) will be holding a value of ?
a. b. c. d.
isro-2020 programming array normal
Answer key ☟
A. B. C. D.
isro-2020 programming array normal
Answer key ☟
Pointer to an array of integers (of size Bytes) is initialised to . What is the value of ?
A. B. C. D.
Answer key ☟
A. B. C. D.
isro-2020 programming functions normal
Answer key ☟
A. prints 012
B. prints 123
C. prints 3 consecutive, but unpredictable numbers
D. prints 111
Answer key ☟
A. B. C. D.
isro2013 programming-in-c identify-function output
Answer key ☟
int main()
{
int index;
for(index=1; index<=5; index++)
{
printf("%d", index);
if (index==3)
continue;
}
}
Answer key ☟
A. 8 B. 9 C. 10 D. 11
isro2014 programming-in-c loop output
Answer key ☟
A. 10 11 12 13 14 B. 10 10 10 10 10
C. 0 1 2 3 4 D. Compilation error
isro2017 programming-in-c loop output
Answer key ☟
36.6.4 Loop: ISRO CSE 2017 | Question: 63
What does the following program do when the input is unsigned 16 bit integer?
#include<stdio.h>
main(){
unsigned int num;
int i;
scanf("%u", &num);
for(i=0;i<16;i++){
printf("%d", (num<<i&1<<15)?1:0);
}
}
A. It prints all even bits from num B. It prints all odd bits from num
C. It prints binary equivalent of num D. None of above
isro2017 programming-in-c loop
Answer key ☟
A. 4 B. 8 C. 9 D. 6720
isro2015 programming-in-c loop
Answer key ☟
A. 1 2 3 3 5 5 7 8 B. 1 2 3 4 5 6 7 8
C. 8 7 6 5 4 3 2 1 D. 1 2 3 5 4 6 7 8
isro2015 programming-in-c loop output
Answer key ☟
prints
Answer key ☟
A. 4 B. 5 C. 6 D. 7
isro2007 loop-invariants
Answer key ☟
int main()
{
int a;
int b=4;
a=SQR(b+2);
printf("%d\n",a);
return 0;
}
A. 14 B. 36 C. 18 D. 20
programming-in-c macros isro2014
Answer key ☟
Answer key ☟
A. the values are displayed right justified B. the values are displayed centered
C. the values are displayed left justified D. the values are displayed as negative numbers
isro2008 programming programming-in-c non-gatecse
Answer key ☟
isro2017 non-gatecse
Answer key ☟
isro2017 non-gatecse
Answer key ☟
A program having features such as data abstraction, encapsulation and data hiding, polymorphism
inheritance is called
(a) Structured program
Answer key ☟
Answer key ☟
}
func()
{
static int tmp=10;
printf("%d", tmp);
}
A. 20 10 10 B. 20 10 20 C. 20 20 20 D. 10 10 10
isro2017 programming-in-c functions output
Answer key ☟
Assuming required header files are included and if the machine in which this program is executed is little endian,
then the output will be
A. 0 B. 99999999 C. 1 D. unpredictable
isro2018 programming output
Answer key ☟
A. B.
C. Compilation error D. None of these
isro2018 programming output
Answer key ☟
a. ab b. ba c. ac d. aa
Answer key ☟
Consider the following code written in a pass-by-reference language like FORTRAN and these statements
about the code.
subroutine swap(ix,iy)
it = ix
L1 : ix = iy
L2 : iy = it
end
ia = 3
ib = 8
call swap (ia, ib+5)
print *, ia, ib
end
S1: The compiler will generate code to allocate a temporary nameless cell, initialize it to 13, and pass the address
of the cell to swap
S2: On execution the code will generate a runtime error on line L1
S3: On execution the code will generate a runtime error on line L2
S4: The program will print 13 and 8
S5: The program will print 13 and -2
Exactly the following set of statement(s) is correct:
Answer key ☟
36.13 Pointers (7)
Answer key ☟
Answer key ☟
Answer key ☟
What will be output of the following program? Assume that you are running this program in little-endian
processor.
#include<stdio.h>
int main()
{
short a=320;
char *ptr;
ptr=(char *)&a;
printf("%d",*ptr);
return 0;
}
A. 1 B. 320 C. 64 D. Compilation error
programming-in-c pointers isro2016 little-endian-big-endian
Answer key ☟
What is output of the following ‘C’ code assuming it runs on a byte addressed little endian machine?
#include<stdio.h>
int main()
{
int x;
char *ptr;
x=622,100,101;
printf("%d",(*(char *)&x)*(x%3));
return 0;
}
A. B. C. D.
isro-2020 programming programming-in-c normal pointers
Answer key ☟
A. B. C. D.
isro-2020 programming programming-in-c normal pointers
Answer key ☟
Answer key ☟
36.14 Programming In C (7)
int i,j,x;
scanf("%d ",x);
i=1;
j=1;
while(i<10){
j=j*i;
i=i+1;
if(i==x) break;
return 0;
}
isro2018 programming-in-c
Answer key ☟
The following three 'C' language statements is equivalent to which single statement?
y=y+1;
z=x+y;
x=x+1
A. z = x + y + 2; B. z = (x++) + (++y);
C. z = (x++) + (y++); D. z = (x++) + (++y) + 1;
isro2014 programming-in-c
Answer key ☟
Which one of the following is correct about the statements given below?
Answer key ☟
For the program fragment above, which of the following statements about the variables i and j must be true after
execution of this program? [ !(exclamation) sign denotes factorial in the answer]
a.
b.
c.
d. ))
Answer key ☟
Answer key ☟
s2 will be executed if
A. a <= b B. b > c
C. b >= c and a <= b D. a > b and b <= c
isro2015 programming programming-in-c
Answer key ☟
Answer key ☟
A. B. C. D.
gatecse-2004 programming programming-in-c recursion easy isro2008
Answer key ☟
Let be a procedure that for some inputs calls itself (i.e. is recursive). If is guaranteed to terminate,
which of the following statement(s) must be true?
Answer key ☟
A. B. C. D.
isro-2020 programming normal recursion
Answer key ☟
Answer key ☟
If only one memory location is to be reserved for a class variable, no matter how many objects are
instantiated, then the variable should be declared as
Answer key ☟
Answer key ☟
Which of the following comparisons between static and dynamic type checking incorrect?
Answer key ☟
Answer key ☟
36.18.2 Structure: ISRO CSE 2020 | Question: 74
Following declaration of an array of struct, assumes size of byte, short, int and long are and
respectively. Alignment rule stipulates that – byte field must be located at an address divisible by , the
fields in the struct are not rearranged, padding is used to ensure alignment. All elements of array should be of
same size.
Struct complx
Short s
Byte b
Long l
Int i
End Complx
Complx C[10]
A. B. C. D.
isro-2020 programming normal structure
Answer key ☟
Answer key ☟
Assume that the objects of the type short, float and long occupy bytes, bytes and bytes, respectively. The
memory requirement for variable , ignoring alignment consideration, is:
Answer key ☟
Answer Keys
36.0.1 Q-Q 36.0.2 Q-Q 36.0.3 C 36.0.4 D 36.0.5 B
36.0.6 C 36.0.7 A 36.0.8 C 36.0.9 D 36.1.1 C
36.2.1 B 36.2.2 C 36.2.3 X 36.2.4 B 36.3.1 Q-Q
36.4.1 B 36.4.2 B 36.5.1 C 36.6.1 B 36.6.2 D
36.6.3 B 36.6.4 C 36.6.5 C 36.6.6 A 36.6.7 A
36.7.1 B 36.8.1 A 36.8.2 D 36.9.1 C 36.9.2 Q-Q
36.9.3 Q-Q 36.10.1 Q-Q 36.11.1 D 36.11.2 B 36.11.3 X
36.11.4 D 36.11.5 A 36.12.1 B 36.13.1 C 36.13.2 A
36.13.3 A 36.13.4 C 36.13.5 D 36.13.6 D 36.13.7 D
36.14.1 Q-Q 36.14.2 B 36.14.3 D 36.14.4 D 36.14.5 D
36.14.6 D 36.14.7 X 36.15.1 C 36.15.2 D 36.15.3 D
36.16.1 A 36.16.2 B 36.16.3 A 36.17.1 D 36.18.1 C
36.18.2 X 36.19.1 D 36.20.1 C
37 Theory of Computation (38)
The following Finite State Machine (FSM) is used to detect a particular pattern in input data stream. Whenever the
pattern is matched at input, output is set to '1' or else output is cleared to '0'. For which of the following data
stream, output goes to '1' twice?
(a) 0010011010010101
(b) 0011011010010101
(c) 0101011000010101
(d) 1100100101001010
Answer key ☟
37.0.2 ISRO-DEC2017-24
Answer key ☟
37.0.3 ISRO-DEC2017-22
This grammar is
A. not context-free, not linear B. not context-free, linear
C. context-free, not linear D. context-free, linear
isrodec2017
Answer key ☟
37.0.4 ISRO-DEC2017-25
Answer key ☟
37.0.5 ISRO-DEC2017-21
isrodec2017
Answer key ☟
37.0.6 ISRO-DEC2017-26
Answer key ☟
Answer key ☟
If and are two recursively enumerable languages then they are not closed under
A. Kleene star of B. Intersection
C. Union D. Set difference
isro2017 set-theory theory-of-computation recursive-and-recursively-enumerable-languages closure-property
Answer key ☟
37.1.2 Closure Property: ISRO CSE 2018 | Question: 25
Answer key ☟
A (Context Free Grammar) is said to be in Chomsky Normal Form , if all the productions
are of the form A BC or A a. Let be a in . To derive a string of terminals of length x,
the number of products to be used is:
a. b. c. d.
isro2018 context-free-grammar theory-of-computation
Answer key ☟
The language which is generated by the grammar over the alphabet of is the
set of
A. Strings that begin and end with the same symbol B. All odd and even length palindromes
C. All odd length palindromes D. All even length palindromes
isro-2020 theory-of-computation context-free-grammar normal
Answer key ☟
A. B.
C. D.
Answer key ☟
37.3.1 Context Free Language: GATE CSE 2009 | Question: 12, ISRO2016-37
The language generated by the above grammar over the alphabet is the set of:
A. all palindromes B. all odd length palindromes
C. strings that begin and end with the same symbol D. all even length palindromes
gatecse-2009 theory-of-computation context-free-language easy isro2016
Answer key ☟
Answer key ☟
Answer key ☟
Answer key ☟
The number of states required by a Finite State Machine,to simulate the behavior of a computer with a
memory capable of storing 'm' words, each of length 'n' bits is?
A. B. C. D.
theory-of-computation finite-automata isro2014
Answer key ☟
A. 0 B. 1 C. 2 D. 3
isro2014 theory-of-computation finite-automata
Answer key ☟
Answer key ☟
Minimum number of states required in DFA accepting binary strings not ending in is
A. B. C. D.
isro-2020 theory-of-computation finite-automata normal
Answer key ☟
What are the final states of the DFA generated from the following NFA?
A. B.
C. D.
isro2013 theory-of-computation finite-automata
Answer key ☟
Answer key ☟
Answer key ☟
Consider the context-free grammer below. There is the starting non terminal symbol, while and
are terminal symbols.
Answer key ☟
What is the highest type number that can be assigned to the following grammar?
A. Type 0 B. Type 1 C. Type 2 D. Type 3
theory-of-computation identify-class-language isro2016
Answer key ☟
Which of the following classes of languages can validate an address in dotted decimal format? It is to
be ensured that the decimal values lie between and .
A. RE and higher B. CFG and higher
C. CSG and higher D. Recursively enumerable language
isro-2020 theory-of-computation normal identify-class-language
Answer key ☟
How many states are there in a minimum state deterministic finite automaton accepting the language
number of 0's is divisible by 2 and number of 1's is divisible by 5, respectively ?
A. 7 B. 9 C. 10 D. 11
theory-of-computation isro2014 minimal-state-automata
Answer key ☟
Answer key ☟
37.10.1 Recursive and Recursively Enumerable Languages: GATE CSE 2008 | Question: 13, ISRO2016-36
A. regular B. context-free
C. context-sensitive D. recursive
gatecse-2008 theory-of-computation easy isro2016 recursive-and-recursively-enumerable-languages
Answer key ☟
37.10.2 Recursive and Recursively Enumerable Languages: ISRO CSE 2011 | Question: 79
Answer key ☟
In some programming language, an identifier is permitted to be a letter followed by any number of letters
or digits. If and denote the sets of letters and digits respectively, which of the following expressions
defines an identifier?
A. B. C. D.
gate1995 theory-of-computation regular-expression easy isro2017
Answer key ☟
Let , i.e. is the set of all bit strings with even number of
1's. Which one of the regular expression below represents ?
A. B.
C. D.
theory-of-computation regular-expression isro2016
Answer key ☟
Consider the deterministic finite-state automaton (DFA) below. The alphabet is . The state with a
small incoming arrow is the initial state, while the double circle state denotes a final state.
Which of the following regular expressions defines the language accepted by the DFA?
A. B. C. D.
Answer key ☟
a. is a regular language
b. The set , consisting of all strings made up of only and having equal number of and defines a
regular language
c. gives the set
d. None of the above
Answer key ☟
Answer key ☟
Answer key ☟
Which of the following is FALSE with respect to possible outcomes of executing a Turing Machine over a
given input?
A. it may halt and accept the input B. it may halt by changing the input
C. it may halt and reject the input D. it may never halt
isro2014 theory-of-computation turing-machine
Answer key ☟
AN FSM(finite state machine) can be considered to be a turing machine of finite tape length
Answer Keys
37.0.1 Q-Q 37.0.2 A 37.0.3 C 37.0.4 D 37.0.5 D
37.0.6 B 37.0.7 Q-Q 37.1.1 D 37.1.2 B 37.2.1 A
37.2.2 C 37.2.3 X 37.3.1 B 37.3.2 B 37.3.3 Q-Q
37.4.1 D 37.5.1 C 37.5.2 C 37.5.3 X 37.5.4 B
37.5.5 A 37.6.1 X 37.6.2 D 37.6.3 Q-Q 37.7.1 D
37.7.2 A 37.8.1 C 37.9.1 D 37.10.1 D 37.10.2 D
37.11.1 C 37.11.2 B 37.11.3 Q-Q 37.12.1 D 37.12.2 B
37.12.3 C 37.13.1 B 37.13.2 A
38 Unknown Category (1)
38.0.1 What are the wrong answers in ISRO 2016 official key?
isro2016
Answer key ☟
Answer Keys
38.0.1 Q-Q