Microprocessor Architecture, Programming & Applications with the 8085_R. S. Goankar
Microprocessor Architecture, Programming & Applications with the 8085_R. S. Goankar
Created by
Rishabh Jain
B.Tech
Electronics Engineering
Dr. A.P.J. Abdul Kalam Technical University
College Teacher
None
Cross-Checked by
K. V. P. Pradeep
Author: R. S. Goankar
Edition: 4
Year: 1999
ISBN: 978-81-900828-7-7
1
Scilab numbering policy used in this document and the relation to the
above book.
For example, Exa 3.51 means solved example 3.51 of this book. Sec 2.3 means
a scilab code whose theory is explained in Section 2.3 of the book.
2
Contents
12 Interrupts 67
3
List of Scilab Codes
4
Exa 7.7 INCREMENT AND DECREMENT . . . . 37
Exa 7.8 LEFT ROTATION RLC OF BITS . . . . . 39
Exa 7.9 LEFT ROTATION RAL OF BITS . . . . . 41
Exa 7.10 RIGHT ROTATION RRC AND RAR OF BITS 43
Exa 7.11 COMPARISION OF DATA . . . . . . . . . 44
Exa 9.1 PUSH POP AND DELAY INSTRUCTIONS 48
Exa 9.2 EXCHANGE OF DATA USING STACK . . 49
Exa 9.3 EXCHANGE INFORMATION BETWEEN STACK
AND PROGRAM COUNTER . . . . . . . . 53
Exa 10.1 BCD TO BINARY . . . . . . . . . . . . . . 54
Exa 10.2 ADDITION OF PACKED BCD NUMBERS 55
Exa 10.3 EXCHANGE OF DATA . . . . . . . . . . . 57
Exa 10.4 ADDITION OF TWO 16 BIT NUMBERS . 57
Exa 10.5 SUBTRACTION OF TWO 16 BIT NUM-
BERS . . . . . . . . . . . . . . . . . . . . . 59
Exa 10.6 DISPLAY CONTENTS OF STACK . . . . 62
Exa 10.7 SUBROUTINE TO SET THE ZERO FLAG 63
Exa 10.8 TRANSFER A PROGRAM TO AN ADDRESS
IN HL REGISTER . . . . . . . . . . . . . . 64
Exa 12.1 ENABLE INTERRUPTS . . . . . . . . . . 67
Exa 12.2 RESET INTERRUPT . . . . . . . . . . . . 68
Exa 12.3 CHECK PENDING INTERRUPT . . . . . 68
Exa 14.1 INITIALIZE HYPOTHETICAL CHIP AS OUT-
PUT BUFFER . . . . . . . . . . . . . . . . 71
Exa 14.2 ADDRESS DETERMINATION OF GIVEN
FIGURE . . . . . . . . . . . . . . . . . . . . 72
Exa 15.1 PORT ADDRESS CONTROL WORD AD-
DRESS AND READ THE DIP SWITCHES 74
Exa 15.2 BSR CONTROL WORD SUBROUTINE . . 75
Exa 15.3 INSTRUCTIONS TO GENERATE A PULSE
FROM COUNTER 0 . . . . . . . . . . . . . 78
Exa 15.4 INSTRUCTIONS TO GENERATE SQUARE
WAVE PULSE FROM COUNTER 1 . . . . 79
Exa 15.5 SUBROUTINE TO GENERATE AN INTER-
RUPT . . . . . . . . . . . . . . . . . . . . . 83
Exa 15.6 EXPLANATION OF INSTRUCTIONS . . . 84
Exa 15.8 INITIALIZATION INSTRUCTIONS FOR DMA 85
Exa 19.1 BINARY INTO HEX AND OCTAL . . . . 89
5
Exa 19.2 SUBTRACTION OF TWO NUMBERS . . 89
Exa 19.3 SUBTRACTION OF TWO NUMBERS . . 91
Exa 19.4 2s COMPLIMENT OF BINARY NUMBER 93
Exa 19.5 SUBTRACTION OF TWO NUMBERS . . 94
Exa 19.6 SUBTRACTION OF TWO NUMBERS . . 95
Exa 19.7 SUBTRACTION OF UNSIGNED NUMBERS 95
Exa 19.8 SUBTRACTION OF SIGNED NUMBERS . 97
Exa 19.9 ADDITION OF TWO POSITIVE NUMBERS 98
6
List of Figures
7
7.3 TRANSFER OF DATA BYTES TO ACCUMULATOR . . . 33
7.4 USE OF ADDRESSING MODES . . . . . . . . . . . . . . . 35
7.5 USE OF ADDRESSING MODES . . . . . . . . . . . . . . . 35
7.6 INCREMENT A NUMBER . . . . . . . . . . . . . . . . . . 36
7.7 ARITHEMETIC OPERATIONS . . . . . . . . . . . . . . . 38
7.8 INCREMENT AND DECREMENT . . . . . . . . . . . . . . 40
7.9 LEFT ROTATION RLC OF BITS . . . . . . . . . . . . . . 42
7.10 LEFT ROTATION RAL OF BITS . . . . . . . . . . . . . . 43
7.11 RIGHT ROTATION RRC AND RAR OF BITS . . . . . . . 45
7.12 COMPARISION OF DATA . . . . . . . . . . . . . . . . . . 47
8
15.4 INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE
FROM COUNTER 1 . . . . . . . . . . . . . . . . . . . . . . 82
15.5 SUBROUTINE TO GENERATE AN INTERRUPT . . . . . 84
15.6 EXPLANATION OF INSTRUCTIONS . . . . . . . . . . . . 86
15.7 INITIALIZATION INSTRUCTIONS FOR DMA . . . . . . 88
15.8 INITIALIZATION INSTRUCTIONS FOR DMA . . . . . . 88
9
Chapter 2
Microprocessor Architecture
and Microcomputer Systems
1 // p a g e no 39
2 // e x a m p l e no 2 . 1
3 //MEMORY ADDRESS RANGE.
4 clc ;
5 printf ( ’ A7−A0 a r e address lines for register select
. \n ’ ) ;
6 printf ( ’ A15−A8 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \n
\n ’ ) ;
7 printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
8 printf ( ’ 0 0 0 0 0 0 0 0 =00H \n \n ’ ) ;
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
9 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
10 printf ( ’ 0 0 0 0 0 0 0 0 =00H \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r 00.
11 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 0 0 0 0H . \n \n ’ ) ;
12 printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
13 printf ( ’ 0 0 0 0 0 0 0 0 =00H \n \n ’ ) ;
10
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
14 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
15 printf ( ’ 1 1 1 1 1 1 1 1 =FFH \n ’ ) ; // t h i s
s e l e c t s t h e r e g i s t e r FF .
16 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 00FFH . \n \n ’ ) ;
17 // t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
0 0 0 0H t o 00FFH .
18 // t h e memory a d d r e s s e d o f t h e c h i p can be c h a n g e d by
m o d i f y i n g t h e h a r d w a r e . For e x a m p l e i f we remove
t h e i n v e r t e r on l i n e A15 .
19 printf ( ’ A15 A14 A13 A12 A11 A10 A9 A8 \n ’ ) ;
20 printf ( ’ 1 0 0 0 0 0 0 0 =80H \n \n ’ ) ;
// c h i p s e l e c t b i t s have t o be a c t i v e low a l w a y s
to s e l e c t that chip .
21 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
22 printf ( ’ 0 0 0 0 0 0 0 0 =00H \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r 00.
23 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 8 0 0 0H . \n \n ’ ) ;
24 // The memory a d d r e s s r a n g e from a b o v e c h a n g e w i l l be
8 0 0 0H t o 80FFH .
25 // Thus a memory can be a s s i g n e d a d d r e s s i n v a r i o u s
l o c a t i o n s o v e r t h e e n t i r e map o f 0 0 0 0H t o FFFFH .
1 // p a g e no 41
2 // e x a m p l e no 2 . 2
3 //MEMORY ADDRESS RANGE.
4 clc ;
5 printf ( ’ A9−A0 a r e address lines for register select
11
Figure 2.1: MEMORY ADDRESS RANGE
12
. \n ’ ) ;
6 printf ( ’ A15−A10 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
7 printf ( ’ A15 A14 A13 A12 A11 A10 \n ’ ) ;
8 printf ( ’ 0 0 0 0 0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
9 printf ( ’ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
10 printf ( ’ 0 0 0 0 0 0 0 0 0 0 \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r
11 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 0 0 0 0H . \n \n ’ ) ;
12 printf ( ’ A15 A14 A13 A12 A11 A10 \n ’ ) ;
13 printf ( ’ 0 0 0 0 0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
14 printf ( ’ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
15 printf ( ’ 1 1 1 1 1 1 1 1 1 1 \n ’ ) ; // t h i s
s e l e c t s the r e g i s t e r
16 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 03FFH . \n \n ’ ) ;
17 // t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
0 0 0 0H t o 03FFH .
18 // t h e memory a d d r e s s e d o f t h e c h i p can be c h a n g e d by
m o d i f y i n g t h e h a r d w a r e . L i k e we d i d i n t h e
p r e v i o u s example .
1 // p a g e no 43
2 // e x a m p l e no 2 . 3
3 //CALCULATING ADDRESS LINES
4 clc ;
13
Figure 2.2: MEMORY ADDRESS RANGE
5 // number o f a d d r e s s l i n e s a r e g i v e n by x
6 x ={ log (8192) }/{ log (2) };
7 printf ( ’ Number o f a d d r e s s l i n e s = ’ )
8 disp ( x ) ;
1 // p a g e no 43
2 // e x a m p l e no 2 . 4
3 //CALCULATING NO OF CHIPS .
14
Figure 2.4: CALCULATING NO OF CHIPS
4 clc ;
5 // c h i p 1 0 2 4 ∗ 1 h a s 1 0 2 4 ( 1 k ) r e g i s t e r s & each r e g i s t e r
can s t o r e one b i t w i t h one d a t a l i n e . We n e e d 8
d a t a l i n e s f o r b y t e s i z e memory . T h e r e f o r e 8
c h i p s a r e n e c e s s a r y f o r 1 k b y t e memory . For 1 k
b y t e memory we w i l l n e e d 64 c h i p s . We can a r r i v e
a t t h e same a n s by d i v i d i n g 8 k b y t e by 1 k ∗1 a s
follows :
6 no =(8192*8) /(1024*1) ;
7 printf ( ’ No o f c h i p s= ’ ) ;
8 disp ( no ) ;
1 // p a g e no 44
2 // e x a m p l e no 2 . 5
3 //FETCHING AN INSTRUCTION .
4 clc ;
5 printf ( ’ Memory L o c a t i o n 2 0 0 5H= 4FH \n ’ ) ;
6 printf ( ’ A d d r e s s bus= 2 0 0 5H \n ’ ) // program c o u n t e r
p l a c e s t h e 16− b i t a d d r e s s on t h e a d d r e s s bus .
7 printf ( ’ C o n t r o l bus−−> (MEMR) \n ’ ) ; // c o n t r o l bus
s e n d s memory r e a d c o n t r o l s i g n a l .
8 printf ( ’ Data bus= 4FH \n ’ ) ; // i n s t r u c t i o n 4FH i s
f e t c h e d and t r a n s f e r r e d t o i n s t r u c t i o n d e c o d e r .
15
Figure 2.5: FETCHING AN INSTRUCTION
16
Chapter 3
8085 Microprocessor
Architecture And Memory
Interfacing
1 // p a g e no 78
2 // e x a m p l e no 3 . 2
3 //EXECUTING THE INSTRUCTION .
4 clc ;
5 A =82; // c o n t e n t s o f t h e a c c u m u l a t o r .
6 printf ( ’ A c c u m u l a t o r= ’ ) ;
7 disp ( A ) ;
8 TR = A ; // c o n t e n t s o f t h e a c c u m u l a t o r t r a n f e r r e d t o
the temporary r e g i s t e r .
9 printf ( ’ Temporary R e g i s t e r= ’ ) ;
10 disp ( TR ) ;
11 C = TR ; // c o n t e n t s o f t h e t e m p o r a r y r e g i s t e r a r e
t r a n s f e r r e d to r e g i s t e r C.
12 printf ( ’ R e g i s t e r C= ’ ) ;
13 disp ( C ) ;
17
Figure 3.1: EXECUTING THE INSTRUCTION
1 // p a g e no 82
2 // e x a m p l e no 3 . 3
3 //TIME REQUIRED FOR EXECUTION .
4 clc ;
5 A =32; // MVI A, 3 2H l o a d s t h e v a l u e 32 i n a c c u m u l a t o r
.
6 printf ( ’ A c c u m u l a t o r= ’ ) ;
7 disp ( A ) ;
8 // c a l c u l a t i n g t h e e x e c u t i o n t i m e f o r i n s t r u c t i o n .
9 f =2; // c l o c k f r e q u n c y .
10 printf ( ’ c l o c k f r e q u e n c y= %f MHz \n ’ ,f ) ;
11 t =1/ f ; // T−s t a t e=c l o c k p e r i o d
12 printf ( ’T−s t a t e=c l o c k p e r i o d= %f m i c r o s e c \n ’ ,t ) ;
13 t1 =4* t ; // e x e c u t i o n t i m e f o r o p c o d e f e t c h .
14 printf ( ’ E x e c u t i o n t i m e f o r o p c o d e f e t c h= %f m i c r o s e c
\n ’ , t1 ) ;
15 t2 =3* t ; // e x e c u t i o n t i m e f o r memory r e a d .
16 printf ( ’ E x e c u t i o n t i m e f o r memory r e a d= %f m i c r o s e c
\n ’ , t2 ) ;
17 t3 =7* t ; // e x e c u t i o n t i m e f o r i n s t r u c t i o n .
18 printf ( ’ E x e c u t i o n t i m e f o r i n s t r u c t i o n = %f m i c r o s e c
18
Figure 3.2: TIME REQUIRED FOR EXECUTION
\n ’ , t3 ) ;
1 // // p a g e no 91
2 // e x a m p l e no 3 . 5
3 //MEMORY ADDRESS RANGE OF 6 1 1 6 .
4 clc ;
5 printf ( ’ A10−A0 a r e address l i n e s for register
s e l e c t . \n ’ ) ;
6 printf ( ’ A15−A11 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
7 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
8 printf ( ’ 1 0 0 0 1 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
9 printf ( ’ A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
10 printf ( ’ 0 0 0 0 0 0 0 0 0 0 0 \n ’ ) ; //
t h i s s e l e c t s the r e g i s t e r
11 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 8 8 0 0H . \n \n ’ ) ;
12 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
19
Figure 3.3: MEMORY ADDRESS RANGE OF 6116
13 printf ( ’ 1 0 0 0 1 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
14 printf ( ’ A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
15 printf ( ’ 1 1 1 1 1 1 1 1 1 1 1 \n ’ ) ; //
t h i s s e l e c t s the r e g i s t e r
16 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 88FFH . \n \n ’ ) ;
17 // t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
8 8 0 0H t o 88FFH .
1 // // p a g e no 95
2 // e x a m p l e no 3 . 6
20
3 //MEMORY ADDRESS RANGE OF 8 1 5 5 .
4 clc ;
5 printf ( ’ A7−A0 a r e a d d r e s s l i n e s for register select .
\n ’ ) ;
6 printf ( ’ A10−A8 a d d r e s s l i n e s a r e d o n t c a r e
c o n d i t i o n s . \n ’ ) ;
7 printf ( ’ A15−A11 a r e a d d r e s s l i n e s f o r c h i p s e l e c t . \
n \n ’ ) ;
8 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
9 printf ( ’ 0 0 1 0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
10 printf ( ’ A10 A9 A8 \n ’ ) ;
11 printf ( ’ 0 0 1 \n \n ’ ) ; // t h i s i s t h e don ’ t c a r e
condition .
12 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
13 printf ( ’ 0 0 0 0 0 0 0 0 \n ’ ) ; // t h i s s e l e c t s
the r e g i s t e r
14 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 2 1 0 0H . \n \n ’ ) ;
15 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
16 printf ( ’ 0 0 1 0 0 \n \n ’ ) ; // c h i p s e l e c t
b i t s have t o be a c t i v e low a l w a y s t o s e l e c t t h a t
chip .
17 printf ( ’ A10 A9 A8 \n ’ ) ;
18 printf ( ’ 0 0 1 \n \n ’ ) ; // t h i s i s t h e don ’ t c a r e
condition .
19 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
20 printf ( ’ 1 1 1 1 1 1 1 1 \n ’ ) ; // t h i s s e l e c t s
the r e g i s t e r
21 printf ( ’ The a b o v e c o m b i n a t i o n s e l e c t s t h e memory
a d d r e s s 21FFH . \n \n ’ ) ;
22 // t h u s t h i s c h i p can s e l e c t any memory l o c a t i o n from
2 1 0 0H t o 21FFH .
21
Figure 3.4: MEMORY ADDRESS RANGE OF 8155
22
Chapter 6
Introduction To 8085
Instructions
Scilab code Exa 6.1 LOAD A DATA TO ONE REGISTER AND MOVE IT TO ANOTHER
1 // p a g e no 164
2 // e x a m p l e no 6 . 1
3 //LOAD A DATA TO ONE REGISTER AND MOVE IT TO ANOTHER
.
4 clc ;
5 A = hex2dec ([ ’ 82 ’ ]) ; // s t o r i n g t h e d e c i m a l v a l u e o f
h e x a d e c i m a l no 82 i n a c c u m u l a t o r A
6 B = dec2hex ([ A ]) ; // s t o r i n g t h e h e x a d e c i m a l v a l u e o f A
in B
7 print ( %io (2) ,B ) ; // d i s p l a y i n g t h e h e x a d e c i m a l number
in r e g i s t e r B
23
Figure 6.1: LOAD A DATA TO ONE REGISTER AND MOVE IT TO
ANOTHER
1 // p a g e no 164
2 // e x a m p l e 6 . 2
3 //TO SWITCH ON SOME DEVICES
4 // l e t t h e s w i t c h e s which a r e ON a r e a t b i t no D0 , D1 ,
D2 , D3 , D6 ;
5 clc ;
6 x = hex2dec ([ ’ 4F ’ ]) ; // h e x a d e c i m a l t o d e c i m a l
conversion
7 y = dec2bin ( x ) ; // d e c i m a l t o b i n a r y c o n v e r s i o n
8 printf ( ’ At o u t p u t p o r t 01H : ’ ) ; // same i n p u t a p p e a r s
at the putput
9 disp ( y ) ;
10 printf ( ’ V a l u e 1 s a r e s h o w i n g t h e d e v i c e s a r e ON. \n ’
)
11 printf ( ’ V a l u e 0 s a r e s h o w i n g t h e d e v i c e s a r e
s w i t c h e d OFF . ’ ) ;
24
Scilab code Exa 6.3 ADDITION OF TWO NUMBERS
1 // p a g e no 174
2 // e x a m p l e 6 . 3
3 //ADDITION OF TWO NUMBERS.
4 // 93H i s s t o r e d i n a c c u m u l a t o r . C o n v e r t i n g i t i n t o
decimal .
5 clc ;
6 A = hex2dec ([ ’ 93 ’ ]) ;
7 //B7H i s s t o r e d i n r e g i s t e r C . C o n v e r t i n g i t i n t o
decimal .
8 C = hex2dec ([ ’ B7 ’ ]) ;
9 X = A + C ; // t h e r e s u l t comes o u t t o be 330
10 Z =X -256;
11 //X=330; // t h i s i s a d e c i m a l v a l u e . C o n v e r t i n g i t
into hexadecimal
12 Y = dec2hex ( Z ) ;
13 printf ( ’ Sum= ’ )
14 disp ( Y ) ;
15 if X >255 then
16 printf ( ’CY=1 ’ )
17 else
18 printf ( ’CY=0 ’ )
19 end
1 // p a g e no 175
2 // e x a m p l e 6 . 4
3 //CONTINUATION OF PREVIOUS EXAMPLE.
25
Figure 6.3: ADDITION OF TWO NUMBERS
26
Scilab code Exa 6.5 INCRIMENTING ACCUMULATOR CONTENT
1 // p a g e no 175
2 // e x a m p l e no 6 . 5
3 //INCRIMENTING ACCUMULATOR CONTENT.
4 // a c c u m u l a t o r h o l d s t h e d a t a FFH
5 clc ;
6 A = hex2dec ([ ’ FF ’ ]) ; // c o n v e r t i n g FFH i n t o d e c i m a l
value
7 // d e c i m a l v a l u e o f 01H i s 0 1 . Adding 01 t o A
8 Y = A +1; // t h e r e s u l t comes o u t t o be 256
9 Z =Y -256;
10 X = dec2hex ( Z ) ;
11 printf ( ’ Sum = ’ )
12 disp ( X ) ;
13 if Y >255 then
14 printf ( ’CY=1 \n ’ )
15 else
16 printf ( ’CY=0 \n ’ )
17 end
18 if Z >127 then
19 printf ( ’ S=1 \n ’ )
20 else
21 printf ( ’ S=0 \n ’ )
22 end
23 if Z >0 then
24 printf ( ’ Z=0 \n ’ )
25 else
26 printf ( ’ Z=1 \n ’ )
27 end
27
Figure 6.5: INCRIMENTING ACCUMULATOR CONTENT
1 // p a g e no 179
2 // e x a m p l e 6 . 6
3 //SUBTRACTION OF TWO NUMBERS.
4 // a c c u m u l a t o r h a s 97H . C o n v e r t i n g i t i n t o d e c i m a l
value
5 clc ;
6 A = hex2dec ([ ’ 97 ’ ]) ;
7 // r e g i s t e r B h a s 65H . F i n d i n g 2 ’ s c o m p l i m e n t o f 65H .
8 B = hex2dec ([ ’ 65 ’ ]) ;
9 X =256 - B ;
10 Y=A+X;
11 S =Y -256;
12 Z = dec2hex ( S ) ;
13 printf ( ’ S u b t r a c t i o n= ’ )
14 disp ( Z ) ;
15 if Y >255 then
16 CY =1;
17 printf ( ’ The r e s u l t i s p o s i t i v e . \n ’ ) ;
18 else
19 CY =0;
20 printf ( ’ The r e s u l t i s n e g a t i v e . \n ’ )
21 end
22 if S >127 then
23 printf ( ’ S=1 \n ’ )
24 else
25 printf ( ’ S=0 \n ’ )
26 end
27 if S >0 then
28
Figure 6.6: SUBTRACTION OF TWO NUMBERS
28 printf ( ’ Z=0 \n ’ )
29 else
30 printf ( ’ Z=1 \n ’ )
31 end
1 // p a g e no 185
2 // e x a m p l e no 6 . 7
3 //PERFORMING LOGICAL OPERATIONS .
4 // r e g i s t e r B h o l d s 93H . B i n a r y o f 93H i s 1 0 0 1 0 0 1 1
5 // r e g i s t e r A h o l d s 15H . B i n a r y o f 15H i s 0 0 0 1 0 1 0 1 .
6 clc ;
7 B =[1 0 0 1 0 0 1 1]; // t a k i n g t h e v a l u e o f A i n
m a t r i x form .
8 A =[0 0 0 1 0 1 0 1]; // t a k i n g t h e v a l u e o f B i n
m a t r i x form .
9 Y = bitor (A , B ) ; // g e t t i n g OR o f A & B
10 printf ( ’OR o f A & B i s ’ )
11 disp ( Y ) ;
12 if Y (1 ,1) ==1 then
13 printf ( ’ S=1 \n ’ ) ;
14 else
15 printf ( ’ S=0 \n ’ ) ;
29
16 end
17 if Y ==0 then
18 printf ( ’ Z=1 \n ’ ) ;
19 else
20 printf ( ’ Z=0 \n ’ ) ;
21 end
22 printf ( ’CY=0 \n ’ ) ;
23 R = bitxor (A , B ) ; // g e t t i n g XOR o f A & B
24 printf ( ’XOR o f A & B i s ’ )
25 disp ( R ) ;
26 if R (1 ,1) ==1 then
27 printf ( ’ S=1 \n ’ ) ;
28 else
29 printf ( ’ S=0 \n ’ ) ;
30 end
31 if R ==0 then
32 printf ( ’ Z=1 \n ’ ) ;
33 else
34 printf ( ’ Z=0 \n ’ ) ;
35 end
36 printf ( ’CY=0 \n ’ ) ;
37 K = bitcmp (A ,1) ; // g e t t i n g t h e c o m p l i m e n t o f A
38 printf ( ’ Compliment o f A i s : \n ’ ) ;
39 disp ( K ) ;
1 // p a g e no 186
2 // e x a m p l e no 6 . 8
3 //KEEPING THE RADIO ON.
4 // t o k e e p t h e r a d i o on w i t h o u t a f f e c t i n g t h e o t h e r
a p p l i a n c e s , t h e D4 b i t s h o u l d a l w a y s be 1
5 // a s s u m i n g an i n p u t i n p u t b i n a r y 1 0 1 0 1 0 1 0
30
Figure 6.7: PERFORMING LOGICAL OPERATIONS
6 clc ;
7 A =[1 0 1 0 1 0 1 0];
8 B =[0 0 0 1 0 0 0 0];
9 Y = bitor (A , B ) ; // ORing i n p u t (A) w i t h B t o k e e p t h e
D4 b i t a l w a y s s e t
10 disp ( Y ) ;
11 printf ( ’ D4 b i t w i l l a l w a y s be one w i t h o u t a f f e c t i n g
the o t h e r b i t s ’ );
31
Figure 6.9: TURN OFF THE AIR CONDITIONER
1 // p a g e no 187
2 // e x a m p l e no 6 . 9
3 //TURN OFF THE AIR CONDITIONER .
4 // t o t u r n OFF t h e a i r c o n d i t i o n e r , r e s e t b i t D7
5 // Assuming t h e same i n p u t a s e a r l i e r a s i t i s a
c o n t i n u a t i o n o f p r e v i o u s example .
6 clc ;
7 A =[1 0 1 0 1 0 1 0];
8 B =[0 1 1 1 1 1 1 1];
9 Y = bitand (A , B ) ; // ANDing i n p u t (A) w i t h B t o k e e p t h e
D4 b i t a l w a y s s e t
10 disp ( Y ) ;
11 printf ( ’ D7 b i t w i l l a l w a y s be z e r o w i t h o u t a f f e c t i n g
the o t h e r b i t s ’ );
32
Chapter 7
1 // p a g e no 216
2 // e x a m p l e no 7 . 1
3 //STEPS TO ADD 10 BYTES OF DATA.
4 clc ;
5 disp ( ’ The m i c r i p r o c e s s o r n e e d s : ’ ) ;
6 disp ( ’ a c o u n t e r t o c o u n t 10 d a t a b y t e s ’ ) ;
7 disp ( ’ an i n d e x o r a memory p o i n t e r t o l o c a t e where
data b y t e s a r e s t o r e d ’ );
8 disp ( ’ t o t r a n s f e r d a t a from a memory l o c a t i o n t o t h e
m i c r o p r o c e s s o r ’ );
9 disp ( ’ t o p e r f o r m a d d i t i o n ’ ) ;
10 disp ( ’ r e g i s t e r s f o r t e m p o r a r y s t o r a g e o f p a r t i a l
answers ’ );
11 disp ( ’ a f l a g t o i n d i c a t e t h e c o m p l e t i o n o f t h e t a s k ’
);
12 disp ( ’ t o s t o r e o r o u t p u t t h e r e s u l t ’ ) ;
33
Figure 7.1: STEPS TO ADD 10 BYTES OF DATA
1 // p a g e no 219
2 // e x a m p l e no 7 . 2
3 //LOADING 16−BIT NUMBER.
4 // w o r k i n g o f LXI i n s t r u c t i o n .
5 clc ;
6 disp ( ’ LXI H, 2 0 5 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
7 disp ( ’ L=50H ’ ) ; // 50H i n L r e g i s t e r .
8 disp ( ’H=20H ’ ) ; // 20H i n H r e g i s t e r p a i r .
9 disp ( ’ LXI i n s t r u c t i o n t a k e s 3 b y t e s o f memory and 10
clock periods . ’)
10 // w o r k i n g o f MVI i n s t r u c t i o n .
11 disp ( ’MVI H, 2 0H ’ ) ;
12 disp ( ’H=20H ’ ) ; // l o a d 20H i n r e g i s t e r H .
13 disp ( ’MVI L , 5 0H ’ ) ; // l o a d 50H i n r e g i s t e r L .
14 disp ( ’ L=50H ’ ) ;
34
Figure 7.2: LOADING 16 BIT NUMBER
1 // p a g e no 220
2 // e x a m p l e no 7 . 3
3 // TRANSFER OF DATA BYTES TO ACCUMULATOR.
4 // Memory l o c a t i o n 2 0 5 0H h a s t h e d a t a F7H .
5 clc ;
6
7 // u s i n g MOV i n s t r u c t i o n .
8 // i n d i r e c t a d d r e s s i n g mode .
9 disp ( ’ LXI H, 2 0 5 0H ’ ) ;
35
10 printf ( ’H=20H L=50H \n \n ’ ) ; // t h e 16− b i t a d d r e s s
o f t h e d a t a i s l o a d e d i n HL r e g i s t e r p a i r .
11 M = hex2dec ([ ’ F7 ’ ]) ; // M i s t h e memory l o c a t i o n
p o i n t e r o f a d d r e s s 2 0 5 0H .
12 printf ( ’MOV A,M \n ’ ) ;
13 A = dec2hex ( M ) ;
14 printf ( ’A= ’ ) ;
15 disp ( A ) ; // t h e c o n t e n t s o f t h e HL r e g i s t e r p a i r a r e
u s e d a s memory p o i n t e r t o t h e l o c a t i o n 2 0 5 0H .
16
17 // u s i n g LDAX i n s t r u c t i o n .
18 // i n d i r e c t a d d r e s s i n g mode .
19 disp ( ’ LXI B, 2 0 5 0H ’ ) ;
20 printf ( ’B=20H C=50H \n \n ’ ) ; // t h e 16− b i t a d d r e s s
o f t h e d a t a i s l o a d e d i n BC r e g i s t e r p a i r .
21 M = hex2dec ([ ’ F7 ’ ]) ; // M i s t h e memory l o c a t i o n
p o i n t e r o f a d d r e s s 2 0 5 0H .
22 printf ( ’LDAX B \n ’ ) ;
23 A = dec2hex ( M ) ;
24 printf ( ’A= ’ ) ;
25 disp ( A ) ; // t h e c o n t e n t s o f t h e BC r e g i s t e r p a i r a r e
u s e d a s memory p o i n t e r t o t h e l o c a t i o n 2 0 5 0H .
26
27 // u s i n g LDA i n s t r u c t i o n .
28 // d i r e c t a d d r e s s i n g mode .
29 printf ( ’ \n LDA 2 0 5 0H \n ’ ) ; // d i r e c t l y s e n d s t h e d a t a
o f memory l o c a t i o n 2 0 5 0H t o a c c u m u l a t o r .
30 printf ( ’A= ’ ) ;
31 disp ( A ) ;
1 // p a g e no 222
36
Figure 7.3: TRANSFER OF DATA BYTES TO ACCUMULATOR
2 // e x a m p l e no 7 . 4
3 // USE OF ADDRESSING MODES.
4 clc ;
5 // r e g i s t e r B c o n t a i n s 32H
6 B =32;
7
8 // u s i n g i n d i r e c t a d d r e s s i n g modes
9 printf ( ’B= %d \n ’ ,B ) ;
10 disp ( ’ 1 ) LXI H, 8 0 0 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
11 disp ( ’H=80H L=00H ’ ) ;
12 disp ( ’MOV M, B ’ ) ; // c o n t e n t s o f r e g i s t e r B a r e moved
i n memory l o c a t i o n p o i n t e d by HL r e g i s t e r p a i r .
13 M = B ;
14 printf ( ’ \n 8 0 0 0H −−> %d \n \n ’ ,M ) ;
15
16 disp ( ’ LXI D, 8 0 0 0H ’ ) ; // l o a d s t h e memory l o c a t i o n
8 0 0 0H i n DE r e g i s t e r p a i r .
17 disp ( ’D=80H E=00H ’ ) ;
18 disp ( ’MOV A, B ’ ) ;
37
19 A = B ;
20 printf ( ’A= %d \n ’ ,A ) ;
21 disp ( ’STAX D ’ ) ; // s t o r e sthe value of accumulator in
t h e memory l o c a t i o n p o i n t e r by DE r e g i s t e r p a i r .
22 printf ( ’ \n 8 0 0 0H −−> %d \n \n ’ ,A ) ;
23
24 // u s i n g d i r e c t a d d r e s s i n g mode .
25 disp ( ’ 2 ) A= F2H ’ ) ;
26 disp ( ’STA 8 0 0 0H ’ ) ; // t h i s i n s t r u c t i o n s t o r e s t h e
v a l u e o f a c c u m u l a t o r i n t h e memory l o c a t i o n 8 0 0 0H
.
27 disp ( ’ 8 0 0 0H −−> F2H ’ ) ;
28
29 // u s i n g i n d i r e c t a d d r e s s i n g mode .
30 disp ( ’ 3 ) LXI H, 8 0 0 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
31 disp ( ’H=80H L=00H ’ ) ;
32 disp ( ’MVI M, F2H ’ ) ; // moving t h e d a t a i n t h e memory .
33 disp ( ’ 8 0 0 0H −−> F2H ’ ) ;
1 // p a g e no 224
2 // e x a m p l e no 7 . 5
3 // INCREMENT A NUMBER.
4 clc ;
5 disp ( ’ LXI B, 2 0 5 0H ’ ) ; // l o a d s t h e d a t a 2 0 5 0H i n BC
register pair .
6 disp ( ’B=20H C=50H ’ ) ;
7 B =20;
8 C =50;
9 disp ( ’ INX B ’ ) ;
38
Figure 7.4: USE OF ADDRESSING MODES
39
Figure 7.6: INCREMENT A NUMBER
10 C = C +1;
11 printf ( ’B= %d C= %d \n ’ ,B , C ) ;
12 disp ( ’ The c o n t e n t s o f BC r e g i s t e r p a i r w i l l be 2 0 5 1H
’ );
13 disp ( ’ INR B ’ ) ;
14 B = B +1;
15 printf ( ’B= %d \n ’ ,B ) ;
16 disp ( ’ INR C ’ ) ;
17 C =50;
18 C = C +1;
19 printf ( ’C= %d \n ’ ,C ) ;
20 disp ( ’ The c o n t e n t s o f BC r e g i s t e r p a i r w i l l be 2 1 5 1H
’ );
40
Scilab code Exa 7.6 ARITHEMETIC OPERATIONS
1 // p a g e no 228
2 // e x a m p l e no 7 . 6
3 // ARITHEMETIC OPERATIONS .
4 clc ;
5 disp ( ’A−−>30H ’ ) ;
6 disp ( ’ 2 0 4 0H−−>68H ’ ) ;
7 disp ( ’ 2 0 4 1H−−>7FH ’ ) ;
8 disp ( ’ LXI H, 2 0 4 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
9 disp ( ’H=20H L=40H M=68H ’ ) ;
10 disp ( ’ADD M’ ) ;
11 A = hex2dec ([ ’ 30 ’ ]) ;
12 M = hex2dec ([ ’ 68 ’ ]) ;
13 S = A + M ; // a d d s t h e c o n t e n t s o f A and d a t a a t memory
l o c a t i o n 2 0 4 0H .
14 s = dec2hex ( S ) ;
15 printf ( ’ \n C o n t e n t o f A a f t e r a d d i t i o n w i t h 2 0 4 0H= ’
);
16 disp ( s ) ;
17 disp ( ’ INX H ’ ) ; // t a k e s t h e program t o t h e n e x t
memory l o c a t i o n .
18 disp ( ’H=20H L=41H M=7FH ’ ) ;
19 disp ( ’SUB M’ ) ;
20 M = hex2dec ([ ’ 7F ’ ]) ;
21 D =S - M ; // s u b t r a c t s t h e c o n t e n t s o f A from t h e d a t a
a t memory l o c a t i o n 2 0 4 1H .
22 d = dec2hex ( D ) ;
23 printf ( ’ \n C o n t e n t o f A a f t e r s u b t r a c t i o n w i t h 2 0 4 1H
= ’ );
24 disp ( d ) ;
41
Figure 7.7: ARITHEMETIC OPERATIONS
42
1 // p a g e no 229
2 // e x a m p l e no 7 . 7
3 // INCREMENT & DECREMENT.
4 clc ;
5 disp ( ’ LXI H, 2 0 4 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
6 disp ( ’H=20H L=40H ’ ) ;
7 disp ( ’MVI M, 5 9H ’ ) ;
8 M =59;
9 M = hex2dec ([ ’ 59 ’ ]) ;
10 disp ( ’ 2 0 4 0H−−>59H ’ )
11 disp ( ’ INR M’ ) ;
12 M = M +1; // i n c r e m e n t s t h e v a l u e a t t h e memory
l o c a t i o n by 1 .
13 m = dec2hex ( M ) ;
14 printf ( ’ \n C o n t e n t o f 2 0 4 0H a f t e r i n c r e m e n t= ’ ) ;
15 disp ( m ) ;
16 disp ( ’ INX H ’ ) ; // t a k e s t h e program t o t h e n e x t
memory l o c a t i o n .
17 disp ( ’H=20H L=41H ’ ) ;
18 disp ( ’MVI M, 9 0H ’ ) ;
19 M =90;
20 M = hex2dec ([ ’ 90 ’ ]) ;
21 disp ( ’ 2 0 4 1H−−>90H ’ ) ;
22 disp ( ’DCR M’ ) ;
23 M =M -1; // d e c r e m e n t s t h e v a l u e a t t h e memory l o c a t i o n
by 1 .
24 m = dec2hex ( M ) ;
25 printf ( ’ \n C o n t e n t o f 2 0 4 1H a f t e r d e c r e m e n t= ’ ) ;
26 disp ( m ) ;
1 // p a g e no 233
43
Figure 7.8: INCREMENT AND DECREMENT
44
2 // e x a m p l e no 7 . 8
3 // LEFT ROTATION (RLC) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= AAH \n ’ ) ;
7 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
8 printf ( ’ 1 0 1 0 1 0 1 0 =AAH \n \n ’ ) ;
9 printf ( ’CY= 0 \n \n ’ ) ;
10 printf ( ’RLC \n \n ’ ) ;
11 printf ( ’CY= 1 \n \n ’ ) ;
12 // c a r r y f l a g i s s e t b e c a u s e D7 b i t was 1 .
13 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
14 printf ( ’ 0 1 0 1 0 1 0 1 =55H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f f i r s t RLC .
15 // RLC i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g a s w e l l
a s i n D0 b i t .
16 printf ( ’RLC \n \n ’ ) ;
17 printf ( ’CY= 0 \n \n ’ ) ;
18 // c a r r y f l a g i s r e s e t b e c a u s e D7 b i t was 0 .
19 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
20 printf ( ’ 1 0 1 0 1 0 1 0 =AAH \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f s e c o n d RLC .
21 // RLC i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g a s w e l l
a s i n D0 b i t .
1 // p a g e no 234
2 // e x a m p l e no 7 . 9
3 // LEFT ROTATION (RAL) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= AAH \n ’ ) ;
45
Figure 7.9: LEFT ROTATION RLC OF BITS
7 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
8 printf ( ’ 1 0 1 0 1 0 1 0 =AAH \n \n ’ ) ;
9 printf ( ’CY= 0 \n \n ’ ) ;
10 printf ( ’RAL \n \n ’ ) ;
11 printf ( ’CY= 1 \n \n ’ ) ;
12 // c a r r y f l a g i s s e t b e c a u s e D7 b i t was 1 .
13 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
14 printf ( ’ 0 1 0 1 0 1 0 0 =54H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f f i r s t RAL .
15 // RAL i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D0 b i t .
16 printf ( ’RAL \n \n ’ ) ;
17 printf ( ’CY= 0 \n \n ’ ) ;
18 // c a r r y f l a g i s r e s e t b e c a u s e D7 b i t was 0 .
19 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
20 printf ( ’ 1 0 1 0 1 0 0 1 =A9H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f s e c o n d RAL .
46
Figure 7.10: LEFT ROTATION RAL OF BITS
21 // RAL i n s t r u c t i o n p l a c e s D7 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D0 b i t .
Scilab code Exa 7.10 RIGHT ROTATION RRC AND RAR OF BITS
1 // p a g e no 235
2 // e x a m p l e no 7 . 1 0
3 // RIGHT ROTATION (RRC & RAR) OF BITS .
4 clc ;
5 // i n i t i a l l y
6 printf ( ’ A c c u m u l a t o r= 81H \n ’ ) ;
7 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
8 printf ( ’ 1 0 0 0 0 0 0 1 =81H \n \n ’ ) ;
9 printf ( ’CY= 0 \n \n ’ ) ;
47
10 printf ( ’RRC \n \n ’ ) ;
11 printf ( ’CY= 1 \n \n ’ ) ;
12 // c a r r y f l a g i s s e t b e c a u s e D0 b i t was 1 .
13 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
14 printf ( ’ 1 1 0 0 0 0 0 0 =C0H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f RRC.
15 // RRC i n s t r u c t i o n p l a c e s D0 b i t i n CY f l a g a s w e l l
a s i n D7 b i t .
16
17
18
19 // i n i t i a l l y
20 printf ( ’ A c c u m u l a t o r= 81H \n ’ ) ;
21 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
22 printf ( ’ 1 0 0 0 0 0 0 1 =81H \n \n ’ ) ;
23 printf ( ’CY= 0 \n \n ’ ) ;
24 printf ( ’RAR \n \n ’ ) ;
25 printf ( ’CY= 1 \n \n ’ ) ;
26 // c a r r y f l a g i s s e t b e c a u s e D0 b i t was 1 .
27 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
28 printf ( ’ 0 1 0 0 0 0 0 0 =40H \n \n ’ ) ; //
a f t e r t h e e x e c u t u i o n o f RAR.
29 // RAR i n s t r u c t i o n p l a c e s D0 b i t i n CY f l a g & CY
f l a g s b i t i s s e n d t o D7 b i t .
1 // p a g e no 241
2 // e x a m p l e no 7 . 1 1
3 // COMPARISION OF DATA.
4 clc ;
5 disp ( ’MVI A, 6 4H ’ ) ; // l o a d s a c c u m u l a t o r w i t h 64H .
6 disp ( ’A−−>64H ’ ) ;
48
Figure 7.11: RIGHT ROTATION RRC AND RAR OF BITS
49
7 disp ( ’ LXI H, 2 0 5 0H ’ ) ; // l o a d s HL r e g i s t e r p a i r .
8 disp ( ’H=20H L=50H ’ ) ;
9 disp ( ’M−−>9AH ’ ) ; // assumed i n t h e s o l u t i o n .
10 disp ( ’CMP M’ ) ;
11 // t h i s command c o m p a r e s t h e c o n t e n t s o f A w i t h M by
s u b t r a c t i n g M from A .
12 A = hex2dec ([ ’ 64 ’ ]) ;
13 // r e g i s t e r M h a s 9AH. F i n d i n g 2 ’ s c o m p l i m e n t o f 9AH.
14 M = hex2dec ([ ’ 9A ’ ]) ;
15 a = dec2bin ( A ) ;
16 m = dec2bin ( M ) ;
17 t = isequalbitwise (a , m ) ; // c o m p a r e s t h e two d a t a s
bitwise .
18 if ( A == M ) // Jump c o n d i t i o n
19 printf ( ’ \n R e s u l t a f t e r c o m p a r i s i o n i s = ’ ) ;
20 printf ( ’OUT1 ’ ) ;
21 else
22 printf ( ’ \n R e s u l t a f t e r c o m p a r i s i o n i s = ’ ) ;
23 disp ( t ) ; // t h i s shows t h e f a l s e c o n d i t i o n o f t h e
bitwise comparision .
50
Figure 7.12: COMPARISION OF DATA
51
Chapter 9
1 // p a g e no 283
2 // e x a m p l e no 9 . 1
3 // PUSH POP AND DELAY INSTRUCTIONS
4 clc ;
5 printf ( ’ LXI SP , 2 0 9 9H \n \n ’ ) ; // t h e s t a c k pointer
i s l o c a t e d a t 2 0 9 9H .
6 printf ( ’ LXI H, 4 2 F2H \n ’ ) ;
7 printf ( ’H−−> 42 L−−>F2 \n \n ’ ) ;
8 printf ( ’PUSH H \n ’ ) ; // s e n d s t h e d a t a o f HL
r e g i s t e r pair in the stack .
9 // s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 2 0 9 8H and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 2 0 9 8H
10 printf ( ’ 2 0 9 8H−−> 42 \n ’ ) ;
11 // s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 2 0 9 7
H and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 2 0 9 7H
12 printf ( ’ 2 0 9 7H−−> F2 \n \n ’ ) ;
13 printf ( ’ D e l a y C o u n t e r \n \n ’ ) ;
14
15
52
Figure 9.1: PUSH POP AND DELAY INSTRUCTIONS
16 n = hex2dec ([ ’ 42 F2 ’ ]) ;
17 for i =1: n // DELAY LOOP
18 {
19 }
20 end
21
22 printf ( ’ POP H \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
back t o t h e HL r e g i s t e r p a i r .
23 // t h e c o n t e n t s o f t h e t o p o f t h e s t a c k a r e c o p i e d
t o L r e g i s t e r and t h e s t a c k p o i n t e r i s
i n c r e m e n t e d by one t o 2 0 9 8H
24 printf ( ’ L−−> F2H \n ’ ) ;
25 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o H r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 2 0 9 9H .
26 printf ( ’H−−> 42H \n ’ ) ;
53
1 // p a g e no 285
2 // e x a m p l e no 9 . 2
3 // EXCHANGE OF DATA USING STACK .
4 clc ;
5 printf ( ’ LXI SP , 2 4 0 0H \n \n ’ ) ; // t h e s t a c k pointer
i s l o c a t e d a t 2 4 0 0H .
6 printf ( ’ LXI H, 2 1 5 0H \n ’ ) ;
7 printf ( ’H−−> 21 L−−>50 \n \n ’ ) ;
8 printf ( ’ LXI B, 2 2 8 0H \n ’ ) ;
9 printf ( ’B−−> 22 C−−>80 \n \n ’ ) ;
10 printf ( ’PUSH H \n ’ ) ; // s e n d s t h e d a t a o f HL
r e g i s t e r pair in the stack .
11 // s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FFH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FFH
12 printf ( ’ 23FFH−−> 21 \n ’ ) ;
13 // s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FEH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 23FEH
14 printf ( ’ 23FEH−−> 50 \n \n ’ ) ;
15 printf ( ’PUSH B \n ’ ) ; // s e n d s t h e d a t a o f BC
r e g i s t e r pair in the stack .
16 // s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FDH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FDH
17 printf ( ’ 23FDH−−> 22 \n ’ ) ;
18 // s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FCH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
t o memory l o c a t i o n 23FCH
19 printf ( ’ 23FCH−−> 80 \n \n ’ ) ;
20 printf ( ’PUSH PSW \n ’ ) ; // s e n d s t h e d a t a o f
accumulator & f l a g r e g i s t e r in the stack .
21 // s t a c k p o i n t e r i s d e c r e m e n t e d by one t o 23FBH and
the contents of the H r e g i s t e r are copied to
memory l o c a t i o n 23FBH
22 printf ( ’ 23FBH−−> c o n t e n t s o f a c c u m u l a t o r \n ’ ) ;
23 // s t a c k p o i n t e r i s a g a i n d e c r e m e n t e d by one t o 23
FAH and t h e c o n t e n t s o f t h e L r e g i s t e r a r e c o p i e d
54
t o memory l o c a t i o n 23FAH
24 printf ( ’ 23FAH−−> c o n t e n t s o f f l a g r e g i s t e r \n \n ’ ) ;
25
26 printf ( ’ To e x c h a n g e t h e d a t a . \n \n ’ )
27 printf ( ’ POP PSW \n ’ ) ; // s e n d s t h e d a t a i n t h e
s t a c k back t o t h e a c c u m u l a t o r & f l a g r e g i s t e r .
28 // t h e c o n t e n t s o f t h e t o p o f t h e s t a c k a r e c o p i e d
t o A r e g i s t e r and t h e s t a c k p o i n t e r i s
i n c r e m e n t e d by one t o 23FBH
29 printf ( ’A−−> c o n t e n t s o f a c c u m u l a t o r \n ’ ) ;
30 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o f l a g r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 23FCH .
31 printf ( ’ F−−> c o n t e n t s o f f l a g r e g i s t e r \n \n ’ ) ;
32 printf ( ’ POP H \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
back t o t h e HL r e g i s t e r p a i r .
33 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f t h e s t a c k
a r e c o p i e d t o L r e g i s t e r and t h e s t a c k p o i n t e r
i s i n c r e m e n t e d by one t o 23FDH
34 printf ( ’ L−−> 80H \n ’ ) ;
35 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o H r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 23FEH .
36 printf ( ’H−−> 22H \n \n ’ ) ;
37 printf ( ’ POP B \n ’ ) ; // s e n d s t h e d a t a i n t h e s t a c k
back t o t h e BC r e g i s t e r p a i r .
38 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f t h e s t a c k
a r e c o p i e d t o C r e g i s t e r and t h e s t a c k p o i n t e r
i s i n c r e m e n t e d by one t o 23FFH
39 printf ( ’C−−> 50H \n ’ ) ;
40 // t h e c o n t e n t s o f t h e c u r r e n t l o c a t i o n o f s t a c k a r e
c o p i e d t o B r e g i s t e r and t h e s t a c k p o i n t e r i s
a g a i n i n c r e m e n t e d by one t o 2 4 0 0H .
41 printf ( ’B−−> 21H \n ’ ) ;
55
Figure 9.2: EXCHANGE OF DATA USING STACK
56
Figure 9.3: EXCHANGE INFORMATION BETWEEN STACK AND PRO-
GRAM COUNTER
Scilab code Exa 9.3 EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM COUNTER
1 // p a g e no 292
2 // e x a m p l e no 9 . 3
3 // EXCHANGE INFORMATION BETWEEN STACK AND PROGRAM
COUNTER
4 clc ;
5 printf ( ’ A f t e r t h e CALL i n s t r u c t i o n \n \n ’ ) ;
6 printf ( ’STACK MEMORY: \n \n ’ ) ;
7 printf ( ’ 23FFH−−> 20 \n ’ ) ;
8 printf ( ’ 23FEH−−>43 \n ’ ) ;
9 printf ( ’ S t a c k p o i n t e r −−> 23FEH \n ’ ) ;
10 printf ( ’ Program c o u n t e r −−> 2 0 7 0H \n \n ’ ) ;
11 printf ( ’ A f t e r RET i n s t r u c t i o n \n \n ’ ) ;
12 printf ( ’ Program c o u n t e r −−> 2 0 4 3H \n ’ ) ;
13 printf ( ’ S t a c k p o i n t e r −−> 2 4 0 0H ’ ) ;
57
Chapter 10
1 // p a g e no 310
2 // e x a m p l e 1 0 . 1
3 // BCD TO BINARY
4 // BCD i n t o i t s b i n a r y e q u i v a l e n t .
5 // g i v e n BCD no i s 72
6 clc ;
7 a =72;
8 x = modulo (a ,10) ; // s e p e r a t i n g t h e u n i t s d i g i t
9 printf ( ’ Unpacked BCD1 ’ )
10 disp ( dec2bin (x ,8) ) ;
11 a = a /10; // s e p e r a t i n g t h e t e n s p l a c e
digit
12 a = floor ( a ) ;
13 printf ( ’ \n \n Unpacked BCD2 ’ ) ;
14 disp ( dec2bin (a ,8) ) ;
15 printf ( ’ \n \n M u l t i p l y BCD2 by 10 and add BCD1 ’ ) ;
58
Figure 10.1: BCD TO BINARY
1 // p a g e no 321
2 // e x a m p l e no 1 0 . 2
3 // ADDITION OF PACKED BCD NUMBERS
4 clc ;
5 a =77;
6 b =48;
7 x = modulo (a ,10) ;
8 y = modulo (b ,10) ;
9 z=x+y;
10 if z >9 then
11 f = z +6;
12
13 printf ( ’ A f t e r a d d i t i o n BCD1 i s : ’ )
14 disp ( dec2bin ( f ) ) ;
15 printf ( ’MSB o f t h i s s e q u e n c e i s t h e c a r r y
g e n e r a t e d a f t e r a d d i t i o n . \n \n ’ )
16 else
17 printf ( ’ A f t e r a d d i t i o n BCD1 i s : ’)
59
Figure 10.2: ADDITION OF PACKED BCD NUMBERS
18 disp ( z ) ;
19 end
20 x = a /10;
21 x = floor ( x ) ;
22 y = b /10;
23 y = floor ( y ) ;
24 z=x+y;
25 if z >9 then
26 f = z +6;
27 f = f +1; // t h i s 1 i s t h e c a r r y o f BCD1 .
28 printf ( ’ A f t e r a d d i t i o n BCD2 i s : ’ )
29 disp ( dec2bin ( f ) ) ;
30 printf ( ’MSB o f t h i s s e q u e n c e i s t h e c a r r y
generated after addition . ’)
31 else
32 printf ( ’ A f t e r a d d i t i o n BCD1 i s : ’ )
33 disp ( z ) ;
34 end
35 printf ( ’ \n \n BCD1 : 0 1 0 1 \n \n ’ ) ;
36 printf ( ’BCD2 : 0010 ’ )
60
Scilab code Exa 10.3 EXCHANGE OF DATA
1 // p a g e no 325
2 // e x a m p l e no 1 0 . 3
3 // EXCHANGE OF DATA
4 clc ;
5 printf ( ’ 2 0 5 0H−−> 3FH \n \n ’ ) ;
6 printf ( ’ 2 0 5 1H−−> 42H \n \n ’ ) ;
7 printf ( ’DE−−> 856FH \n ’ ) ;
8 printf ( ’D−−> 85H E−−> 6FH \n \n ’ ) ;
9 printf ( ’LHLD 2 0 5 0H \n ’ ) ; // l o a d s t h e HL r e g i s t e r
p a i r w i t h d a t a on 2 0 5 0H & 2 0 5 1H .
10 printf ( ’H−−> 42H L−−> 3FH \n \n ’ ) ;
11 printf ( ’XCHG \n ’ ) ; // e x c h a n g e t h e d a t a o f HL
r e g i s t e r p a i r w i t h DE r e g i s t e r p a i r .
12 printf ( ’D<−−>H E<−−>L \n ’ ) ;
13 printf ( ’D−−> 42H E−−> 3FH \n H−−> 85H L−−>
6FH \n \n ’ ) ;
14 printf ( ’SHLD 2 0 5 0H \n ’ ) ; // s t o r e s t h e 16 b i t d a t i n
HL r e g i s t e r p a i r on memory l o c a t i o n 2 0 5 1H & 2 0 5 0H
.
15 printf ( ’ 2 0 5 0H−−> 6FH \n ’ ) ;
16 printf ( ’ 2 0 5 1H−−> 85H ’ ) ;
1 // p a g e no 326
2 // e x a m l e no 1 0 . 4
3 // ADDITION OF TWO 16 BIT NUMBERS
4 clc ;
5 printf ( ’B−−> 27H C−−> 93H \n ’ ) ;
6 printf ( ’D−−> 31H E−−> 82H \n \n ’ ) ;
7 b = hex2dec ([ ’ 27 ’ ]) ;
61
Figure 10.3: EXCHANGE OF DATA
8 c = hex2dec ([ ’ 93 ’ ]) ;
9 d = hex2dec ([ ’ 31 ’ ]) ;
10 e = hex2dec ([ ’ 82 ’ ]) ;
11 printf ( ’MOV A, C \n \n ’ ) ;
12 a=c;
13 printf ( ’ADD E \n ’ ) ;
14 a=a+e;
15 Z =a -256;
16 X = dec2hex ( Z ) ;
17 printf ( ’ Sum = ’ )
18 disp ( X ) ;
19 if a >255 then
20 printf ( ’CY=1 \n \n ’ ) ;
21 CY =1;
22 else
23 printf ( ’CY=0 \n ’ ) ;
24 CY =0;
25 end
26 printf ( ’MOV L , A \n ’ ) ;
27 printf ( ’ L−−> ’ ) ;
62
28 disp ( X ) ;
29 printf ( ’ \n \n MOV A, B \n \n ’ ) ;
30 a = b ;
31 printf ( ’ADC D \n ’ ) ;
32 a = a + d + CY ; // CY i s added b e c a u s e o f t h e p r e v i o u s
c a r r y a s p e r t h e i n s t r u c t i o n s ADC ( add w i t h c a r r y
)
33 T = dec2hex ( a ) ;
34 printf ( ’ Sum = ’ )
35 disp ( T ) ;
36 if a >255 then
37 printf ( ’CY=1 \n \n ’ )
38 else
39 printf ( ’CY=0 \n \n ’ )
40 end
41 printf ( ’MOV H, A \n ’ ) ;
42 printf ( ’H−−> ’ ) ;
43 disp ( T ) ;
44 printf ( ’ \n \n SHLD 2 0 5 0H \n ’ ) ; // s t o r e s t h e
c o n t e n t s o f HL r e g i s t e r p a i r on memory l o c a t i o n s
2 0 5 1H & 2 0 5 0H .
45 printf ( ’ 2 0 5 0H−−> ’ ) ;
46 disp ( X ) ;
47 printf ( ’ 2 0 5 1H−−> ’ ) ;
48 disp ( T ) ;
1 // p a g e no 326
2 // e x a m l e no 1 0 . 5
3 // SUBTRACTION OF TWO 16 BIT NUMBERS
4 clc ;
5 printf ( ’B−−> 85H C−−> 38H \n ’ ) ;
63
Figure 10.4: ADDITION OF TWO 16 BIT NUMBERS
64
6 printf ( ’D−−> 62H E−−> A5H \n \n ’ ) ;
7 b = hex2dec ([ ’ 85 ’ ]) ;
8 c = hex2dec ([ ’ 38 ’ ]) ;
9 d = hex2dec ([ ’ 62 ’ ]) ;
10 e = hex2dec ([ ’ A5 ’ ]) ;
11 printf ( ’MOV A, C \n \n ’ ) ;
12 a=c;
13 printf ( ’SUB E \n ’ ) ;
14 a =a - e ;
15 Z = a +256;
16 X = dec2hex ( Z ) ;
17 printf ( ’ D i f f e r e n c e = ’ )
18 disp ( X ) ;
19 if a <0 then
20 printf ( ’ Borrow=1 \n \n ’ ) ;
21 B =1;
22 else
23 printf ( ’ Borrow=0 \n ’ )
24 B =0;
25 end
26 printf ( ’MOV C , A \n ’ ) ;
27 printf ( ’C−−> ’ ) ;
28 disp ( X ) ;
29 printf ( ’ \n \n MOV A, B \n \n ’ ) ;
30 a=b;
31 printf ( ’SBB D \n ’ ) ;
32 a =a -d - B ; // 1 i s s u b t r a c t e d b e c a u s e o f t h e p r e v i o u s
b o r r o w a s p e r t h e i n s t r u c t i o n s SBB ( s u b t r a c t w i t h
borrow )
33 T = dec2hex ( a ) ;
34 printf ( ’ D i f f e r e n c e = ’ )
35 disp ( T ) ;
36 if a <0 then
37 printf ( ’ Borrow=1 \n \n ’ )
38 else
39 printf ( ’ Borrow=0 \n \n ’ )
40 end
41 printf ( ’MOV B , A \n ’ ) ;
65
Figure 10.5: SUBTRACTION OF TWO 16 BIT NUMBERS
42 printf ( ’B−−> ’ ) ;
43 disp ( T ) ;
1 // p a g e no 327
2 // e x a m p l e no 1 0 . 6
3 // DISPLAY CONTENTS OF STACK
4 clc ;
5 printf ( ’ LXI H, 0 0 0 0H \n ’ ) ; // c l e a r s t h e HL
register pair
66
Figure 10.6: DISPLAY CONTENTS OF STACK
67
1 // p a g e no 327
2 // e x a m p l e no 1 0 . 7
3 // SUBROUTINE TO SET THE ZERO FLAG
4 clc ;
5 printf ( ’CHECK: PUSH H \n \n ’ ) ; // s e n d s t h e
c o n t e n t s o f H t o t h e l o c a t i o n p o i n t e d by t h e
stack pointer .
6 printf ( ’ MVI L , FFH \n ’ ) ;
7 l = hex2dec ([ ’ FF ’ ]) ;
8 l = dec2bin (l ,8) ;
9 printf ( ’ L−−> ’ ) ; // s e t a l l b i t s i n L t o
logic 1.
10 disp ( l ) ;
11 printf ( ’ \n \n PUSH PSW \n \n ’ ) ; // s a v e
f l a g s on t o p o f t h e s t a c k
12 printf ( ’ XTHL \n \n ’ ) ; // s e t a l l b i t s i n
the top s t a c k l o c a t i o n .
13 printf ( ’ POP PSW \n \n ’ ) ; // now t h e z e r o
flag is set .
14 printf ( ’ JZ NOEROR \n \n ’ ) ;
15 printf ( ’ JMP ERROR \n \n ’ ) ;
16 printf ( ’NOEROR: POP H \n \n ’ ) ; // r e t r i v e s t h e d a t a
from t h e s t a c k i n t o H i f z e r o f l a g i s s e t
17 printf ( ’ RET ’ ) ;
1 // p a g e no 328
2 // e x a m p l e no 1 0 . 8
3 // TRANSFER A PROGRAM TO AN ADDRESS IN HL REGISTER
4 clc ;
5 printf ( ’ \n \ nThe program can be t r a n s f e r e d u s i n g
Jump i n s t r u c t i o n . \n \n ’ ) ;
68
Figure 10.7: SUBROUTINE TO SET THE ZERO FLAG
69
Figure 10.8: TRANSFER A PROGRAM TO AN ADDRESS IN HL REG-
ISTER
70
Chapter 12
Interrupts
1 // p a g e no 374
2 // e x a m p l e no 1 2 . 1
3 // ENABLE INTERRUPTS
4 clc ;
5 printf ( ’ EI \n \n ’ ) ; // e n a b l e i n t e r r u p t s
6 printf ( ’MVI A, 0 8H \n ’ ) ;
7 a = hex2dec ([ ’ 8 ’ ]) ;
8 b = dec2bin (a ,8) ;
9 printf ( ’A−−> ’ )
10 disp ( b ) ;
11 printf ( ’ \n SIM \n \n ’ ) ; // e n a b l e RST 7 . 5 , 6 . 5 , and
5.5
12 printf ( ’ D3=1 SIM f u n c t i o n a l \n ’ ) ;
13 printf ( ’ D2=0 E n a b l e RST 7 . 5 \n ’ ) ;
14 printf ( ’ D1=0 E n a b l e RST 6 . 5 \n ’ ) ;
15 printf ( ’ D0=0 E n a b l e RST 5 . 5 \n ’ ) ;
71
Figure 12.1: ENABLE INTERRUPTS
1 // p a g e no 374
2 // e x a m p l e no 1 2 . 2
3 // RESET 7 . 5 INTERRUPT
4 clc ;
5 printf ( ’MVI A, 1 8H \n ’ ) ; // s e t D4=1
6 a = hex2dec ([ ’ 18 ’ ]) ;
7 b = dec2bin (a ,8) ;
8 printf ( ’A−−> ’ )
9 disp ( b ) ;
10 printf ( ’ \n \n SIM ’ ) ; // R e s e t 7 . 5 i n t e r r u p t
flip flop
1 // p a g e no 375
2 // e x a m p l e no 1 2 . 3
3 // CHECK PENDING INTERRUPT
72
Figure 12.2: RESET INTERRUPT
4 clc ;
5 printf ( ’RIM i n s t r u c t i o n i n t e r p r e t a t i o n \n \n ’ ) ;
6 printf ( ’ D7=SID S e r i a l input
d a t a i f any \n ’ ) ;
7 printf ( ’ D6 , D5 , D4= I 7 . 5 , I 6 . 5 , I 5 . 5 Pending
i n t e r r u p t s : 1= p e n d i n g \n ’ ) ;
8 printf ( ’ D3=IE Interrupt enable
f l a g : 1= e n a b l e d \n ’ ) ;
9 printf ( ’ D2 , D1 , D0= M7 . 5 , M6 . 5 , M5 . 5 I n t e r r u p t masks :
1= masked \n \n \n ’ ) ;
10
11
12 printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
13 printf ( ’ RIM \n ’ ) ; // Read
i n t e r r u p t mask
14 printf ( ’ MOV B , A \n ’ ) ; // s a v e mask
information
15 printf ( ’ ANI 20H \n ’ ) ; // c h e c k
w h e t h e r RST 6 . 5 i s p e n d i n g
16 printf ( ’ JNZ NEXT \n ’ ) ;
17 printf ( ’ EI \n ’ ) ;
18 printf ( ’ RET \n ’ ) ; // RST 6 . 5 i s
n o t p e n d i n g , r e t u r n t o main program
19 printf ( ’NEXT: MOV A, B \n ’ ) ; // g e t b i t
p a t t e r n ; RST 6 . 5 i s p e n d i n g
20 printf ( ’ ANI 0DH \n ’ ) ; // e n a b l e s RST
6 . 5 by s e t t i n g D1=0
73
Figure 12.3: CHECK PENDING INTERRUPT
74
Chapter 14
Programmable Interface
Devices
1 // p a g e no 414
2 // e x a m p l e no 1 4 . 1
3 // INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER
4 clc ;
5 printf ( ’MVI A, 0 1H \n ’ ) ; // S e t D0=1 , D1 t h r o u g h
D7 a r e don ’ t c a r e l i n e s .
6 a = hex2dec ([ ’ 1 ’ ]) ;
7 b = dec2bin (a ,8) ;
8 printf ( ’A−−> ’ )
9 disp ( b ) ;
10 printf ( ’ \n \n OUT FFH \n \n ’ ) ; // w r i t e i n t h e
control register .
11 printf ( ’MVI A, BYTE1 \n \n ’ ) ; // l o a d d a t a b y t e .
12 printf ( ’OUT FEH ’ ) ; // s e n d d a t a o u t .
75
Figure 14.1: INITIALIZE HYPOTHETICAL CHIP AS OUTPUT BUFFER
1 // p a g e no 420
2 // e x a m p l e no 1 4 . 2
3 // ADDRESS DETERMINATION OF GIVEN FIGURE
4 clc ;
5 printf ( ’ To s e l e c t t h e c h i p : \n \n ’ ) ;
6 printf ( ’ A15 A14 A13 A12 A11 \n ’ ) ;
7 printf ( ’ 0 0 0 1 0 \n \n ’ ) ;
8 printf ( ’ A15 , A14 Enable l i n e s o f 8205 \n ’
);
9 printf ( ’ A13 , A12 , A11 Input l o g i c to a c t i v a t e
t h e p u t p u t l i n e O4 o f t h e 8 2 0 5 \n \n ’ ) ;
10 printf ( ’ A15 , A14 , A13 , A12 , A11 = A7 , A6 , A5 , A4 , A3 , = 2H \
n \n ’ ) ;
11 printf ( ’AD2 AD1 AD0 = A d d r e s s P o r t s \n ’ ) ;
12 printf ( ’ 0 0 0 = 20H C o n t r o l o r s t a t u s
r e g i s t e r \n ’ ) ;
13 printf ( ’ 0 0 1 = 21H P o r t A \n ’ ) ;
14 printf ( ’ 0 1 0 = 22H P o r t B \n ’ ) ;
15 printf ( ’ 0 1 1 = 23H P o r t C \n ’ ) ;
16 printf ( ’ 1 0 0 = 24H Timer LSB \n ’ ) ;
17 printf ( ’ 1 0 1 = 25H Timer MSB \n \n ’ ) ;
18 printf ( ’ P o r t numbers i n g i v e n f i g u r e t h u s r a n g e from
20H−25H ’ ) ;
76
Figure 14.2: ADDRESS DETERMINATION OF GIVEN FIGURE
77
Chapter 15
General Purpose
Programmable Peripheral
Devices
Scilab code Exa 15.1 PORT ADDRESS CONTROL WORD ADDRESS AND READ THE DIP SWITCHES
1 // p a g e no 449
2 // e x a m p l e no 1 5 . 1
3 // PORT ADDRESS CONTROL WORD ADDRESS AND READ THE
DIP SWITCHES
4 clc ;
5 printf ( ’ 1 P o r t A d d r e s s \n \n ’ ) ;
6 printf ( ’ P o r t A = 8 0 0 0H ( A1=0 ,A0
=0) \n ’ ) ;
7 printf ( ’ P o r t B = 8 0 0 1H ( A1=0 ,A0
=1) \n ’ ) ;
8 printf ( ’ P o r t C = 8 0 0 2H ( A1=1 ,A0
=0) \n ’ ) ;
9 printf ( ’ C o n t r o l R e g i s t e r = 8 0 0 3H ( A1=1 ,A0
=1) \n \n ’ ) ;
10
11
12 printf ( ’ 2 C o n t r o l Word \n \n ’ ) ;
78
13 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
14 printf ( ’ 1 0 0 0 0 0 1 1 = 83H \n \n ’ )
;
15 printf ( ’ D7=1 I /O F u n c t i o n \n ’ ) ;
16 printf ( ’ D6 , D5=0 P o r t A i n Mode 0 \n ’ ) ;
17 printf ( ’ D4=0 P o r t A= o u t p u t \n ’ ) ;
18 printf ( ’ D3=0 P o r t C u p p e r= o u t p u t \n ’ ) ;
19 printf ( ’ D2=0 P o r t B i n Mode 0 \n ’ ) ;
20 printf ( ’ D1=1 P o r t B= i n p u t \n ’ ) ;
21 printf ( ’ D0=1 P o r t C1= i n p u t \n \n ’ ) ;
22
23
24 printf ( ’ 3 Program \n \n ’ ) ;
25 printf ( ’MVI A, 8 3H \n ’ ) ; // l o a d a c c u m u l a t o r w i t h
t h e c o n t r o l word .
26 printf ( ’STA 8 0 0 3H \n ’ ) ; // w r i t e word i n t h e
c o n t r o l r e g i s t e r to i n i t i a l i z e the ports .
27 printf ( ’LDA 8 0 0 1H \n ’ ) ; // r e a d s s w i t c h e s a t p o r t B
.
28 printf ( ’STA 8 0 0 0H \n ’ ) ; // d i s p l a y t h e r e a d i n g a t
port A.
29 printf ( ’LDA 8 0 0 2H \n ’ ) ; // r e a d s w i t c h e s a t p o r t C .
30 printf ( ’ ANI 0FH \n ’ ) ; // mask t h e u p p e r f o u r b i t s
o f port C, t h e s e b i t s are not input data .
31 printf ( ’RLC \n ’ ) ; // r o t a t e and p l a c e t h e
data i n the upper h a l f o f the accumulator .
32 printf ( ’RLC \n ’ ) ;
33 printf ( ’RLC \n ’ ) ;
34 printf ( ’RLC \n ’ ) ;
35 printf ( ’STA 8 0 0 2H \n ’ ) ; // d i s p l a y d a t a a t p o r t C
upper .
36 printf ( ’HLT \n ’ ) ;
79
Figure 15.1: PORT ADDRESS CONTROL WORD ADDRESS AND READ
THE DIP SWITCHES
80
Scilab code Exa 15.2 BSR CONTROL WORD SUBROUTINE
1 // p a g e no 453
2 // e x a m p l e no 1 5 . 2
3 // BSR CONTROL WORD SUBROUTINE
4 clc ;
5 printf ( ’BSR C o n t r o l Words \n \n ’ ) ;
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 0 0 0 1 1 1 1 = 0FH To
s e t b i t PC7 \n ’ ) ;
8 printf ( ’ 0 0 0 0 1 1 1 0 = 0EH To
r e s e t b i t PC7 \n ’ ) ;
9 printf ( ’ 0 0 0 0 0 1 1 1 = 07H To
s e t b i t PC3 \n ’ ) ;
10 printf ( ’ 0 0 0 0 0 1 1 0 = 06H To
r e s e t b i t PC3 \n \n ’ ) ;
11
12
13 printf ( ’ P o r t A d d r e s s \n \n ’ ) ;
14 printf ( ’ C o n t r o l R e g i s t e r A d d r e s s = 83H \n \n ’ ) ;
15
16
17 printf ( ’ S u b r o u t i n e \n \n ’ ) ;
18 printf ( ’MVI A, 0 FH \n ’ ) ; // l o a d b y t e i n
a c c u m u l a t o r t o s e t PC7
19 printf ( ’OUT 83H \n ’ ) ; // s e t PC7=1
20 printf ( ’MVI A, 0 7H \n ’ ) ; // l o a d b y t e i n
a c c u m u l a t o r t o s e t PC3 .
21 printf ( ’OUT 83H \n ’ ) ; // s e t PC3=1.
22 printf ( ’CALL DELAY \n ’ ) ; // t h i s i s a 10
microsec delay .
23 printf ( ’MVI A, 0 6H \n ’ ) ; // l o a d b y t e i n
a c c u m u l a t o r t o r e s e t PC3
24 printf ( ’OUT 83H \n ’ ) ; // r e s e t PC3
25 printf ( ’MVI A, 0 EH \n ’ ) ; // l o a d b y t e i n
a c c u m u l a t o r t o r e s e t PC7 .
26 printf ( ’OUT 83H \n ’ ) ; // r e s e t PC7
27 printf ( ’RET ’ ) ;
81
Figure 15.2: BSR CONTROL WORD SUBROUTINE
1 // p a g e no 483
2 // e x a m p l e no 1 5 . 3
3 // INSTRUCTIONS TO GENERATE A PULSE FROM COUNTER 0
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 0 0 1 0 1 0 0 = 14H \n \n ’ )
;
8 printf ( ’ D7 , D6=0 S e l e c t c o u n t e r 0 \n ’ ) ;
82
9 printf ( ’ D5 , D4=01 Load 8 b i t c o u n t \n ’ ) ;
10 printf ( ’ D3 , D2 , D1=010 Mode 2 \n ’ ) ;
11 printf ( ’ D0=0 B i n a r y Count \n \n ’ ) ;
12
13
14 printf ( ’ Count \n \n ’ ) ;
15 count =(50*10^ -6) /(0.5*10^ -6) ;
16 printf ( ’ Count= ’ ) ;
17 disp ( count ) ;
18 disp ( dec2hex ( count ) ) ;
19 printf ( ’ i n h e x a d e c i m a l \n \n ’ ) ;
20
21
22 printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
23 printf ( ’PULSE : \n ’ )
24 printf ( ’MVI A, 0 0 0 1 0 1 0 0B \n ’ ) ; // c o n t r o l word
mode 2 & c o u n t e r 0 .
25 printf ( ’OUT 83H \n ’ ) ; // w r i t e i n 8 2 5 4
control register .
26 printf ( ’MVI A, 6 4H \n ’ ) ; // low o r d e r b y t e
of the count .
27 printf ( ’OUT 80H \n ’ ) ; // l o a d c o u n t e r 0
w i t h low o r d e r b y t e
28 printf ( ’HLT ’ ) ;
Scilab code Exa 15.4 INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE FROM COUNTER 1
1 // p a g e no 484
2 // e x a m p l e no 1 5 . 4
3 // INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE FROM
COUNTER 1
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
83
Figure 15.3: INSTRUCTIONS TO GENERATE A PULSE FROM
COUNTER 0
84
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 1 1 1 0 1 1 0 = 76H \n \n ’ )
;
8 printf ( ’ D7 , D6=01 S e l e c t c o u n t e r 1 \n ’ ) ;
9 printf ( ’ D5 , D4=11 Load 16 b i t c o u n t \n ’ ) ;
10 printf ( ’ D3 , D2 , D1=011 Mode 3 \n ’ ) ;
11 printf ( ’ D0=0 B i n a r y Count \n \n ’ ) ;
12
13
14 printf ( ’ Count \n \n ’ ) ;
15 count =(1*10^ -3) /(0.5*10^ -6) ;
16 printf ( ’ Count= ’ ) ;
17 disp ( count ) ;
18 b = dec2hex (2000) ;
19 disp ( b ) ;
20 printf ( ’ i n h e x a d e c i m a l \n \n ’ ) ;
21
22
23 printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
24 printf ( ’SQWAVE: \n ’ ) ;
25 printf ( ’MVI A, 0 1 1 1 0 1 1 0B \n ’ ) ; // c o n t r o l word
mode 3 & c o u n t e r 1 .
26 printf ( ’OUT 83H \n ’ ) ; // w r i t e i n 8 2 5 4
control register .
27 printf ( ’MVI A, D0H \n ’ ) ; // low o r d e r b y t e
of the count .
28 printf ( ’OUT 81H \n ’ ) ; // l o a d c o u n t e r 1
w i t h low o r d e r b y t e .
29 printf ( ’MVI A, 0 7H \n ’ ) ; // h i g h o r d e r b y t e
of the count .
30 printf ( ’OUT 81H \n ’ ) ; // l o a d c o u n t e r 1
with high order byte
31 printf ( ’HLT ’ ) ;
85
Figure 15.4: INSTRUCTIONS TO GENERATE SQUARE WAVE PULSE
FROM COUNTER 1
86
Scilab code Exa 15.5 SUBROUTINE TO GENERATE AN INTERRUPT
1 // p a g e no 486
2 // e x a m p l e no 1 5 . 5
3 // SUBROUTINE TO GENERATE AN INTERRUPT
4 clc ;
5 printf ( ’ C o n t r o l Word \n \n ’ ) ;
6 printf ( ’ D7 D6 D5 D4 D3 D2 D1 D0 \n ’ ) ;
7 printf ( ’ 0 1 1 1 0 1 0 0 = 74H
C o u n t e r 1 \n ’ ) ;
8 printf ( ’ 1 0 0 1 0 1 0 0 = 94H
C o u n t e r 2 \n \n ’ ) ;
9 printf ( ’ D7 , D6 S e l e c t c o u n t e r 1 \n ’ ) ;
10 printf ( ’ D5 , D4 Load c o u n t \n ’ ) ;
11 printf ( ’ D3 , D2 , D1=010 Mode 2 \n ’ ) ;
12 printf ( ’ D0=0 B i n a r y Count \n \n ’ ) ;
13
14
15
16 printf ( ’ I n s t r u c t i o n s \n \n ’ ) ;
17 printf ( ’CNT1LO EQU 50H \n ’ ) ;
18 printf ( ’ CNT1HI EQU C3H \n ’ ) ;
19 printf ( ’COUNT2 EQU 40H \n ’ ) ;
20 printf ( ’SECOND MVI A, 0 1 1 1 0 1 0 0B \n ’ ) ; // c o n t r o l
word mode 2 & c o u n t e r 1 .
21 printf ( ’ OUT 83H \n ’ ) ; // w r i t e i n
8254 c o n t r o l r e g i s t e r .
22 printf ( ’ MVI A, 1 0 0 1 0 1 0 0B \n ’ ) ; // c o n t r o l
word mode 2 & c o u n t e r 2 .
23 printf ( ’ OUT 83H \n ’ ) ; // w r i t e i n
8254 c o n t r o l r e g i s t e r .
24 printf ( ’ MVI A, CNT1LO \n ’ ) ; // Low
o r d e r byte o f count 50000
25 printf ( ’ OUT 81H \n ’ ) ; // Load
c o u n t e r 1 w i t h low o r d e r b y t e
26 printf ( ’ MVI A, CNT1HI \n ’ ) ; // h i g h
order byte of count 50000.
27 printf ( ’ OUT 81H \n ’ ) ; // l o a d
87
Figure 15.5: SUBROUTINE TO GENERATE AN INTERRUPT
1 // p a g e no 493
88
2 // e x a m p l e no 1 5 . 6
3 // EXPLANATION OF INSTRUCTIONS
4 clc ;
5 printf ( ’ 1 ) DI i n s t r u c t i o n d i s a b l e s the i n t e r r u p t s . \
n \n ’ ) ;
6 printf ( ’ 2 ) Command word 76H s p e c i f i e s t h e f o l l o w i n g
p a r a m e t e r s \n ’ ) ;
7 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
8 printf ( ’ 0 1 1 1 0 1 1 0 =76H \n ’ ) ;
9 printf ( ’ A7 , A6 , A5 Low o r d e r a d d r e s s b i t s \n ’ ) ;
10 printf ( ’ A3 Edge t r i g g e r e d \n ’ ) ;
11 printf ( ’ A2 Call address interval i s four
l o c a t i o n s \n ’ ) ;
12 printf ( ’ A1 S i n g l e 8 2 5 9A \n \n ’ ) ;
13 printf ( ’ Low o r d e r b y t e o f t h e IR0 c a l l a d d r e s s \n ’ ) ;
14 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
15 printf ( ’ 0 1 1 0 0 0 0 0 =60H \n ’ ) ;
16 printf ( ’ The a d d r e s s b i t s A4−A0 a r e s u p p l i e d by 8 2 5 9A
. \n ’ ) ;
17 printf ( ’ S u b s e q u e n t a d d r e s s e s a r e f o u r l o c a t i o n s
a p a r t e g . IR1=64H ’ )
18 printf ( ’ 3 ) P o r t a d d r e s s o f t h e 8 2 5 9SA f o r ICW1 i s 80
H, A0 s h o u l d be a t \n l o g i c 0 & t h e o t h e r b i t s
a r e d e t e r m i n e d by t h e d e c o d e r . \n \n ’ ) ;
19 printf ( ’ 4 ) Command word ICW2 i s 20H . \n \n ’ ) ;
20 printf ( ’ 5 ) P o r t a d d r e s s o f ICW2 i s 81H, A0 s h o u l d be
at l o g i c 1 . ’ );
1 // p a g e no 502
2 // e x a m p l e no 1 5 . 8
3 // INITIALIZATION INSTRUCTIONS FOR DMA
89
Figure 15.6: EXPLANATION OF INSTRUCTIONS
4 clc ;
5 printf ( ’MVI A, 0 0 0 0 0 1 0 0B \n \n ’ ) ;
6 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
7 printf ( ’ 0 0 0 0 0 1 0 0 \n ’ ) ;
8 printf ( ’ A2=1 D i s a b l e DMA \n \n ’ ) ;
9 printf ( ’OUT 08H \n ’ ) ;
10 printf ( ’MVI A, 0 0 0 0 0 1 1 1B \n \n ’ ) ;
11 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
12 printf ( ’ 0 0 0 0 0 1 1 1 \n ’ ) ;
13 printf ( ’ A7 , A6=00 Demand mode \n ’ ) ;
14 printf ( ’ A5=0 I n c r e m e n t a d d r e s s \n ’ ) ;
15 printf ( ’ A4=0 D i s a b l e a u t o l o a d \n ’ ) ;
16 printf ( ’ A3 , A2=01 W r i t e \n ’ ) ;
17 printf ( ’ A1 , A0=11 Ch 3 \n \n ’ ) ;
18 printf ( ’OUT 0BH \n ’ ) ; // Send t o mode r e g
.
19 printf ( ’MVI A, 7 5H \n ’ ) ; // Low o r d e r b y t e
of starting address
20 printf ( ’OUT 06H \n ’ ) ; // Output t o CH3
90
memory a d d r e s s r e g .
21 printf ( ’MVI A, 4 0H \n ’ ) ; // High o r d e r b y t e
of starting address
22 printf ( ’OUT 06H \n ’ ) ; // Output t o CH3
memory a d d r e s s r e g .
23 printf ( ’MVI A, FFH \n ’ ) ; // Low o r d e r b y t e
o f t h e c o u n t 03FFH
24 printf ( ’OUT 07H \n ’ ) ; // Output t o CH3
count reg .
25 printf ( ’MVI A, 0 3H \n ’ ) ; // High o r d e r b y t e
o f t h e c o u n t 03FFH
26 printf ( ’OUT 07H \n ’ ) ; // Output t o CH3
count reg .
27 printf ( ’MVI A, 1 0 0 0 0 0 0 0B \n \n ’ ) ;
28 printf ( ’ A7 A6 A5 A4 A3 A2 A1 A0 \n ’ ) ;
29 printf ( ’ 1 0 0 0 0 0 0 0 \n ’ ) ;
30 printf ( ’ A7 , A6=10 DACK DREQ High \n ’ ) ;
31 printf ( ’ A5=0 L a t e w r i t e \n ’ ) ;
32 printf ( ’ A4=0 F i x e d p r i o r i t y \n ’ ) ;
33 printf ( ’ A3=0 Normal t i m e \n ’ ) ;
34 printf ( ’ A2=0 DMA e n a b l e \n ’ )
35 printf ( ’ A0=0 D i s a b l e mem t o mem \n \n ’ ) ;
36 printf ( ’OUT 08H \n ’ ) ;
91
Figure 15.7: INITIALIZATION INSTRUCTIONS FOR DMA
92
Chapter 19
1 // p a g e no 622
2 // e x a m p l e no A. 1
3 // BINARY INTO HEX AND OCTAL
4 clc ;
5 printf ( ’ B i n a r y no= 1 0 0 1 1 0 1 0 \n \n ’ ) ;
6 str = ’ 1 0 0 1 1 0 1 0 ’ ;
7 h = bin2dec ( str ) ;
8 H = dec2hex ( h ) ;
9 printf ( ’ Hex E q u i v a l e n t= ’ ) ;
10 disp ( H ) ;
11 O = dec2oct ( h ) ;
12 printf ( ’ \n O c t a l E q u i v a l e n t= ’ )
13 disp ( O ) ;
1 // p a g e no 623
93
Figure 19.1: BINARY INTO HEX AND OCTAL
2 // e x a m p l e no A. 2
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ Minuend : 52 \n ’ ) ;
6 printf ( ’ S u b t r a h e n d : 23 \n \n ’ )
7 printf ( ’BORROW METHOD \n \n ’ ) ;
8
9 m =5*10+2; // minuend
10 s =2*10+3; // s u b t r a h e n d
11 // t o s u b t r a c t 3 from 2 , 10 must be b o r r o w e d from
t h e s e c o n d p l a c e o f t h e minuend .
12
13 m =4*10+12;
14
15 sub =m - s ;
16 printf ( ’ S u b t r a c t i o n= ’ )
17 disp ( sub ) ;
18
19 printf ( ’ \n \n 10 s COMPLEMENT METHOD \n \n ’ ) ;
20
21 // 9 ’ s complement o f 23 i s
22
23 n =99 -23;
24 // add 1 t o t h e 9 ’ s complement t o f i n d t h e 1 0 ’ s
complement
25 t = n +1;
94
Figure 19.2: SUBTRACTION OF TWO NUMBERS
26 // add t h e 1 0 ’ s complement o f t h e s u b t r a h e n d ( 2 3 ) t o
minuend ( 5 2 ) t o s u b t r a c t 23 from 52
27 a=m+t;
28 // s u b t r a c t 100 from a t o c o m p e n s a t e f o r t h e 100
t h a t was added t o f i n d t h e 1 0 ’ s complement o f 23
29 sub =a -100;
30 printf ( ’ S u b t r a c t i o n= ’ ) ;
31 disp ( sub ) ;
1 // p a g e no 624
2 // e x a m p l e no A. 3
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ Minuend : 23 \n ’ ) ;
6 printf ( ’ S u b t r a h e n d : 52 \n \n ’ )
95
7 printf ( ’BORROW METHOD \n \n ’ ) ;
8
9 m =2*10+3; // minuend
10 s =5*10+2; // s u b t r a h e n d
11 // s u b t r a c t i o n o f t h e d i g i t s i n t h e f i r s t place
r e s u l t s in
12 a =3 -2;
13 // t o s u b t r a c t t h e d i g i t s i n t h e s e c o n d p l a c e a
b o r r o w i s r e q u i r e d from t h e t h i r d p l a c e . a s s u m i n g
1 at t h i r d place .
14
15 x =12 -5; // w i t h a b o r r o w e d 1 from t h e t h i r d p l a c e
16
17 sub =10* x + a ;
18 printf ( ’ S u b t r a c t i o n= ’ )
19 disp ( sub ) ;
20 printf ( ’ t h i s i s n e g a t i v e 2 9 , e x p r e s s e d i n 10 s
complement . \n n e g a t i v e s i g n i s v e r i f i e d by t h e
b o r r o w e d 1 from t h e t h i r d p l a c e . ’ ) ;
21
22 printf ( ’ \n \n 10 s COMPLEMENT METHOD \n \n ’ ) ;
23
24 // 9 ’ s complement o f 52 i s
25
26 n =99 -52;
27 // add 1 t o t h e 9 ’ s complement t o f i n d t h e 1 0 ’ s
complement
28 t = n +1;
29 // add t h e 1 0 ’ s complement o f t h e s u b t r a h e n d ( 2 3 ) t o
minuend ( 5 2 ) t o s u b t r a c t 23 from 52
30 a = m + t ;
31
32 printf ( ’ S u b t r a c t i o n= ’ ) ;
33 disp ( a ) ;
34 printf ( ’ t h i s i s n e g a t i v e 2 9 , e x p r e s s e d i n 10 s
complement ’ ) ;
96
Figure 19.3: SUBTRACTION OF TWO NUMBERS
1 // p a g e no 625
2 // e x a m p l e no A. 4
3 // 2 ’ s COMPLIMENT OF BINARY NUMBER
4 clc ;
5 printf ( ’ Given b i n a r y no= 0 0 0 1 1 1 0 0 \n \n ’ ) ;
6 str = ’ 0 0 0 1 1 1 0 0 ’
7 d = bin2dec ( str ) ;
8 x = bitcmp (d ,8) ;
9 s = x +1;
10 y = dec2bin ( s ) ;
11 printf ( ’ 2 s complement= ’ ) ;
12 disp ( y ) ;
97
Figure 19.4: 2s COMPLIMENT OF BINARY NUMBER
1 // p a g e no 626
2 // e x a m p l e no A. 5
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ S u b t r a h e n d= 32H \n ’ ) ;
6 printf ( ’ Minuend= 45H \n \n ’ ) ;
7 // f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 3 2H) ;
8 m = hex2dec ([ ’ 45 ’ ]) ;
9 x = hex2dec ([ ’ 32 ’ ]) ;
10 y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 32H
11 z = y +1; // 2 ’ s c o m p l i m e n t o f 32H
12 s=m+z;
13 f =s -256; // t o c o m p e n s a t e t h e e f f e c t o f 2 ’ s
compliment
14 e = dec2hex ( f ) ;
15 printf ( ’ S u b t r a c t i o n= ’ ) ;
16 disp ( e ) ;
98
Figure 19.5: SUBTRACTION OF TWO NUMBERS
1 // p a g e no 626
2 // e x a m p l e no A. 6
3 // SUBTRACTION OF TWO NUMBERS
4 clc ;
5 printf ( ’ S u b t r a h e n d= 45H \n ’ ) ;
6 printf ( ’ Minuend= 32H \n \n ’ ) ;
7 // f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 3 2H) ;
8 m = hex2dec ([ ’ 32 ’ ]) ;
9 x = hex2dec ([ ’ 45 ’ ]) ;
10 y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 32H
11 z = y +1; // 2 ’ s c o m p l i m e n t o f 32H
12 s=m+z;
13 r = dec2hex ( s ) ;
14 printf ( ’ S u b t r a c t i o n= ’ ) ;
15 disp ( r ) ;
16 printf ( ’ The r e s u l t i s n e g a t i v e & i t i s e x p r e s s e d i n
2 s complement . ’ )
1 // p a g e no 628
99
Figure 19.6: SUBTRACTION OF TWO NUMBERS
2 // e x a m p l e no A. 7
3 // SUBTRACTION OF UNSIGNED NUMBERS
4 clc ;
5 printf ( ’ P a r t a \n \n ’ )
6 printf ( ’ S u b t r a h e n d= 62H \n ’ ) ;
7 printf ( ’ Minuend= FAH \n \n ’ ) ;
8 // f i n d i n g 2 ’ s complement o f s u b t r a h e n d ( 6 2H) ;
9 m = hex2dec ([ ’FA ’ ]) ;
10 x = hex2dec ([ ’ 62 ’ ]) ;
11 y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f 62H
12 z = y +1; // 2 ’ s c o m p l i m e n t o f 62H
13 s=m+z;
14 f =s -256; // t o c o m p e n s a t e t h e e f f e c t o f 2 ’ s
compliment
15 e = dec2hex ( f ) ;
16 printf ( ’ S u b t r a c t i o n= ’ ) ;
17 disp ( e ) ;
18 printf ( ’ T h i s r e s u l t i s p o s i t i v e \n \n ’ ) ;
19
20
21 printf ( ’ P a r t b \n \n ’ )
22 printf ( ’ S u b t r a h e n d= FAH \n ’ ) ;
23 printf ( ’ Minuend= 62H \n \n ’ ) ;
24 // f i n d i n g 2 ’ s complement o f s u b t r a h e n d (FAH) ;
25 m = hex2dec ([ ’ 62 ’ ]) ;
26 x = hex2dec ([ ’FA ’ ]) ;
27 y = bitcmp (x ,8) ; // 1 ’ s c o m p l i m e n t o f FAH
28 z = y +1; // 2 ’ s c o m p l i m e n t o f FAH
100
Figure 19.7: SUBTRACTION OF UNSIGNED NUMBERS
29 s = m + z ;
30 r = dec2hex ( s ) ;
31 printf ( ’ S u b t r a c t i o n= ’ ) ;
32 disp ( r ) ;
33 printf ( ’ The r e s u l t i s n e g a t i v e & i t i s expressed in
2 s complement . ’ )
1 // p a g e no 629
2 // e x a m p l e no A. 8
3 // SUBTRACTION OF SIGNED NUMBERS
4 clc ;
5 printf ( ’ P a r t a \n \n ’ )
6 printf ( ’ Minuend= FAH \n \n ’ ) ;
7 printf ( ’ I t i s a n e g a t i v e no s i n c e D7= 1 f o r FAH,
101
t h i s must be r e p r e s e n t e d i n \ n 2 s c o m p l i m e n t form .
\n ’ ) ;
8 // f i n d i n g 2 ’ s complement o f s u b t r a h e n d (FAH) ;
9 m = hex2dec ([ ’FA ’ ]) ;
10 x = hex2dec ([ ’ 62 ’ ]) ;
11 y = bitcmp (m ,8) ; // 1 ’ s c o m p l i m e n t o f FAH
12 z = y +1; // 2 ’ s c o m p l i m e n t o f FAH
13 printf ( ’ 2 s c o m p l i m e n t o f minuend i s = ’ ) ;
14 disp ( z ) ;
15
16 printf ( ’ \n \n S u b t r a h e n d= 62H \n ’ ) ;
17 printf ( ’ I t i s a p o s i t i v e no s i n c e D7= 0 f o r 62H . \n ’
);
18 // s u b t r a c t i o n can be r e p r e s e n t e d a s
19 // FAH−62H= ( −06H) −(+62H)
20 s = -x - z ;
21 a=-s;
22 d = dec2hex ( a ) ;
23 printf ( ’ S u b t r a c t i o n= ’ ) ;
24 disp ( s ) ;
25 disp ( d ) ;
26 printf ( ’ i n h e x a d e c i m a l w i t h a n e g a t i v e s i g n \n \n ’ ) ;
27 g = bitcmp (a ,8) ; // 1 ’ s c o m p l i m e n t o f r e s u l t
28 q = g +1; // 2 ’ s c o m p l i m e n t o f r e s u l t
29 e = dec2hex ( q ) ;
30 printf ( ’ 2 s c o m p l i m e n t o f r e s u l t would be= ’ ) ;
31 disp ( e ) ;
1 // p a g e no 629
2 // e x a m p l e no A. 9
3 // ADDITION OF TWO POSITIVE NUMBERS
102
Figure 19.8: SUBTRACTION OF SIGNED NUMBERS
4 clc ;
5 // t h e g i v e n numbers a r e 41H & 54H .
6 A = hex2dec ([ ’ 41 ’ ]) ;
7 B = hex2dec ([ ’ 54 ’ ])
8 Y=A+B;
9 X = dec2hex ( Y ) ;
10 printf ( ’ Sum = ’ )
11 disp ( X ) ;
12 if Y >255 then // c h e c k i n g t h e c a r r y f l a g
.
13 printf ( ’CY=1 \n \n ’ )
14 else
15 printf ( ’CY=0 \n \n ’ )
16 end
17 if Y >127 then // c h e c k i n g t h e s i g n f l a g .
18 printf ( ’ S=1 \n \n ’ )
19 else
20 printf ( ’ S=0 \n \n ’ )
103
Figure 19.9: ADDITION OF TWO POSITIVE NUMBERS
21 end
22 if Y >0 then // c h e c k i n g t h e z e r o f l a g .
23 printf ( ’ Z=0 \n \n ’ )
24 else
25 printf ( ’ Z=1 \n \n ’ )
26 end
104