0% found this document useful (0 votes)
9 views4 pages

Fabrication

The fabrication process of a chip involves multiple steps, starting with photolithography to define layers on a silicon wafer. The initial step creates an n-well by doping a P-type silicon substrate, followed by forming transistor gates with doped polysilicon and introducing N and P diffusion masks. The process concludes with metal sputtering and etching to create connections, while modern techniques involve more complex doping profiles and smaller feature sizes.

Uploaded by

Yashaswini M
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
9 views4 pages

Fabrication

The fabrication process of a chip involves multiple steps, starting with photolithography to define layers on a silicon wafer. The initial step creates an n-well by doping a P-type silicon substrate, followed by forming transistor gates with doped polysilicon and introducing N and P diffusion masks. The process concludes with metal sputtering and etching to create connections, while modern techniques involve more complex doping profiles and smaller feature sizes.

Uploaded by

Yashaswini M
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

Fabrication process:

• The fabrication sequence consists of a series of steps in which layers of the chip are defined
through a process called photolithography
• The very First step of the fabrication begins with the creation of an n-well on a bare P type
silicon Wafer o Group V dopants are added into the silicon substrate to change the substrate
from P type to N type in the region of the well
o To differentiate between the well and the p-substrate we grow a protective layer of
oxide over the entire Wafer then remove it where we want the wells
o So the working is the oxides block that dopants but the substrate takes the dopants
so wherever there is no oxide layer there forms the n-well
o Oxidation of the wafer is done at a high temperature typically 900 to 1200 degrees
Celsius furnace that causes the silicon and oxygen to react and become silicon
dioxide on the water surface
o The two ways to add the dopants are diffusion and ion implantation
o Dopent ions are accelerated through an electric field and blasted into the substrate
this is the method of ion implantation
o An organic photo resist is spun onto the Wafer and this photo resist is exposed to the
light where it softens
o The remaining oxide is stripped with HF to leave the bare wafer with wells in the
appropriate places
• Second step is to form the transistor gates o Gates consists of polycrystalline silicon
generally called polysilicon over a thin layer of oxide
o The wafer is placed in a reactor with the silane SiH4 gas and heated again to grow
the polysilicon layer through the process is called chemical vapor deposition
o Polysilicon is heavily doped so that it can be a reasonably good conductor o So the
layer of polysilicon is put on the existing layout thus the Wafer is patterned with
photo resist and the polysilicon mask leaving the polysilicon gates atop the thin gate
oxide
o The N plus regions are introduced for the transistors active area and the well contact
wherever needed along with that a protective layer of oxide is also formed and
patterned with the N Diffusion Mask
o All the active areas wherever the N plus regions are required or doped generally or
typically with ion implantation and thus is called N Diffusion
o Now the polysilicon gate over the Nmos transistor blocks the diffusion so the source
and train are separated by a channel under the gate this is called self aligned process
because the source and the drain of the transistor are automatically formed adjacent
to the gate without the need to precisely align the masks
o Finally the protective oxide is stripped
• The third step is to form the P diffusion masks.
o The steps are similar as we have done for N-diffusion
o A protective oxide layer is formed all the P diffusion at the active areas of the
transistor wherever required or done and then again the oxide layer is stripped at
the last o All the process is same as the second step
o Here the field oxide is grown to insulate the Wafer from metal and patterned with
the contact mask to leave contact cuts and these cuts are where a metal should
attach to the polysilicon
o Aluminum is sputtered over the entire wafer filling the contact cuts as well o
Sputtering is a process which involves blasting aluminum into a vapor that evenly
coats the Wafer
o The metal is patterned with the metal mask and the plasma etched to remove metal
everywhere except where wires should remain

This completes the simple fabrication process also the new modern fabrication are very complex as
they include complex doping profiles around the channel of the transistor and the print features are
smaller than the wavelength of the light being used in the lithography.
Diagrams for step 1
Diagrams for step 2

You might also like