SCHOOL OF ENGINEERING ASSIGNMENT COVER SHEET

Title: Laboratory Report- LOGIC GATES (typical 5 pages)

Module: EENG0027: Engineering Principles 3
Work Setter: Dr G Lu
Demonstrators: Ali Khan and Jiawei Liao
Assessment: This assignment contributes 8.0% of the module.
Deadlines: Group 12: 11:00 to 13:00, Tuesday, Week 15 (11 Nov 2024)
Group 13: 14:00 to 16:00, Tuesday, Week 15 (11 Nov 2024)
Group 14: 15:00 to 17:00, Thursday, Week 15 (14 Nov 2024)
Group 11: 14:00 to 16:00, Friday, Week 15 (15 Nov 2024)
Submission deadline: 12.00 NOON, Friday Week 32 (14th March 2025)
Collecting Point: Online (Moodle)
Intended This assignment contributes to the assessment of the EENG0027
Learning learning outcomes:
Outcomes: 8.2. Understand the basic principles of digital electronics logic gates
and their arithmetic;.
Feedback Feedback will be via: Written comments on work. Further feedback
method: will be available on request.

You are reminded of the University rules on Academic Integrity as stated in the student handbook.
Examples of conduct regarded as a breach of these regulations include
• Plagiarism: reproducing in any work submitted for assessment or review (for example,
examination answers, essays, project reports, dissertations or theses) any material derived from
work authored by another, without clearly acknowledging the source
• Duplication of Material
• Conspiring with others to reproduce the work of others without proper acknowledgement,
including knowingly permitting work to be copied by another student
• Falsification of data/evidence.

Marking Criteria (out of 100 marks)

This assignment will be marked against a model solution which will be made available with the returned
work. The marks awarded will be consistent with the scores indicated in the assignment sheet. In
general, marks may be lost for work which does not show the full method, include the correct units, or is
poorly structured and difficult to follow. Additionally, in design based questions you should consider the
most appropriate unit prefixes and the number of significant figures to use for results. You could also
provide sketches of your final designs, and suggest nearest preferred values for components. If
assumptions are required, you should state them and justify why they are appropriate. If the work asks
you to comment on the final result you should make an appropriate conclusion.
Instruction
1. This lab aims to examine experimentally the operations of logic gates and their networks (circuits) using a logic
circuit board. All the teaching materials related to this lab can be found on EENG0027 module page folder on
Moodle.
2. You should read this lab script carefully and understand what you are expected to do before the lab session.
3. You should print a hardcopy of the script and bring it to the lab. You may also bring and use your own device (e.g.,
laptop/tablet PC, iPad) in the lab.
4. You should only attend the lab session for your assigned group.
5. You are encouraged to work in pairs unless you wish to work on their own.
6. You should use this script to fill out your work.
7. You should to complete all the tasks in the timetabled lab session.
8. You should keep your work safe with other lab reports of EENG0027. You are ONLY required to submit ONE of
THREE reports of EENG0027 labs.
9. You should submit your completed lab report to Moodle (EENG0027/Week 36/Submission of EENG0027 Lab) by
or before 12:00 noon, Friday, 14th March 2025.
10. You should scan or take photos of your completed report, and create a single document (either Word or PDF file,
not multiple files or a zip file). Name your file as 'your surname_your Kent login'.

Overview of the logic circuit board

Circuit board

Gates and pin

numbers IC chips

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Practice- To examine the logic operation of a NOR gate.

Circuit to be investigated

1. Connect the circuit on the circuit board as shown in the figure below.

2. Fill in the truth table shown below, i.e. deduce the outputs experimentally and theoretically.

A B A+ B (theo A+ B
ry) (experiment)

0 0

0 1

1 0

1 1

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Student Name: , login: , Group:

Tast 1- To examine one of De Morgan’s Theorems [20/100]

Circuit to be investigated

Experiment-
1. Construct the above circuit on the circuit board. You may use any two of NOT gates and a AND gate. Clearly
draw the wire links that you have used on the diagram of the board shown in Figure 1.1.

Figure 1.1
2. Fill in the truth table shown below i.e. deduce the outputs experimentally and theoretically.
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 A B A B F F
(theory) (theory) (theory) (experiment)

0 0

0 1

1 0

1 1

3. What is the above circuit equivalent to? Explain why this is so.

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Task 2- Logic Gate Reduction, aiming to demonstrate that a complicated logic circuit (se below) can be
reduced to a much simpler one.
[30/100]

Circuit to be investigated

Experiment
1. Construct the above circuit on the circuit board. You may use any two of NOT gates and a AND gate. Clearly
draw the wire links that you have used on the diagram of the board shown in Figure 2.1.

Figure 2.1

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2. Fill in the truth table shown below i.e. deduce the OUTPUT experimentally.

A∙B A∙B B F F
A B (theory)
(theory) (theory) (theory) (experiment)

0 0

0 1

1 0

1 1

3. What is the above circuit equivalent to? Explain why this is so.

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Task 3- Logic Circuit Design, aiming to design a simple logic circuit which is capable of fulfilling a simple
specification.
[50/100]

There are two SENSORS on the right-side of the lower section of the test board (Figure 3.1). The sensor at
the bottom is a magnetic field sensor (MAG). Its logic output depends on the presence or not of a magnetic
field produced by a bar magnet. The sensor on the top is an infra-red (IR) sensor (OPTO). Its logical output
depends on whether the IR beam is interrupted by an object placed in its slot.

A logic circuit is to be designed such that the OUTPUT of the circuit is ‘Logic 1’ ONLY when,
 the magnetic field is present to the MAG sensor AND the IR beam of the IR sensor is un-interrupted,
OR
 the magnetic field is absent from the MAG sensor AND the IR beam of the IR sensor is interrupted.

1. By monitoring the outputs of the MAG and IR sensors with LEDs on the base unit, determine when the
outputs of the sensors are Logic 1 (ON) and when they are Logic 0 (OFF). Record your results in the table
below,

Sensor state Logic level (LED: ON is ‘1’, OFF is ‘0’)

Magnetic field is absent from the MAG sensor

Magnetic field is present to the MAG sensor

IR Beam of the IR sensor is interrupted (by a cardboard)

IR Beam is of the IR sensor un-interrupted (by a

cardboard)

2. After you have investigated the magnetic field sensor and IR sensor experimentally, you will be in a position
to fill in the output columns of the truth table below according to the logical requirements (leave the last
column for the time being)

OUTPUT F OUTPUT F
MAG sensor A IR sensor B
(required) (experiment)

3. Write down below the Boolean logical expression for output F with respect to Inputs A and B.

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4. Draw up a circuit diagram according to the truth table able

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5. Construct the circuit on the test board based on the diagram you obtained above. Clearly draw the wire links
that you have used in your circuit on the diagram of the board shown in Figure 4.1

Figure 3.1

6. Write down your observations/conclusions (with justification).

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