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Unit 3 - LM 12 - IO Interface and Architecture

The document discusses I/O interfaces and architecture, detailing the types of peripheral devices, their functions, and the communication methods between CPUs and peripherals. It explains the differences between isolated and memory-mapped I/O, as well as asynchronous data transfer techniques, including handshaking and serial transmission. Additionally, it covers the concepts of FIFO buffers and baud rates in data transmission.

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0% found this document useful (0 votes)
44 views8 pages

Unit 3 - LM 12 - IO Interface and Architecture

The document discusses I/O interfaces and architecture, detailing the types of peripheral devices, their functions, and the communication methods between CPUs and peripherals. It explains the differences between isolated and memory-mapped I/O, as well as asynchronous data transfer techniques, including handshaking and serial transmission. Additionally, it covers the concepts of FIFO buffers and baud rates in data transmission.

Uploaded by

gayathris
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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22XX303 – COMPUTER ARCHITECTURE

UNIT III – LP 12 – LECTURE MATERIAL

I/O Interface and Architecture


Peripherals:

The input and output devices that are attached to the computer are called peripheral
devices.

Eg: Keyboard, printer, display unit.

 Peripherals that provide auxiliary storage to the system are magnetic disks and tapes.
 Printers provide a permanent record on paper of computer output data or text.
The 3 types of printers:
1) Daisy wheel
2) Dot matrix
3) Laser
 Magnetic tapes are used for storing files of data.
Access – Sequential
Slowest and cheapest method.
Tapes can be removed when not in use.

 Magnetic disks are used for bulk storage of programs and data.
Access – by moving the read/write mechanism to a track in the magnetized surface.

ASCII –American Standard Code for Information Interchange


It is a 7 bit code. Most computers manipulate an 8 bit quantity as a single unit
called a byte. ASCII characters are often stored one per byte.

Input Output Interface

It provides a method for transferring information between internal storage and external
I/O devices. Peripherals need special communication links for interfacing with CPU. The
purpose of the communication link is to resolve the differences between the central computer
and each peripheral.

The major differences are:


1. Peripherals are electromagnetic and electromechanical devices, whereas CPU and
memory are electronic devices.
2. The data transfer rate of peripherals is slower than that of the CPU.
3. The operating modes of peripherals are different from each other.
4. Data codes and formats in peripherals differ from the word format of CPU and memory.

To resolve the differences, special hardware components are included between CPU and
peripherals to supervise and synchronize all the input and output transfers called interface units.

I/O Bus and Interface Modules

The communication between the processor and several peripherals through the I/O Bus is
shown in the following figure.

I/O Command:
The function code is referred to as an I/O command. It is an instruction that is
executed in the interface and its attached peripheral unit.
An interface may receive four types of commands. They are control, status, data input
and data output
Control command: It is issued to activate the peripheral and to inform it what to do.

Status command: It is used to test various status conditions in the interface and the
peripheral.

Data input command: The interface receives an item of data from the peripheral and
places it in its buffer register.
Data output command: The command causes the interface to respond by transferring data
from the bus into one of its registers.

I/O versus memory bus

There are 3 ways that computer buses can be used to communicate with memory
and I/O.
1. Use two separate buses, one for memory and the other for I/O.
2. Use one common bus for both memory and I/O but have separate control lines for
each.
3. Use one common bus for memory and I/O with common control lines.

Isolated versus Memory mapped I/O

Isolated I/O :

1) The CPU has distinct input and output instructions.


2) Isolates memory and I/O addresses.
3) Each has its own address space.

Memory mapped I/O


1) No specific input output instructions.
2) Use memory related instuctions for accessing data.
3) Do not distinguish between memory and I/O addresses.
4) Memory and I/O share the same set of addresses.

Example of I/O interface :

An example of an I/O interface unit is shown in the following block diagram.


Asynchronous data transfer :

 Control signals are transmitted between the two communicating units to indicate the time
at which data is being transmitted.
 A strobe pulse is supplied by one of the units to indicate to the other unit when the
transfer has to occur.
 The unit receiving the data item responds with another control signal to acknowledge
receipt of the data.
 This type of agreement between two independent units is referred to as handshaking.

Source initiated strobe for data transfer


Destination initiated strobe for data transfer

Disadvantage of strobe method:

The source/ destination unit that initiates the transfer has no way of knowing whether the
destination/source unit has actually received the data item that was placed in the bus.

Handshaking:

The two handshaking lines are data valid, which is generated by the source unit and data
accepted, generated by the destination unit.

1) The source unit initiates the transfer by placing the data on the bus and enabling its
data valid signal.
2) The data accepted signal is activated by the destination unit after it accepts the data
from the bus.
3) The source unit then disables its data valid signal, which invalidates the data on the
bus.
4) The destination unit then disables its data accepted signal and the system goes into
initial state.
5) The source does not send the next data item until after the destination unit shows its
readiness to accept new data by disabling its data accepted signal,
This scheme allows arbitrary delays from one state to the next and permits each unit
to respond at its own data transfer rate. The rate of transfer is determined by the
slowest unit.

Source initiated transfer using handshaking


Asynchronous serial transfer

 Serial transmission may be synchronous or asynchronous.


 In serial synchronous transmission, two units share a common clock frequency
and the bits are transmitted at a rate dictated by the clock pulses.
 A serial asynchronous data transmission technique used in many interactive
terminals employs special bits that are inserted at both ends of the character code.
 Each character consists of three fields : a start bit, the character bits and stop bits.
 The transmitter rests at the 1- state when no characters are transmitted.
 The first bit, called the start bit is always a 0 and is used to indicate the beginning
of a character,
 The last bit called the stop bit is always a 1.

Asynchronous serial transmission UART:


The integrated circuits that are specially designed to provide the interface between computer
and similar interactive terminals is called an asynchronous communication interface or a
universal asynchronous receiver – transmitter (UART)

Baud rate

The rate at which serial information is transmitted and is equivalent to the data transfer in bits
per second.

FIFO buffer

 A first in first out (FIFO) buffer is a memory unit that stores information in such a
manner that the item first in is the item first out.
 A FIFO buffer comes with separate input and output terminals.
 It can input data and output data at two different rates and the output data are always in
the same order in which the data entered the buffer.

 Useful in some applications when data are transferred asynchronously.

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