Notes Day1
Notes Day1
Digital Design
To support this integration from diverse suppliers, standard design representations are needed, and
also standard ways to package intellectual property for re-use. Hardware description languages
provide the standard methodology for doing this. There are two widely used hardware description
languages (HDLs): VHDL and Verilog. HDLs also have the advantage that they allow designers to
write high level descriptions of digital systems which can then be automatically translated into
detailed logic design in an automatic process called logic synthesis. Synthesis provides an enormous
boost to designer productivity, and without it modern design involving hundreds of millions of logic
gates would not be feasible.
The type of system-on-chip used in smartphones is manufactured with fixed hardware function. Any
adaptation is purely through software, which can be slow. Also, fixed hardware function is only
economic if produced in large volumes. Programmable hardware technologies, such as FPGA, are
preferrable if the production volume is low. Very complex FPGAs are increasingly finding
applications in problem domains where the function of the hardware must frequently change to give
maximum performance on a dynamically changing problem, such as large data processing centres and
self-driving cars.
This module will introduce the skills necessary to be successful in modern digital system design. We
will start by looking at manual design techniques and seeing the fine detail of what happens in
systems constructed from logic gates and flip-flops. Then we will move on to look at the VHDL
language and how it synthesises to hardware. Finally, we will look at the properties of the components
of system on chip designs involving microprocessors and hardware accelerators, and the challenges
involved in verifying large scale systems
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2 Basic Ideas of Combinational Logic
2.1 Types of Digital System
There are two main types of logic system:
Combinational logic produces an output that is determined only by the state of the input at
that point in time. If we know what the present input is, then we know immediately what the
present output must be. An example is a standard up/down light switch.
Sequential logic produces an output that is determined not only by the present input but also
by the device’s past history. An example would be a pull-cord light switch in a bathroom. If
we pull the cord (the input) when the light is off, then the light (the output) will turn on. If we
pull the cord when the light is on, then the light will turn off.
There are two types of activity we will need to know how to do:
Analysis means we are given a circuit design and we must figure out what it would do and
how it would behave
Synthesis means we are given a required function and we have to design the circuit that will
fulfil this function
Boolean algebra is a mathematical description of systems built from components that can take 2
possible signal values. Mastery of Boolean algebra enables us to take a requirement for the system
behaviour and translate it into a circuit design. It also gives us ways to ensure that our circuit designs
are efficient. Boolean algebra was originally developed to deal with problems in logic that considered
two-value propositions that are TRUE or FALSE, and only later became used for digital electronics.
Because of this basis in Boolean algebra, digital electronic systems are often referred to as logic
systems.
One way we describe the behaviour of a logic system is a truth table. This is a list of all the possible
combinations of input condition and the corresponding condition that we require at the output. For our
simple alarm it looks like this:
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Truth table Symbol Boolean algebra
AND
A B C
0 0 0
A
0 1 0 C C = A.B
1 0 0 B
1 1 1
This function is called an AND function. The AND gate can have any number of inputs, but the
example shown above has 2 inputs. The AND gate outputs a 1 when all of its inputs are 1. This
operation is sometimes referred to as the logical product of A and B, because the 2-input AND gate is
very similar to a 1-bit multiplication
For this case, the truth table, symbol and algebraic formula are:
This function is called an OR function. It outputs a 1 when any of its inputs is 1. A OR B is normally
written as A+B. This operation is sometimes referred to as the logical sum of A and B.
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OR C=A+B XOR C=A⊕B
A B C A B C
0 0 0 0 0 0
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0
Inclusive OR Exclusive OR
Our OR gate implements the inclusive OR function. There is a logic gate that implements the XOR
function, but it is less fundamental than the OR gate and we’ll leave its consideration until later.
The OR gate.
The INVERTER
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2.4 Putting it all together
Now we’ll design our alarm system.
Alarm enabled?
Upstairs window closed? Sound the alarm
Downstairs window closed?
The interface with the real world will be three input switches:
A) Alarm is enabled? 1=yes 0=no
B) Upstairs window is closed? 1=yes 0=no
C) Downstairs window closed? 1=yes 0=no
We have one output signal:
D) Sound the alarm? 1=yes 0=no
The required behaviour is that the alarm should be sounded if (the alarm is enabled and (the upstairs
window is not closed or the downstairs window is not closed))
It should be easy to see that a circuit that will accomplish this function is:
A
D
B
C
A
D
B
C
The two different representations that we have seen are identical in their meaning.
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2.4.2 Circuit analysis: figuring out what a circuit does
We have come up with a design for our burglar alarm circuit.
A
X D
B
C Z
Y
Now let’s analyse the circuit to make sure that it behaves in the way we expect. To help us with the
analysis we have given names to the additional circuit nodes X, Y, Z.
To see how the circuit responds to inputs, we could give it a set of input values, e.g. A=1, B=0, C=0
then work forward from the input to the output evaluating X, Y, Z, D. Evaluating the output of the
inverters tells us that X=1 and Y=1. Evaluating the OR gate’s response to these values of X and Y
tells us that Z=1. Finally we evaluate the AND gate’s response to the input Z=1, A=1 tells us that
D=1. So this set of values at the input will cause the alarm to sound.
A B C X Y Z D
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
We then move from the inputs toward the output, evaluating the columns. We start with X, which is
the inverse of B, and Y, which is the inverse of C. Now we can fill in the column for Z: it is 1 in any
row where we see X=1 or Y=1. Finally D is 1 in the rows where both A=1 and Z=1
A B C X Y Z D
0 0 0 1 1 1 0
0 0 1 1 0 1 0
0 1 0 0 1 1 0
0 1 1 0 0 0 0
1 0 0 1 1 1 1
1 0 1 1 0 1 1
1 1 0 0 1 1 1
1 1 1 0 0 0 0
This final truth table lists every possible input condition, and tells us what the output D would do in
each case.
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2.4.4 Algebraic description of the circuit
To build up a Boolean logic representation of this circuit, we proceed as follows. The inverters give us
X=B
Y=C
We use brackets, for example (X+Y) to show that we need first to perform the operation X OR Y and
then take the result of this operation and AND it with the value of A.
If we then want to evaluate the result for a particular set of inputs (say A=1, B=0, C=0) we substitute
these values into the equation.
D=A.(B+C)
D=1.(0+0)
D=1.(1+1)
D=1.1
D=1
2.5 Summary
Combinational logic circuits have an output value that is entirely determined by their inputs at that
instant of time. Boolean algebra gives us a mathematical foundation for representing and manipulating
digital circuits. The basic building block for logic circuits are logic gates. The AND gate, the OR gate
and the inverter are sufficient to construct any function that can be represented as a Boolean equation.
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3 The Axioms of Boolean Algebra
So far, we have looked at simple examples. To tackle more complicated situations, we will need to
understand Boolean algebra. In this lecture we will look at some of the main rules of Booelan algebra.
We then put these rules to work in the next lecture to look at some examples of circuit simplification.
AND OR Inverter
0.0=0 0+0=0
0.1=0 0+1=1 0=1
1.0=0 1+0=1 1=0
1.1=1 1+1=1
Suppose we have a digital signal (making transitions between 1 and 0 as time goes by) and we apply it
to the A input of an AND gate. The output C is 1 when both inputs are 1, and 0 at all other times.
Suppose the B input is fixed at 1 and will never change.
A=
C=
B=1
It is clear that the output C will just be a copy of the input A. We can say that C=A. On the other hand,
if we set the B input to 0 we get a 0 at the output. We can say that C=0.
A=
C=0
B=0
We can summarise these as
A.1=A
A.0=0
We can apply a similar thought process to all possible situations with AND gates and OR gates to get
this set of relationships:
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3.3 Relationships with inversion
It should be reasonably obvious that if we take a variable A and invert it, and then we invert it again
the output will be a copy of A.
A A
This sounds unremarkable, but actually will turn out to be very useful when we look combine this
with de Morgan’s laws.
The laws tell us how to deal with AND, OR operations that are enclosed within inversions. The laws
are easy to prove with truth tables, but let’s think about an example that will illustrate what the laws
mean. Let’s go back to our burglar alarm example:
𝑆̅ = 𝐴. 𝐵 = 𝐴̅ + 𝐵
So the AND condition becomes an OR condition when we take it outside of the NOT.
3.4.1 Commutativity
In our normal everyday arithmetic, some operations don’t care which way round we write the
operands. For example, 2×3 is the same as 3×2. We say that multiplication is commutative.
A quick inspection of the truth tables for AND and OR shows that both of these operations are
commutative:
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3.4.2 Associativity
An associative operator means that if we have several occurrences of the same operator, we get the
same result regardless of how we group them. So in everyday arithmetic:
(2+3)+4 = 2+(3+4)
(2×3)×4 = 2×(3×4)
Addition and multiplication are associative. Because it doesn’t matter how we group, we normally
just say 2+3+4 or 2×3×4 without any brackets.
We are only free to change the groupings if all of the operations are the same. If the operators are
different, we are not allowed to change the grouping:
(2×3)+4 ≠ 2×(3+4)
It is easy to prove from the truth tables that AND and OR operations are associative:
(A.B).C = A.(B.C)
(A+B)+C = A+(B+C)
As a result, we would normally just say A.B.C, A+B+C without using brackets.
Similarly, in Boolean expressions AND has higher precedence than OR. So if we have
A+B.C
this should be interpreted as
A+B.C=A+(B.C)
This isn’t a consequence of any fundamental property of AND, OR. It’s just a way to save ourselves
from having to always write brackets all of the time.
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In Boolean algebra, we have a similar result
A.(B+C) = A.B+A.C
We say that AND is distributive over OR
A.B=B.A A+B=B+A
(A.B).C=A.(B.C) (A+B)+C=A+(B+C)
A.(B+C)=A.B+A.C A+(B.C)=(A+B).(A+C)
A.B=A+B A+B=A.B
A B A.B A+A.B
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
The columns for A and A+A.B are identical for any possible input combination, so we have proved
the result. We also can prove it by Boolean algebra like this:
𝐶 = 𝐴 + 𝐴. 𝐵
𝐶 = 𝐴. 1 + 𝐴. 𝐵
𝐶 = 𝐴. (1 + 𝐵)
𝐶 = 𝐴. 1
𝐶 =𝐴
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5.2 A+A.B=A+B
This is another useful result that will illustrate how we do Boolean manipulations. We start with
𝐶 = 𝐴 + 𝐴̅. 𝐵
The absorption methods says that we can replace A with A+A.B, so we have
𝐶 = 𝐴 + 𝐴. 𝐵 + 𝐴̅. 𝐵
𝐶 = 𝐴 + (𝐴 + 𝐴̅). 𝐵
𝐶 = 𝐴 + 1. 𝐵
𝐶 =𝐴+𝐵
6 Summary
We have covered the axioms of Boolean algebra and illustrated their use with a few examples.
Mastery of Boolean algebra enables us to construct a circuit to accomplish a required functionality. It
also enables us to simplify a complex circuit to a circuit of equivalent function which requires fewer
resources to build. We will illustrate these two points in the following lectures.
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4 Circuit synthesis and Circuit Simplification
Circuit synthesis starts with a statement of required behaviour and figures out a circuit that will
provide this behaviour. Earlier we looked at examples where this could be done intuitively. Now we
will look at a systematic procedure that will always work, regardless of intuition.
4.1 An example
Suppose we have a system that takes 1-bit inputs (A, B, C) from three sensors. The required behaviour
is that the output T should form the majority decision of the sensors. So if the majority of sensors are
outputting a 1, then our system should output a 1. Otherwise it should output a 0. This can be
expressed as a truth table:
A B C T
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
To help us get to our final solution, we will start off by producing a few sub-circuits:
𝑍 = 𝐴̅. 𝐵. 𝐶 this outputs Z=1 whenever A=0, B=1, C=1; otherwise it outputs Z=0
𝑌 = 𝐴. 𝐵 . 𝐶 this outputs Y=1 whenever A=1, B=0, C=1; otherwise it outputs Y=0
𝑋 = 𝐴. 𝐵. 𝐶̅ this outputs X=1 whenever A=1, B=1, C=0; otherwise it outputs X=0
𝑊 = 𝐴. 𝐵. 𝐶 this outputs W=1 whenever A=1, B=1, C=1; otherwise it outputs W=0
T should take the value 1 whenever any of these sub-circuits outputs a 1. In other words
𝑇 = 𝑍 + 𝑌 + 𝑋 + 𝑊 = 𝐴̅. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅ + 𝐴. 𝐵. 𝐶
A Z
B
C
Y
T
X
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4.2 Canonical sum of product form
Our equation for the action of the circuit is
𝑇 = 𝐴̅. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅ + 𝐴. 𝐵. 𝐶 (1)
This way of expressing our behaviour is called a sum of products form. This is because we take our
inputs (maybe complemented, maybe not) then AND them together in various configurations to form
logical product terms 𝐴̅. 𝐵. 𝐶, 𝐴. 𝐵 . 𝐶, 𝐴. 𝐵. 𝐶, 𝐴. 𝐵. 𝐶. We then OR these terms together to form the
logical sum of these terms.
In the same way, we could also work out the equation for 𝑇, i.e. the list of all circumstances in which
our circuit will output a 0:
Equations (1) and (2) taken together are called the canonical sum of products. The characteristic of a
canonical equation is that every input appears (both inverted and uninverted) in every possible
combination with every other input in the product terms. The canonical sum of products is a Boolean
algebra way to describe the truth table.
ABC 000 = 0 P0
A BC 001 = 1 P1
AB C 010 = 2 P2
AB C 011 = 3 P3
ABC 100 = 4 P4
A BC 101 = 5 P5
AB C 110 = 6 P6
ABC 111 = 7 P7
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If we take our Boolean expression for T
T=A.B.C+A.B.C+A.B.C+A.B.C
T=P3+P5+P6+P7
T= (3,5,6,7)
T=A.B.C+A.B.C+A.B.C+A.B.C
Can be simplified to
T= (0,1,2,4)
A Z
B
C
Y
T
X
However, the resulting circuit is normally inefficient and requires more logic resource than is
necessary. To get a really exact measure of resource requirements is complex and requires a detailed
knowledge of the construction process, but we can get a good ballpark idea by measuring the number
of logic gate inputs
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To get an estimate of hardware resource requirement it is tempting to just count the number of logic
gates. However, a four input AND gate normally requires twice as much hardware to build as a 2-
input AND gate. (The reason for this is the internal structure of a logic gate is made of switches called
transistors. Each separate input drives a separate transistor, so doubling the number of inputs doubles
the number of transistors used to build the gate.) So it makes more sense to count the total number of
inputs to logic gates and use this as our measure of hardware complexity.
Inverter inputs 3
AND gates inputs 12
OR gate inputs 4
Total 19
𝐶 = 𝐴. 𝐵 + 𝐴. 𝐵
(Take an umbrella) = (It is raining AND It is hot) OR (It is raining AND It is NOT hot)
It should be clear that when it is raining we will take an umbrella regardless of the weather.
Conversely, if it is not raining we will not take an umbrella regardless of the weather. So the weather
does not actually have any bearing on our decision whether to take an umbrella, i.e.
𝐴. 𝐵 + 𝐴. 𝐵 = 𝐴
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It’s easy to prove with Boolean algebra:
𝐶 = 𝐴. 𝐵 + 𝐴. 𝐵
𝐶 = 𝐴. (𝐵 + 𝐵 )
𝐶 = 𝐴. (1)
𝐶=𝐴
In analysing our circuits we need to be on the lookout for the opportunity to do this trick. We spot the
opportunity by looking for product terms that differ only in the complementation of one variable.
𝐷 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅
The 𝐴. 𝐵. 𝐶 term differs from 𝐴. 𝐵 . 𝐶 in the complementation of only one variable. So here is an
opportunity to simplify. Likewise 𝐴. 𝐵. 𝐶 differs from 𝐴. 𝐵. 𝐶̅ by complementation of one variable. So
we can see two opportunities for simplification. However, if we start off by using 𝐴. 𝐵 . 𝐶 for
simplification, we get this:
𝐷 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅
𝐷 = 𝐴. 𝐶. (𝐵 + 𝐵 ) + 𝐴. 𝐵. 𝐶̅
𝐷 = 𝐴. 𝐶. 1 + 𝐴. 𝐵. 𝐶̅
𝐷 = 𝐴. 𝐶 + 𝐴. 𝐵. 𝐶̅
We have lost the 𝐴. 𝐵. 𝐶 term that we needed to do the simplification on the 𝐴. 𝐵. 𝐶̅ term, so we can’t
simplify further. Likewise, if we start by using 𝐴. 𝐵. 𝐶̅ for simplification, we get this:
𝐷 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅
𝐷 = 𝐴. 𝐵. (𝐶 + 𝐶̅ ) + 𝐴. 𝐵 . 𝐶
𝐷 = 𝐴. 𝐵. 1 + 𝐴. 𝐵 . 𝐶
𝐷 = 𝐴. 𝐵 + 𝐴. 𝐵 . 𝐶
Once again, we have lost the 𝐴. 𝐵. 𝐶 term that we needed to do the simplification on the 𝐴. 𝐵 . 𝐶, so we
can’t simplify further. How can we deal with this in w way that enables us to do both simplifications?
Remember that for any formula X we know that X+X=X. We can replace any instance of a formula by
two instances ORed together. So we take our original equation
𝐷 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅
𝐷 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅
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4.5.3 Simplifying our example circuit
Our canonical system equation for the circuit of section 4.1 is:
𝑇 = 𝐴̅. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅ + 𝐴. 𝐵. 𝐶
The final term A.B.C differs from each of the other three terms by the complementation of one
variable. So we would like to use it three times over. In Boolean algebra X+X=X, so we can say that
A.B.C = A.B.C + A.B.C + A.B.C. We insert this into our equation to get:
𝑇 = 𝐴̅. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 + 𝐴. 𝐵. 𝐶̅ + 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵. 𝐶
This is a sum-of-products form, but it is much simpler than the original canonical sum-of-products.
Our simplified circuit is
A
B
Again, we can estimate the complexity of this circuit by counting the number of gate interconnections.
Inverter inputs 0
AND Gate inputs 6
OR Gates inputs 3
Total 9
This represents 47% of the circuit complexity of the original design of section 4.1.
4.6 Summary
The canonical sum of products form is very important in the theory of Boolean algebra. It contains all
product terms that can be constructed from the inputs and allocates them to a sum that produces a one
at the output and a sum that produces a zero.
The canonical sum of products form can be used to directly construct a circuit, but the result will
almost always be inefficient. We have seen how to use Boolean algebra to the canonical sum of
products form to produce a simplified circuit. In the next lecture we will look at an easier approach to
simplification, the Karnaugh map.
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You should now know...
How to construct a circuit from its truth table
How to construct a canonical sum of products form
How to represent a truth table using ∑(𝑝𝑟𝑜𝑑𝑢𝑐𝑡 𝑡𝑒𝑟𝑚𝑠) notation
How to estimate the resource cost of a digital circuit
How to use Boolean algebra to derive a simplified circuit from a complex circuit
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5 Minimisation by Karnaugh Map
In the last lecture we looked at a way to generate a circuit that will fulfil a user requirement. We are
given a required functionality (expressed as a truth table) and our task is to build a circuit that achieves
the desired function. The method was based on building a detector for each input condition that
contributes to a 1 at the output, then ORing the outputs of these detectors. We observed that this
technique will always work, but will normally produce a circuit that is inefficient. We then had to
simplify the resulting circuits using Boolean algebra. However, the use of Boolean algebra is tedious
and inefficient. An easier and quicker way is the Karnaugh map (also called K-map), which is a
graphical method that makes the required simplifications visually obvious.
Boolean algebra simplifies by looking for terms which differ only in the complementation of one
input, and eliminating that term. For example
𝑇 = 𝐴. 𝐵. 𝐶 + 𝐴. 𝐵 . 𝐶 = 𝐴. 𝐶
The Karnaugh map works by re-drawing the truth table onto a surface where any two neighbours
differ in the complementation of one input variable. The process of spotting opportunities for
simplification is then reduced to merging neighbours together to form larger groups.
In order to accomplish this, we will need to use Gray codes. Gray codes are sequences whose key
property is that each successor differs from its predecessor by the complementation of one bit. Here
are the 2-bit and 3-bit Gray code sequences:
The Karnaugh map rearranges the truth table as a two-dimensional grid. The columns correspond to
the values of A, so the left column corresponds to A=0 and the right to A=1. The rows correspond to
the values of B; the top row is B=0; the bottom row is B=1. Inside the grid we write the values that the
output should have. So, for example, the top left cell in the K-map corresponds to A=0, B=0 resulting
in an output of T=0.
The purpose of this rearrangement is that the coordinates of any cell in the grid differ from the
coordinates of its horizontal or vertical neighbour by the complementation of a single input variable.
So the cell whose coordinates are A=0, B=0 is to the left of the cell with coordinates A=1, B=0.
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Likewise, the cell A=0, B=0 is above the cell A=0, B=1. This is important in helping us to simplify our
circuit designs by spotting visual patterns.
Before we look at how to do simplification, let’s start off by seeing how the K-map turns into a circuit.
We start off our design process by putting a loop around every condition that causes an output of 1:
A 0 1
B
0 0 0
1
1 1
We now figure out what circuit would be needed to produce the 1. So, for example, the bottom left cell
outputs a 1 when A=0 and B=1. This can be done by a circuit that implements 𝐴̅. 𝐵. When we have
labelled all of the loops we have this:
A 0 1
B
0 0 1
1
1 1
If any of the conditions is true, then the overall output C must be 1. So we OR the outputs of the
detectors for these input conditions together to get the result:
𝐶 = 𝐴̅. 𝐵 + 𝐴. 𝐵
This is just the result that we got before from the truth table, so we haven’t gained any benefit yet.
However, when we come to simplifying the circuit the K-map will make the task easy.
To simplify the circuit, we look for any loops that are adjacent to one another horizontally or vertically
(no diagonals are allowed and we can’t go round corners). We then merge them into a single larger
loop. Here is an example:
A 0 1 A 0 1
B B
0 0 0 0 0 0
1 1
1 1 1 1
Throughout the loop, B has a constant value (B=1) and A can take any value (0, 1). This tells us that A
is irrelevant to the decision made by this loop, and its output is determined solely by the value of B.
So we can detect this loop simply by having a circuit that detects B=1.
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When all of the loops are as big as they can be (remembering that we can’t go diagonally and can’t go
round corners) then we stop and our resulting sum-of-products circuit has been minimised (i.e. it is as
efficient as it can possible be).
This gives us the same answer as the Boolean algebra simplification, but is much easier. The K-map
method also makes it much easier to be sure that we have found all possible simplifications of our
circuit and that the final result is minimised. With Boolean algebra it is harder to be sure that we have
truly found the most efficient solution.
The rows correspond to the values of input C. The columns correspond to the values of the inputs A
and B: respectively A=0,B=0 then A=0,B=1, then A=1,B=1 then A=1,B=0. The whole point of a
Karnaugh map is to put terms that differ only in the complementation of one variable next to each
other. A binary sequence 00, 01, 10, 11 would not achieve this. The Gray code sequence 00, 01, 11, 10
does achieve this requirement. It is essential to the success of the K-map method that the variables
must be indexed using a Gray code sequence.
The basic procedure is the same as for two inputs, but there are two additional pieces of information
needed:
Loops must enclose rectangles or squares whose sides are an exact power of 2 (i.e. 1, 2 or 4). This
was also true for the 2-input case, but we didn’t mention it because it was automatically true as any
loop that we could find would automatically be 1 or 2 long.
The right-hand edge of the K-map is connected to the left hand edge. So the column AB=10 is a
neighbor of the column AB=00. You can think this shape as a cylinder that has been flattened out
for ease of representation on the 2-dimensional page, but in actual operation the right edge would
connect up to the left.
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Truth table: Karnaugh map:
A B C T
0 0 0 0 AB
C 00 01 11 10
0 0 1 0
0 1 0 0 0 0 0 1 0
0 1 1 1
1 0 0 0
1 0 1 1
1 0 1 1 1
1 1 0 1
1 1 1 1
To solve this, we go through the same loop-connecting procedure as we used before (remembering
that we can’t go diagonally, can’t go round corners, and that we are only allowed rectangles or squares
that are 1, 2 or 4 long). The final result contains three loops:
AB
AB C 00 01 11 10
C 00 01 11
0 0 0 1 0
0 0 0 1 0
1 0 1 1 1
1 0 1 1 1
𝐴. 𝐵: within this loop, A=1, B=1 and we don’t care about C (C can take values of 0 or 1 without
any consequence on the decision that this loop takes). An AND gate with inputs A, B will detect
the input pattern A=1, B=1.
𝐵. 𝐶: within this loop, B=1, C=1 and we don’t care about A. An AND gate with inputs B, C will
detect this condition.
𝐴. 𝐶: within this loop, A=1, C=1 and we don’t care about B. An AND gate with inputs A, C will
detect this condition.
This process immediately gives us our minimised circuit without the need for Boolean algebra:
A
B
T=A.B+B.C+A.C
This gives us the same result that we derived using Boolean algebra in section 4.5.3, but the Karnaugh
map gives us the solution more quickly and easily. Moreover, with the Karnaugh map it is easy to
convince ourselves that we truly have found the most efficient possible solution (because all loops are
as large as possible), whereas with Boolean algebra it isn’t always obvious.
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5.4 Karnaugh maps with 4 inputs
The K-map with four inputs A, B, C, D looks like this:
AB
CD 00 01 11 10
00
01
11
10
The rows and columns both proceed in a Gray code sequence (00, 01, 11, 10) in order to ensure that
the coordinates of adjacent cells differ only in the complementation of one input variable. The rows
correspond to C=0,D=0 then C=0,D=1 then C=1,D=1 then C=1,D=0. The columns correspond to
A=0,B=0 then A=0,B=1, then A=1,B=1 then A=1,B=0.
The right hand edge of the K-map is linked to the left hand edge. Also the top edge of the K-map is
connected to the bottom edge. You can think of it as a doughnut shape1 that has been flattened out for
ease of representation on the 2-dimensional page, but in actual operation the right edge would connect
up to the left and the top to the bottom.
1
The formal mathematical name of a doughnut shape is a torus
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Using our looping procedure we get the following result
AB
CD 00 01 11 10
00 0 0 1 0
01 0 0 1 0
11 1 1 1 1
10 0 0 1 0
A
B
T=A.B+C.D
C
D
AB
CD 00 01 11 10
00 0 0 0 0
01 0 1 1 0
11 0 1 1 0
10 0 0 0 0
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If we look for loops that contain only ones, we can find 9 implicants in all:
𝐴̅. 𝐵. 𝐶̅ . 𝐷, 𝐴. 𝐵. 𝐶̅ . 𝐷, 𝐴̅. 𝐵. 𝐶. 𝐷, 𝐴. 𝐵. 𝐶. 𝐷
𝐵. 𝐶̅ . 𝐷, 𝐵. 𝐶. 𝐷, 𝐴̅. 𝐵. 𝐷, 𝐴. 𝐵. 𝐷,
𝐵. 𝐷
To construct our Boolean representation of the function, we construct a logical sum of implicants. We
don’t need to use all of the implicants, we just need enough to make sure that every 1 in the K-map is
enclosed within at least one implicant. In order to guide us in which implicants to use, there are
another two definitions that will be helpful:
A prime implicant is an implicant that is not enclosed within any other implicant. For example,
𝐴̅. 𝐵. 𝐶̅ . 𝐷 is an implicant, but it is not a prime implicant because it is entirely enclosed within B.D.
B.D is a prime implicant because it is not entirely enclosed within another implicant.
An essential prime implicant is a prime implicant which has some 1s which are not enclosed within
any other implicant. Because we need enough implicants to cover all of the 1s in our K-map, that
means that any essential prime implicant must be one of the terms in our final representation.
A minimal sum is the smallest number of prime implicants require to describe the function. It must
contain all essential prime implicants, plus enough prime implicants to cover the remaining 1s.
We then follow the standard process of labelling the terms that are constant throughout each loop:
Blue loop: 𝐴. 𝐷
Red loop: 𝐴̅. 𝐵. 𝐷
Green loop: 𝐴. 𝐶̅ . 𝐷
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5.6 Karnaugh maps with 6 inputs
For a 6-input function, we take four 4-variable K-maps and mirror the indices in both horizontal and
vertical directions. Here is an example:
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Index
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5.1 The 2-input Karnaugh map 20
5.2 Why does this work? 21
5.3 Karnaugh maps with 3 inputs 21
5.3.1 A 3-input example 22
5.4 Karnaugh maps with 4 inputs 24
5.4.1 An example with 4 inputs 24
5.5 Karnaugh map terminology 25
5.6 Karnaugh maps with 5 inputs 26
5.6 Karnaugh maps with 6 inputs 27
5.7 Summary of the Karnaugh map procedure 27
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