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(Spring 2022) Final Exam

This document outlines the exam details for the Selected Topics in Computer Engineering course at Ain Shams University, including instructions on prohibited items during the exam. It consists of four questions covering various topics in computer engineering, with a total of 90 marks available. The exam is scheduled for June 23, 2022, and includes questions on verification, constraints in SystemVerilog, and assertions.

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13 views3 pages

(Spring 2022) Final Exam

This document outlines the exam details for the Selected Topics in Computer Engineering course at Ain Shams University, including instructions on prohibited items during the exam. It consists of four questions covering various topics in computer engineering, with a total of 90 marks available. The exam is scheduled for June 23, 2022, and includes questions on verification, constraints in SystemVerilog, and assertions.

Uploaded by

memo.sherif.188
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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AIN SHAMS UNIVERSITY

FACULTY OF ENGINEERING
Department of Electrical Engineering
4th Year, Computer & Systems Engineering
2nd Semester, 2021/2022 Course Code: CSE 412 Time allowed: 2 Hrs.
Selected Topics in Computer Engineering
The Exam Consists of Four Questions in Three Pages. Maximum Marks: 90 Marks 1/3
‫تعليمات هامة‬
.‫حيازة التيلفون املحمول مفتوحا داخل لجنة المتحان يعتبر حالة غش تستوجب العقاب وإذا كان من الضرورى الدخول باملحمول فيوضع مغلقا فى الحقائب‬ •
.‫ل يسمح بدخول سماعة األذن أو البلوتوث‬ •
.‫ليسمح بدخول أي كتب أو مالزم أو أوراق داخل اللجنة واملخالفة تعتبر حالة غش‬ •

Question 1: [ILO: a1, a2, a3] [35 Marks]


A. State briefly what is the difference between testing and verification?
B. Make a comparison between code coverage and functional coverage.
C. Comment briefly on the following two statements (agree or disagree and why):
- 100% functional coverage ensures that the design can have no bugs.
- 100% code coverage guarantees that the test bench is very well written.
D. One of the practical problems in simulation-based verification is the large input space.
State briefly how the problem is tackled in real life.
E. State the differences between formal verification and simulation-based verification
F. What are the two main types of formal verification?
G. What is the difference between rand and randc in System Verilog?

Question 2: [ILO: c1, c2] [10 marks]


1. Logic variables can have multiple drivers
a. True b. False

2. Target to the completion of Verification process is


a. Functional coverage 100% and code coverage is 100%
b. If all the test cases ran
c. Functional coverage 100% and code coverage is not considered
d. Code coverage should be 100% and functional coverage is not considered

3. array [4][8]. This array declaration type is:


a. Compact declaration
b. Verbose declaration
c. Single dimension array declaration
d. None of the above

4. modport is used to
a. declare input and output skew
b. declare direction of signals
c. synchronize signals
d. make interface complex

5. Randomization of any random variable can be disabled


a. by overriding in post_randomize function
b. by setting rand_mode of particular variable to ‘0’
c. by setting constraint_mode to ‘0’
d. by constraining particular variable to ‘0’
AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
COMPUTER & SYSTEMS ENGINEERING DEPARTMENT, 4th Year, ELECTRICAL ENGINEERING
2nd Semester, 2021-2022 Course Code: CSE 412 Time Allowed: 2 Hrs.
Selected Topics in Computer Engineering
The Exam Consists of Four Questions in Three Pages. 2/3

Question 3: [ILO: b2, b3] [25 marks]


A. Write constraints into the following class to create a random array of integers such that
array size is between 10 and 20 and the values of the array are in descending order,
and the elements of the array are less than 30.

B. What is wrong with following SystemVerilog constraint? Write it correctly.

C. How many bins are created in following example for coverpoint cp_x ?

D. What are the transitions covered by following coverpoint?

E. Is this a correct code? State the reason.


AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
COMPUTER & SYSTEMS ENGINEERING DEPARTMENT, 4th Year, ELECTRICAL ENGINEERING
2nd Semester, 2021-2022 Course Code: CSE 412 Time Allowed: 2 Hrs.
Selected Topics in Computer Engineering
The Exam Consists of Four Questions in Three Pages. 3/3

Question 4: [ILO: b1, b2, c1, c2] [20 marks]


A. Write concurrent SVA to express the following:
• Every time a request signal req is high (at the rising edge of the clock), an
acknowledgement signal ack becomes high exactly 3 clocks later.
• Every time (at the rising edge of the clock) the valid signal vld is high, the cnt signal
is incremented by 1.

B. Two signal lines r1 and r2 are mutually exclusive (i,e both of them cannot be high at
the same time). The following assertion is used to take care of that. State whether this
assertion is right or wrong with justification.

C. A finite state machine is described by the following state diagram. It has one input pi, a
clock signal clk, and one signal called initialize, which puts the machine in the state L0
whenever it is active. Write a coverage group to check whether all the transitions have
been exercised.
initialize 0
L0 L1
1
0
1
0 1

L2

D. What is the maximum coverage you can get from the following coverage group? How
to increase the maximum coverage in this case?

END of Exam, Good Luck

Examination Committee Exam Date : 23rd of June, 2022


Prof. Dr. Ayman Wahba, Prof. Dr. M. Watheq El-Kharashy, Prof. Dr. Mohamed Taher

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