Cst202 Computer Organization and Architecture May 2024
Cst202 Computer Organization and Architecture May 2024
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Reg No.:
PART A
(Ansuter oll questions; each question carries 3 marks) Marks
Explain how the PC, IR, MAR and MDR registers are used during the instruction -3
execution cycle.
diagram.
5 Illustrate divide overflow condition in rdstoring division u'ith help of an example. 3
6 Differentiate between unifunction and multifunctionpipelines. 3
7 Draw the block diagram for a control unit using PLA based organization. 3
organization?
9. Does Direct Memory Access increase the efficiency of processor? Justiff your 3
answer.
l0
" Explain the need for using cache memory within the computer system. .3
PART B
(Answer onefull questionfrom each module, eoch question carries 14 marks)
Module -1
ll a) What do you mean by byte addressable memory? Explain the two different types 7
Explain how register transfers and ALU operations are carried out in the single
bus organisation.
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thev use.
Module -2
13 a) What is the role of status register within the processor? Draw the circuit diagram 7
for a basic status register for an 8-bit ALU and explain how the carry and
'
. overflow status bits are set.
b) What is a control word? Explain, using an example, how a control word can be 7
14 a) Draw the circuit diagram and function table for one stage of the logic unit for a 7
4-bit ALU with following logic operations - AND, O& XOR and NOT. Explain
the working.
b) Illustrate the use of accumulator register. Explain processor organization using 7
Module -3
l5 a) Explain the advantage of using an array multiplier. Design a3x2 array multiplier. 7
I i) Clock period
ii) Speedup
. iii) Efficiency
iv) Throughput
16 . a) Illustrate Booth's Multiplication algorithq with help of a flowchart and an 7
example.
b) Summarize the different techniques used for pipeline hazard resolution. 7
Module -4
17 a) Are
.there
any advantages in using PLA based or microprogrammed control 7
organizations when compared to the hardwired organizations? Explain your
answer.
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lE Surunsize, with help of urexunple, the steps involved in dcigning e hsdwired 14
refreshing?
b) Hon, fu the processor rcact wlren an intemrpt is raised by an I/O d€r,be? 7
20 - a) WhafisaR0M?ListardexplainfrreditrerenttypesofROMs. 7
b) What atc two rrofu in u/tich Direct Memory Transfer can operaF? ExplEin 7
their diftrences.
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