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Digital Logic Design DLD Lab Report 3

The document outlines a lab report for Digital Logic Design, focusing on simplifying Boolean expressions using Karnaugh maps and implementing them with hardware and software platforms. It details the objectives, tasks, truth tables, Karnaugh maps, and simplified Boolean expressions for various configurations. The report also includes implementations using basic gates and universal gates (NAND & NOR) with corresponding truth tables and circuit diagrams.

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salwamir51621
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13 views

Digital Logic Design DLD Lab Report 3

The document outlines a lab report for Digital Logic Design, focusing on simplifying Boolean expressions using Karnaugh maps and implementing them with hardware and software platforms. It details the objectives, tasks, truth tables, Karnaugh maps, and simplified Boolean expressions for various configurations. The report also includes implementations using basic gates and universal gates (NAND & NOR) with corresponding truth tables and circuit diagrams.

Uploaded by

salwamir51621
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 12

Submitted By: Syed Asfar Ahmad Bukhari

Muhammad Faisal

Roll No. SP21-BSE-088


SP21-BSE-020

Section: C

Department: Software Engineering

Course: DLD (Digital Logic Design)

Submitted To: Muhammed Mohsin


LAB # 3:
“To Show the output of simplified Boolean Expression by
following the k-map, using Hardware and Software Platforms”

Objectives:
• To display the Boolean expression in its simplified form using Karnaugh map
• To display the results of simplified Boolean expression using hardware and software
platforms
• To show simplified Boolean expression using universal gates

Lab Tasks Part-1:


Lab Task 1:
Realization of Boolean expression:

Truth Table:
Input Output
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

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Boolean Expression:

AB

CD 1
0 0 0

0 0 0 1

0 0 0 1

1 1 1 1

Y = A’B’CD’ + A’BCD’ + ABCD’ + AB’CD’ + AB’CD + AB’C’D + AB’C’D’

Simplified Boolean Expression:

Y = AB’ + CD’
Lab Task 2:
For the given truth table simplify the Boolean expression by using K-Map

Input Output
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0

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1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

Karnaugh Maps:
CD
AB
1 1 0 0

1 1 0 0

0 1 1 0

0 0 0 0

Y = A’B’C’D’ + A’B’C’D + A’BC’D’ + A’BC’D + ABC’D + ABCD

Simplified Boolean Expression:


Y = A’C’ + ABD

Part 2 – Boolean Expression using Basic gates


Lab Tasks Part-2:
Lab Task 1:
Implement the following simplified function by using basic gates as
mentioned in Task 1
𝑌=𝐴𝐵′+𝐶 𝐷'

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INPUT OUTPUT
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

Page 5 of 12
K-Map:

A′B′ A′B AB AB′

1
C′D′ 0 0 0

C′D 0 0 0 1

CD 0 0 0 1

CD′ 1 1 1 1

Simplified Boolean Expression:


Y=AB′+CD′

Implement the Task 2 of Part 1 by using Basic Bate:

Page 6 of 12
Truth Table:
INPUT OUTPUT
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

K-Map:

A′B′ A′B AB AB′

C′D′ 1 1 0 0

C′D 1 1 1 0

CD 0 0 1 0

CD′ 0 0 0 0

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Simplified Boolean Expression:
A′C′+ABD+BC′D
Simplified Logic Diagram:

Post Lab:
Implement the Task 2 of Part 1 by using universal gates (NAND & NOR)
1) Circuit Diagram Using NAND Gate:

Page 8 of 12
Truth Table:
INPUT OUTPUT
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

K-Map:

A′B′ A′B AB AB′

C′D′ 1 1 0 0

C′D 1 1 1 0

CD 0 0 1 0

CD′ 0 0 0 0

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Boolean Expression:
A′B′C′D′+ A′BC′D′+ A′B′C′D+ A′B′C′D′+ AB′C′D+ ABC′D+ ABCD
+A′BC′D+ABC′D
Simplified Boolean Expression:
A′C′+ABD+BC′D
Simplified Logic Diagram:

2) Circuit Diagram Using NOR Gate:

Page 10 of 12
Truth Table:
INPUT OUTPUT
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

K-Map:

A′B′ A′B AB AB′

C′D′ 1 1 0 0

C′D 1 1 1 0

CD 0 0 1 0

CD′ 0 0 0 0

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Boolean Expression:
A′B′C′D′+ A′BC′D′+ A′B′C′D+ A′B′C′D′+ AB′C′D+ ABC′D+ ABCD
+A′BC′D+ABC′D
Simplified Boolean Expression:
A′C′+ABD+BC′D
Simplified Logic Diagram:

Page 12 of 12

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