Lecture1-EE739 2
Lecture1-EE739 2
Virendra Singh
Professor
Computer Architecture and Dependable Systems Lab
Department of Electrical Engineering
Indian Institute of Technology Bombay
http://www.ee.iitb.ac.in/~viren/
E-mail: [email protected]
EE-739: Processor Design
Lecture1 (11 Jan 2021) CADSL
Historic Events
• 1623, 1642: Wilhelm Strickland/Blaise Pascal built a
mechanical counter with carry.
1972 Now
CADSL
The Current Generation
• Personal computers
• Laptops and Palmtops
• Networking and wireless
• SOC and MEMS technology
• And the future!
• Biological computing
• Molecular computing
• Optical computing
• Quantum computing
Intel 4004
RISC
EE-739@IITB CADSL
Needed: Energy Efficient Computing
Performance: 11PF
Power: 6 – 11 MW (idle to loaded)
10 MW = $10 M per year electricity
UIUC Blue Waters Supercomputer
Instructions Time
= X
Program Instruction
(code size)
Architecture
Compiler Designer
software
instruction set
hardware
Windows 7
Applications
Visual C++