Assignment_1
Assignment_1
Kanishk Devatwal(ee23btech11029)
January 2025
Problem 1:
1(a):
LTSPICE model:
Figure 1: 1(a)
Simulation result obtained after running transient analysis with start time
0 ms and end time 3ms:
Figure 2: Caption
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For a 5V DC input it is giving 1TV as output voltage. It is very high because
the current entering the node is higher than current leaving hence the potential
at that point has increased.
1(b):
LTSPICE model:
Figure 3: 1(b)
While running the transient analysis in this circuit, it is giving the following
error message ”Voltage sources V1 and V2 are paralleled making an over-defined
circuit matrix”.
To avoid error we can add some series resistance with very less value between
V1 and V2.
If the resistance tends to 0 the current drawn would tend to infinite.
Problem 4:
(i)Square Wave Approximation:
A square wave can be approximated by summing sinusoidal waves of odd
harmonics of a fundamental frequency of 5kHz.
∞
π X 1
x(t) = sin(2πkfo t)
4 k
k=1,3,5,...
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Figure 4: Generated square wave
(ii)Waveform Amplification:
The gain A(ω) depends on the frequency of the components in the waveform.
We apply then gain to each harmonic frequency as per the ranges given in
question.
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Figure 6: Filtered Waveform
% D e f i n e f r e q u e n c y r a n g e s and c o r r e s p o n d i n g g a i n
g a i n ( f r e q u e n c i e s <= 10 e3 ) = 5 ; % Up t o 10 kHz
g a i n ( f r e q u e n c i e s > 10 e3 & f r e q u e n c i e s <= 50 e3 ) = 3 ; % 10 kHz t o 50 kHz
g a i n ( f r e q u e n c i e s > 50 e3 & f r e q u e n c i e s <= 200 e3 ) = 2 ; % 50 kHz t o 200 kHz
g a i n ( f r e q u e n c i e s > 200 e3 & f r e q u e n c i e s <= 1 e6 ) = 1 ; % 200 kHz t o 1 MHz
g a i n ( f r e q u e n c i e s > 1 e6 & f r e q u e n c i e s <= 1 . 1 e6 ) = 2 0 ; % 1 MHz t o 1 . 1 MHz
g a i n ( f r e q u e n c i e s > 1 . 1 e6 & f r e q u e n c i e s <= 2 e6 ) = 2 ; % 1 . 1 MHz t o 2 MHz
g a i n ( f r e q u e n c i e s > 2 e6 ) = 0 ; % Above 2 MHz
% Apply g a i n i n t h e f r e q u e n c y domain
X = f f t ( square wave ) ;
X amplified = X .∗ gain ;
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amplified wave = r eal ( i f f t ( X amplified ) ) ;
% Plot the r e s u l t s
figure ;
subplot (3 , 1 , 1 ) ;
p l o t ( t , square wave ) ;
t i t l e ( ’ O r i g i n a l Square Wave Approximation ’ ) ;
x l a b e l ( ’ Time ( s ) ’ ) ;
y l a b e l ( ’ Amplitude ’ ) ;
subplot (3 , 1 , 2 ) ;
plot ( t , amplified wave ) ;
t i t l e ( ’ A m p l i f i e d Waveform ’ ) ;
x l a b e l ( ’ Time ( s ) ’ ) ;
y l a b e l ( ’ Amplitude ’ ) ;
subplot (3 , 1 , 3 ) ;
plot ( t , filtered wave ) ;
t i t l e ( ’ F i l t e r e d Waveform (Low−Pass ) ’ ) ;
x l a b e l ( ’ Time ( s ) ’ ) ;
y l a b e l ( ’ Amplitude ’ ) ;
Problem 5
A non-linear device is with following output current given by:
Iout = β(VGS − VT )2
Given:
β = 1mA/V 2 , VGS = 1V, VT = 0.5V
Substituting the given values we got output current Io ut.
Transconductance(Gm ):
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δIout
Gm =
δVGS
Gm = 2β(VGS − VT H )
∆Iout ≤ 1% × Iout
∆Iout ≈ Gm ∆Vin
From the above condition, we can find the range of ∆Vin that satisfies this
constraint.
Matlab Code:
% Parameters a l r e a d y g i v e n i n q u e s t i o n
b e t a = 1 e −3; % 1 mA/Vˆ2
VGS DC = 1 ; % Gate−S o u r c e v o l t a g e i n V ( o p e r a t i n g p o i n t )
Vth = 0 . 5 ; % Threshold v o l t a g e in V
% DC O p e r a t i n g P oi nt
Iout DC = b e t a ∗ (VGS DC − Vth ) ˆ 2 ; % DC c u r r e n t
Gm = 2 ∗ b e t a ∗ (VGS DC − Vth ) ; % Transconductance
% Non−l i n e a r i t y c o n d i t i o n (1% d e v i a t i o n )
n o n l i n e a r i t y l i m i t = 0 . 0 1 ∗ Iout DC ; % 1% o f DC c u r r e n t
Vin max = n o n l i n e a r i t y l i m i t / Gm; % Max a l l o w a b l e Vin d e v i a t i o n
% Display r e s u l t s
f p r i n t f ( ’DC O p e r a t i n g Po in t ( Iout DC ) : %.2 f mA\n ’ , Iout DC ∗ 1 e3 ) ;
f p r i n t f ( ’ Transconductance (Gm) : %.2 f mS\n ’ , Gm ∗ 1 e3 ) ;
f p r i n t f ( ’ Range o f I n c r e m e n t a l Change i n Vin : %.4 f V\n ’ , Vin max ) ;
% P l o t I o u t vs VGS f o r v i s u a l i z a t i o n
VGS range = 0 : 0 . 0 1 : 1 . 5 ; % VGS v a l u e s f o r p l o t t i n g
I o u t r a n g e = b e t a ∗ ( VGS range − Vth ) . ˆ 2 ; % N o n l i n e a r output
I o u t r a n g e ( VGS range < Vth ) = 0 ; % C u t o f f r e g i o n
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I o u t l i n e a r = Iout DC + Gm ∗ ( VGS range − VGS DC ) ;
% H i g h l i g h t r a n g e f o r l e s s than 1% n o n l i n e a r i t y
V G S h i g h l i g h t = VGS DC + [−Vin max , Vin max ] ;
I o u t h i g h l i g h t = b e t a ∗ ( V G S h i g h l i g h t − Vth ) . ˆ 2 ;
% Plotting
figure ;
h o l d on ;
p l o t ( VGS range , I o u t r a n g e ∗ 1 e3 , ’ b ’ , ’ LineWidth ’ , 1 . 5 ) ; % N o n l i n e a r output
p l o t ( VGS range , I o u t l i n e a r ∗ 1 e3 , ’ r −−’, ’ LineWidth ’ , 1 . 2 ) ; % L i n e a r a p p r o x i m a t
s c a t t e r (VGS DC, Iout DC ∗ 1 e3 , 6 0 , ’ k ’ , ’ f i l l e d ’ ) ; % DC o p e r a t i n g p o i n t
p l o t ( VGS highlight , I o u t h i g h l i g h t ∗ 1 e3 , ’ go − ’ , ’ MarkerSize ’ , 8 , ’ LineWidth ’ , 1
% L a b e l s , l e g e n d , and g r i d
x l a b e l ( ’ V {GS} (V) ’ , ’ FontSize ’ , 1 2 ) ;
y l a b e l ( ’ I { out } (mA) ’ , ’ FontSize ’ , 1 2 ) ;
t i t l e ( ’ N o n l i n e a r De vi c e Output C h a r a c t e r i s t i c s ’ , ’ FontSize ’ , 1 4 ) ;
l e g e n d ( ’ I { out } ( N o n l i n e a r ) ’ , ’ L i n e a r Approximation ’ , ’DC O p e r a t i n g Point ’ , ...
’1% N o n l i n e a r i t y Range ’ , ’ L o c a t i o n ’ , ’ NorthWest ’ ) ;
g r i d on ;
hold o f f ;
Output of Simulation:
Iout = 0.25mA
Gm = 1mS
∆Vin = 0.0025V
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Following is the plot of Iout vs VGS
Problem 3:
To determine the threshold voltage Vth of a MOSFET, we analyze the Vgs values
corresponding to a small drain current Ids = 100 nA in both the saturation and
linear regions. Since Vth is defined as the gate-source voltage (Vgs ) at which
the drain current (Ids ) begins to flow, averaging the Vgs values obtained from
simulations in these two regions provides an approximate value for Vth .
For VDS = 0.1 V:
Figure 8:
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Now we run a DC sweep of VGS from 0V to 2V and plot IDS vs VGS
This figure shows plot between IDS and VGS in linear region, by adjusting
current scale we can get the saturation point of the plot.
From the graph, we can clearly observe the VGS value when IDS reaches
100 nA, which is VGS = 0.068 V.
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Now, let us set VDS = 1 V. The following is the simulation result:
By adjusting the current scale and plotting the current up to 100 nA, we
achieve the following result:
From this graph, we can clearly observe the VGS value when IDS reaches
100 nA, which is VGS = 0.052 V.
Now, we take the average of the two values to find Vth :
(0.067 + 0.052)
Vth = = 0.0595V
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Problem 2:
LTSPICE Circuit:
We first design the circuit given in the question and then set the input volt-
age as pulse which changes from 0 to 1 and than remain constant for 20ms.
We have to use values of R2 and C2 such that output voltage is free from
delay or transient behaviour.
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Figure 13:
In this example we uses their values same as of R1 and C1 and then running
the transient response by using command .tran 0.01m 10m in Spice directive.
We got the simulation output as shown:
Figure 14:
In this plot the Vout is half of the input voltage and is free from transient
behaviour without a delay.
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