MAHAKAVI BHARATHIYAR COLLEGE OF ENGINEERING

AND TECHNOLOGY
VASUDEVANALLUR-627 758.

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 MAHAKAVI BHARATHIYAR COLLEGE OF
ENGINEERING AND TECHNOLOGY
VASUDEVANALLUR- 627 758.

Name :

Year/Semester :

Department :

Register No :

BONAFIDE CERTIFICATE

Certified that this record is the bonafide record work of the above Student in the
EC3361Electronic Devices and Circuits Laboratory during the academic year 2024-2025.

Staff in-charge Head of the Department

Submitted for the University Practical Examination held on ………………

Internal Examiner External Examiner

 INDEX
EXP. DATE LISTOFEXPERIMENTS PAGE Marks Signature
NO NO ofthestaff

Characteristics of PN Junction Diode

1. and Zener diode.

2. Full Wave Rectifier with Filters

3. Design of Zener diode Regulator

Common Emitter input-output
4. Characteristics.

MOSFET Drain current and Transfer

5.
Characteristics.

Frequency response of CE and CS

6. amplifiers.

Frequency response of CB and CC

7. amplifiers.
Frequency response of Cascode
8. Amplifier
CMRR measurement of Differential
9. Amplifier

Class A Transformer Coupled Power

10. Amplifier.
SYMBOL & PIN DIAGRAM

CIRCUIT DIAGRAM:
FORWARD BIAS

REVERSE BIAS
 EX.NO:1(A) Characteristics of PN Junction diode
DATE:
AIM:
To plot the Volt Ampere characteristics of PN junction diode under forward and reverse
bias condition and to find the cut-in voltage, static resistance, dynamic resistance under forward
and reverse bias.

APPARATUS REQUIRED:

SI.NO
COMPONENTS/ EQUIPMENTS SPECIFICATIONS QUANTITY

1. Diode-PN IN4007 1
2. Resistors 1KΩ 1
3. Dual Regulated Power Supply (0-30)V 1

MC(0-1)V 1
4. Voltmeters
MC(0-15)V 1

MC(0- 1
5. Ammeters
500)µAMC(0- 1
20)mA
6. Breadboard 1
7. Connecting Wires Few

THEORY:

The semi conductor diode / PN junction diode is created by simply joining an n-type and a p-type
material together nothing more just the joining of one material with a majority carrier of
electrons to one with a majority carrier of holes.
The P-N junction supports uni-directional current flow. If +ve terminal of the input supply is
connected to anode (P-side) and–ve terminal of the input supply is connected to cathode (N-side),
then diode is said to be forward biased.
TABULATION
FORWARD BIAS REVERSE BIAS

VF IF(mA) VR IR(µA)
(Volts) (Volts)

MODEL GRAPH
 In this condition the height of the potential barrier at the junction is lowered by an amount equal
to given forward biasing voltage. Both the holes from p-side and electrons from n-side cross the
junction simultaneously and constitute a forward current (injected minority current – due to holes
crossing the junction and entering N-side of the diode, due to electrons crossing the junction and
entering P-side of the diode). Assuming current flowing through the diode to be very large, the diode
can be approximated as short-circuited switch.

If –ve terminal of the input supply is connected to anode (p-side) and +ve terminal of the
input supply is connected to cathode (n-side) then the diode is said to be reverse biased.

In this condition an amount equal to reverse biasing voltage increases the height of the
potential barrier at the junction. Both the holes on p-side and electrons on n-side tend to move away
from the junction thereby increasing the depleted region. However the process cannot continue
indefinitely, thus a small current called reverse saturation current continues to flow in the diode. This
small current is due to thermally generated carriers. Assuming current flowing through the diode to
be negligible, the diode can be approximated as an open circuited switch.

The volt-ampere characteristics of a diode explained by following equation:

𝐼=𝐼0(𝑒ƞ𝑉𝑇−1)
I – Current flowing in the diode

I0–Reversesaturationcurrent

V–Voltage applied to the diode

V–Volt equivalent of temperature

It is observed that Ge diode has smaller cut-in-voltage when compares to Si diode.
CALCULATIONS FROM THE GRAPH
1. Static Resistance: To find the forward static resistance locate a point on characteristic
curve obtained from the forward bias characteristics which is called operating point Q
and draw a line onto the X-axis and Y-axis to obtain VF and IF Calculate static forward
resistance using the formulae

𝑉
Static forward resistance𝑅𝑆 = 𝐹Ω at Q point
𝐼𝐹

2. Dynamic Resistance: The dc resistance of a diode is independent of the shape of the

characteristic in the region surrounding the point of interest. If a sinusoidal input is
applied rather than a dc input ,the varying input will move the instantaneous operating
point up and down a region of the characteristics and thus defines a specific change in
current and voltage. To find the ac or dynamic resistance draw a straight line drawn
tangent to the curve through the Q-point as shown in the figure will define a particular
change in voltage and current that can be used to determine the ac or dynamic resistance
for this region of the diode characteristics.

𝐷 𝑉
Dynamic Resistance𝑅𝐷 = Ω at Q point
𝐼𝐷
PROCEDURE FORWARD BIAS

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to anode of the diode and the
negative terminal to the cathode of the diode.
3. Forward voltage VF across the diode is increased in small steps and the forward current
is noted.
4. The readings are tabulated. A graph is drawn between VF and IF.

REVERSE BIAS

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to cathode of the diode and negative
terminal to anode of the diode.
3. Reverse voltage VR across the diode is increased in small steps and the Reverse current
is noted.
4. The readings are obtained are tabulated. A graph is drawn between VR and IR.

RESULT

Thus the VI characteristic of PN junction diode is verified .

i. Cut in voltage = ............... V

i. Static forward resistance = ............... Ω

ii. Dynamic resistance = ............... Ω

SYMBOL & PIN DIAGRAM

FORWARD BIAS

REVERSE BIAS
EXPERIMENT NO:1 (B) CHARACTERISTICS OF ZENER DIODE
DATE:

AIM:

To plot the Volt-Ampere characteristics of Zener Diode in reverse bias condition and
to find the Break down voltage in reverse bias condition.

APPARATUS REQUIRED:

Sl.No COMPONENTS/EQUIPMENTS SPECIFICATIONS QUANTITY

1. Diode-Zener FZ3.2 1
2. Resistors 1KΩ 1
3. Dual Regulated Power Supply (0-30)V 1

MC(0-1)V 1
4. Voltmeters
MC(0-10)V 1

5. Ammeters MC(0- 1
20)mAMC(0
-20)µA
6. Breadboard 1
7. Connecting Wires Few

THEORY:

Zener diodes have many of the same basic properties of ordinary semiconductor diodes.
When forward biased, they conduct in the forward direction and have the same turn on voltage as
ordinary diodes. For silicon this is about 0.6 volts.

In the reverse direction, the operation of a Zener diode is quite different to an ordinary diode.
For low voltages the diodes do not conduct as would be expected. However, once a certain
voltage is reached the diode "breaks down" and current flows. Looking at the curves for a Zener
diode, it can be seen that the voltage is almost constant regardless of the current carried. This
means that a Zener diode provides a stable and known reference voltage.
TABULATION
FORWARD BIAS REVERSE BIAS

VF IF(mA) VR IR(mA)
(Volts) (Volts)

MODEL GRAPH
PROCEDURE:
FORWARD BIAS:

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to anode of the diode and negative
terminal to cathode of the diode
3. The Forward Voltage VF across the diode is increased in small steps and the forward
current is noted.
4. The readings obtained are tabulated. A graph is drawn between VF and IF.

REVERSE BIAS:
1. The connections are made as per the circuit diagram.
2. The positive terminal of power supply is connected to cathode of the diode and
negative terminal to anode of the diode.
3. Reverse voltage VR across the diode is increased in small steps and the Reverse
current is noted.
4. The readings are tabulated. A graph is drawn between VR and IR.

RESULT:
Thus the characteristics of Zener diode were plotted and the Zener breakdown voltage
was determined and is given as V.
FULL WAVE RECTIFIER WITHOUT FILTER

FULL WAVE RECTIFIER WITH CAPACITIVE FILTER

EXPERIMENT NO: 2
DATE:
Full wave rectifier with capacitive filters
AIM:
To rectify the AC signal and then to find out the Ripple factor and percentage of
regulation in full wave rectifier with capacitive filter.

APPARATUS REQUIRED:

COMPONENTS /
Sl.No SPECIFICATIONS QUANTITY
EQUIPMENTS

1. Transformer 230V/(12-0-12)V 1
2. Diode 1N4007 2
1000µF,16V 1
3. Capacitors
470µF/25V 1
4. Resistor 10KΩ 1
5. Decade resistance box - 1
6. Dual Trace CRO 20MHz 1
7. Multimeter 1
8. Breadboard 1
9. Connecting Wires Few

THEORY
FULL WAVE RECTIFIER
Full wave rectifier utilizes both the cycle of input AC voltage. Two or four diodes are
used in full wave rectifier. If full wave rectifier is designed using four diodes it is known as
full wave bridge rectifier. Full wave rectifier using two diodes without capacitor is shown in
the figure. Center tapped transformer is used in this full wave rectifier. During the positive
cycle diode D1 conducts and it is available at the output. During negative cycle diode D1
remains OFF but diode D2 is in forward bias hence it conducts and negative cycle is available
as a positive cycle at the output. Note that direction of current in the load resistance is same
during both the cycles hence output is only positive cycles.
MODEL GRAPH

FULL WAVE RECTIFIER WAVEFORMS WITH AND WITHOUT FILTER

FULL WAVE RECTIFIER WITHOUT FILTER

No load Voltage (Vdc)= V

Ripple Factor
O/P Voltage(Vo)
Load
ResistanceRL (Ω) 𝑽
Vac(V) Vdc(V) = 𝑽𝒂𝒄
𝒅𝒄
Advantages of full wave rectifier over half wave rectifier:

 The rectification efficiency is double than half wave rectifier

 Ripple factor is less and ripple frequency is double hence easy to filter out.
 DC output voltage and current is higher hence output power is higher.
 Better transformer utilization factor
 There is no DC saturation of core in transformer because the DC currents in two
halves of secondary flow in opposite directions.

Disadvantages:

 Requires center tap transformer

 Requires two diodes compared to one diode in half wave rectifier.

PROCEDURE
FULL WAVE RECTIFIER
WITHOUT FILTER:
1. Connecting the circuit on bread board as per the circuit diagram.
2. Connect the primary of the transformer to main supply i.e. 230V,50Hz
3. Connect the decade resistance box and set the RL value to 100Ω
4. Connect the Multimeter at output terminals and vary the load resistance (DRB) from
100Ω to1KΩ and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance (DRB) and note down no load voltage Vdc (Vno load)
6. Connect load resistance at 1kΩ and connect Channel – II of CRO at output terminals
and CH – I of CRO at Secondary Input terminals observe and note down the Input and
Output Waveform on Graph Sheet.
7. Calculate ripple factor𝛾=𝑉𝑎𝑐/𝑉𝑑𝑐
𝑉𝑛𝑜𝑙𝑜𝑎𝑑 −𝑉𝑓𝑢𝑙𝑙𝑙𝑜𝑎𝑑
8. Calculate Percentage of Regulation,%ƞ= x100 %
𝑉𝑛𝑜𝑙𝑜𝑎𝑑

WITHCAPACITORFILTER:
1. Connecting the circuit as per the circuit Diagram and repeat the above procedure from
steps 2 to 8.
WITH FILTER

No load Voltage(Vdc)=V

Ripple Factor
O/P Voltage(Vo)
Load
Resistance Vac(V) Vdc(V) 𝑽
= 𝑽𝒂𝒄
RL (Ω) 𝒅𝒄

CALCULATIONS:
FULL WAVE RECTIFIER
Without filter
RF=Forward resistance of diode=30Ω
RL=Load Resistance
𝑉 𝑅
𝑉𝑑𝑐= 𝑚 𝐿
𝜋(𝑅+𝑅)
𝐹 𝐿

𝑉𝑚𝑅𝐿
𝑉𝑟𝑚𝑠=
2(𝑅 𝐹+ 𝑅𝐿)
1
2 2 /2
(𝑉𝑟𝑚𝑠−𝑉𝑑𝑐 )
Ripple factor,𝑟=
𝑉𝑑𝑐
𝑉𝑚
Average load voltage at no load =
𝜋

𝑉 𝑚𝑅 𝐿
Average load voltage at full load(𝑉𝐹𝐿 )=
2(𝑅𝐹+𝑅𝐿)

Withfilter
F=50Hz
𝑉𝑚𝑅𝐿
𝑉 𝑑𝑐 = 1
( +𝑅 𝐿)
4𝑓𝑐

1 𝑉𝑚
𝑉𝑟𝑚𝑠=( )(1 )
2√3𝑓𝑐 4𝑓𝑐
+ 𝑅𝐿
𝑉𝑟𝑚𝑠 𝑉
𝑅𝑖𝑝𝑝𝑙𝑒𝑓𝑎𝑐𝑡𝑜𝑟= 𝑟= (𝑜𝑟)= 𝑎𝑐
𝑉𝑑𝑐 𝑉𝑑𝑐
To calculate the percentage of Regulation
𝑉𝑛𝑜 𝑙𝑜𝑎𝑑 − 𝑉𝑓𝑢𝑙𝑙𝑙𝑜𝑎𝑑
%ƞ= 𝑥100%
𝑉𝑛𝑜𝑙𝑜𝑎𝑑
RESULT:
Thus the full wave rectifier with capacitive filter is designed and the corresponding Ripple
factor and percentage of Regulation are measured and verified with theoretical values.
TABULATION:

LOAD REGULATION LINE REGULATION

 EXPERIMENT NO: 3 ZENER AS VOLTAGE REGULATOR
Date

AIM:
To find the voltage regulation of a given Zener diode

APPARATUS:

1. Zener diode -1No.

2. Regulated Power Supply(0-30v) -1No.
3. Voltmeter(0-20v) -1No.
4. Ammeter(0-20mA) -1No.
5. Resistor(1Kohm)
6. Bread Board
7. Connecting wires

THEORY:

A Zener diodeis heavily doped p-n junction diode, specially made to operate in the break
down region. A p-n junction diode normally does not conduct when reverse biased. But if the
reverse bias is increased, at a particular voltage it starts conducting heavily. This voltage is
called Break down Voltage. High current through the diode can permanently damage the
device.

To avoid high current, we connect a resistor in series with zener diode. Once the diode starts
conducting it maintains almost constant voltage across the terminals whatever may be the
current through it, i.e., it has very low dynamic resistance. It is used in voltage regulators.

PROCEDURE:

Load Regulation and Line regulation characteristics:

1. Connect the Circuit as per the Circuit Diagram on the breadboard.
2. By changing the load Resistance, kept constant I/P Voltage at 5V, 10V, 15V as per table
given below. Take the readings of O/P Voltmeter(Vo=Vz).
3. Now by changing the I/P Voltage, kept constant load Resistance at 1K, 2K, 3K as per table
given below. Take the readings of O/P Voltmeter(Vo=Vz).

PRECAUTIONS:
1. The terminals of the Zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode.

RESULT:

Thus the voltage regulation of a given Zener diode was found.

PIN DIAGRAM OF BC107

CIRCUIT DIAGRAM: COMMON EMITTER CIRCUIT CHARACTERISTICS

MODEL GRAPH
EXPERIMENT NO: 4
DATE:
Common Emitter input-output characteristics
AIM:

To plot the input and output characteristics of a transistor connected in Common Emitter
Configuration and to find the dynamic resistance and amplification factor.
APPARATUS REQUIRED:

Sl.No COMPONENTS/EQUIPMENTS SPECIFICATIONS QUANTITY

Max Rating:
1. TransistorBC107 1
50V1A, 3W
2. Resistors 1KΩ 2
3. Dual Regulated Power Supply (0-30)V 1

MC(0-2)V 1
4. Voltmeters
MC(0-10)V 1

MC(0- 1
5. Ammeters
25)mA,MC(0- 1
100)µA
6. Breadboard 1
7. Connecting Wires Few

THEORY:

A Bipolar Junction Transistor or BJT is a three terminal device having two PN-
junctions connected together in series. Each terminal is given a name to identify it and these
are known as the Emitter (E), Base (B)and Collector (C).

There are two basic types of bipolar transistor construction, NPN and PNP, which basically
describes the physical arrangement of the P-type and N-type semiconductor materials from
which they are made.
TABULATION
INPUT CHARACTERISTICS

VCE= 1 V VCE= 2 V

VBE(V) IB(mA) VBE(V) IB(mA)

OUTPUT CHARACTERISTICS

IB= µA IB= µA

VCE(V) IC(mA) VCE(V) IC(mA)

Bipolar Transistors are "CURRENT" Amplifying or current regulating devices that control
the amount of current flowing through them in proportion to the amount of biasing current
applied to their base terminal.

The principle of operation of the two transistors types NPN and PNP, is exactly the same the
only difference being in the biasing (base current) and the polarity of the power supply for
each type.

In CE configuration, Emitter is common to both the input and output as shown in figure. The
direction of the arrow in the symbol shows current flow between the base and emitter
terminal, pointing from the positive P-type region to the negative N-type region, exactly the
same as for the standard diode symbol. For normal operation, the emitter-base junction is
forward-biased and the collector-base junction is reverse-biased.

DESCRIPTION:

Input Characteristics: The variation of the base current IB with the base-emitter voltage VBE
keeping the collector-emitter voltage VCE fixed, gives the input characteristic in CE mode.

Input Dynamic Resistance (ri): This is defined as the ratio of change in base emitter voltage
(ΔVBE) to the resulting change in base current (ΔIB) at constant collector-emitter voltage
(VCE). This is dynamic and it can be seen from the input characteristic, its value varies with
the operating current in the transistor:

𝛥𝑉𝐵𝐸
𝑟𝑖 = |
𝛥𝐼𝐵 𝑉𝐶𝐸

The value of ri can be any thing from a few hundreds to a few thousand ohms.

Output Characteristics: The variation of the collector current I C with the collector-emitter
voltage VCE is called the output characteristic. The plot of I C versus VCE for different fixed
values of IB gives one output characteristic. Since the collector current changes with the base
current, there will be different output characteristics or responding to different values of IB.

Output Dynamic Resistance(ro):This is defined as the ratio of change in collector-emitter

Voltage (ΔVCE) to the change in collector current (ΔIC) at a constant base current IB.

𝛥𝑉𝐶𝐸
𝑟𝑜 = | 𝐼𝐵
𝛥𝐼𝐶
The High magnitude of the output resistance (of order of 100kW) is due to the reverse biased
state of this diode.
Current amplification factor (β)
This is defined as the ratio of the change in collector current to the change in base current at a
constant collector-emitter voltage (VCE) when the transistor is in active state.

𝛥𝐼𝐶
𝛽𝑎𝑐 = |
𝛥𝐼𝐵𝑉𝐶𝐸
This is also known as small signal current gain and its value us very large. The ratio of IC and
IB we get what is called dc of the transistor. Hence,
𝐼𝐶
𝛽𝑑𝑐= |
𝐼𝐵𝑉𝐶𝐸
Since IC increases with IB almost linearly, the values of both dc and ac are nearly equal.

PROCEDURE
To find the input Characteristics
1. Connect the circuit as in the circuit diagram.
2. Keep VBB and VCC in zero volts before giving the supply.
3. Set VCE= 1Volt by varying VCC and vary the VBB smoothly with fine control such
that base current IB varies in steps of 5µA from zero up to 100µA, and note down the
corresponding voltage VBE for each step in the tabular form.
4. Repeat the experiment forVCE1 volt and 2volts.
5. Draw a graph between VBE vs .IB against VCE=Constant
To find the output characteristics
1. Start VEE and VCC from zero volts.
2. Set the IB=20µA by using VBB such that, VCE changes in steps of 0.2volts from zero
up to 10 volts, note down the corresponding collector current I C for each step in the
tabular form.
3. Repeat the experiment for IE=20µA and IE=40µA, tabulate the readings
4. Draw a graph between VCE vs IC against IB=Constant.

RESULT:

Thus the input and output Characteristic of BJT in Common Emitter Configuration were
plotted and the dynamic resistance and amplification factor were obtained.
,

CIRCUIT DIAGRAM:
,

EXPERIMENT N0: 5
DATE
N-CHANNEL MOSFET DRAIN AND TRANSFER CHARACTERISTICS

AIM:

To study transfer and output characteristics of an n-channel Metal Oxide Semiconductor field
effect Transistor (MOSFET) in Common-source configuration.

APPARATUS:
MOSFET(2N7000),
Breadboard, resistor (1KΩ, 100KΩ),
Connecting wires,
Ammeters (0‐10mA/ 0‐25mA),
DC power supply
(0‐30V)multimeter.

THEORY:

The MOSFET is actually a four-terminal device, whose substrate, or body terminal must be always
held at one of the extreme voltage in the circuit, either the most positive for the PMOS or the most
negative for the NMOS. One unique property of the MOSFET is that the gate draws no measurable
current.

PROCEDURE:

OUTPUT/ DRAIN CHARACTERISTICS:

1. Connect the circuit as per given diagram properly.
2. Keep VGS constant at some value say1.1 V by varying VGG
3. Vary VDS in step of 1V upto 10volts and measure the drain current ID.Tabulate all the readings.
4. Repeat the above procedure for VGSas1.2V, 1.3V, 1.4V, 1.5V etc

TRANSFER CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Set the voltage VDSconstant at10V.
3. Vary VGS by varying VGG in the step of 0.1 upto 1.55 V and note down value of drain current
ID. Tabulate all the readings.
4. Plot the output characteristics VDS vs ID and transfer characteristics VGS vs ID.
5. Calculate VT, gm, from the graphs and verify it from the datasheet
,

OBSERVATION TABLE:

OUTPUT/ DRAIN CHARACTERISTICS

VGS= 1.1 V VGS= 1.2 V VGS= 1.3 V VGS= 1.4 V VGS= 1.5 V

VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)

0 0 0 0 0

1 1 1 1 1

2 2 2 2 2

. . . . .

. . . . .

. . . . .

Upto10 Upto 10 Upto 10 Upto 10 Upto 10

TRANSFER CHARACTERISTICS
VDS= 10 V

VGS(V) ID(mA)

0.1

1.1

1.2

1.3

1.4

1.5

1.55
,

CALCULATION:

1. Threshold voltage VT:Gate to source voltage at which, drain current starts flowing.

2. Transconductance gm: Ratio of small change in drain current (ΔID) to the

corresponding change in gate to source voltage (ΔVGS) for a constant VDS.

gm= Δ ID/ ΔVGS at constant VDS

3. Output drain resistance: It is given by the relation of small change in drain to source
Voltage (ΔVDS) to the corresponding change in Drain Current (ΔID) for a constant VGS.

rdorro= ΔVDS/ΔI Data constant VGS

RESULTS:
1. VT:
2. gm :
3. ro:
,

PIN DIAGRAM

CIRCUIT DIAGRAM FOR CE AMPLIFIER

 ,

EXPERIMENT NO: 6(A)

DATE:
Frequency response characteristics of a Common Emitter
Amplifier
AIM:
To design and construct BJT CE amplifier using voltage divider bias and to obtain its
frequency response.

APPARATUS REQUIRED:

COMPONENTS
Sl.No SPECIFICATIONS QUANTITY
/EQUIPMENTS

1. TransistorBC107 Max Rating:50V 1A, 3W 1

56KΩ 1
12KΩ 1
2. Resistor 2.2KΩ 1
10KΩ 1
560Ω 1
0.1µF 1
3. Capacitor
22µF 1
4. Dual Regulated Power Supply (0-30)V 1

5. CRO (0-30)MHz 1

6. Function Generator (0– 1)MHz 1

7. Breadboard 1
8. Connecting Wires Few
9. BNC CRO probe 2

THEORY:
Common Emitter amplifier has the emitter terminal as the common terminal between
input and output terminals. The emitter base junction is forward biased and collector base
junction is reverse biased, so that transistor remains in active region throughout the operation.
When a sinusoidal AC signal is applied at input terminals of circuit during positive half cycle
the forward bias of base emitter junction VBE is increased resulting in an increase in IB, the
increase in IB, VCE is correspondingly
,

TABULATION
Vi=1V

Frequency(Hz) VO(V) (𝑉𝑂/𝑉𝑖)

𝐺𝑎𝑖𝑛=20log⁡

MODEL GRAPH

decreased. i.e. output voltage gets decreased. Thus in a CE amplifier a positive going signal is
converted into a negative going output signal i.e. 180° phase shift is introduced between
output and input signal and it is an amplified version of input signal.
,

PROCEDURE:

1. Connect the circuit as per the circuit diagram

2. Set Vin=2 Vin the signal generator. Keeping input voltage constant, vary the frequency
from 1Hz to 3MHz in regular steps.
3. Note down the corresponding output voltage.
4. Plot the graph: Gain in dB Vs Frequency in Hz.
5. Calculate the Band width from the Frequency response graph.

RESULT:

Thus a BJT CE amplifier with voltage divider bias was designed and plotted the frequency
response curve
 ,

CIRCUIT DIAGRAM

MODEL GRAPH

INPUT WAVEFORM

B) OUTPUT WAVEFORM
 ,

EXPERIMENT NO: 6(B)

DATE:
FREQUENCY RESPONSE OF COMMON SOURCE FET
AMPLIFIER
AIM:

1. To obtain the frequency response of the common source FET Amplifier

2. To find the Bandwidth.

APPARATUS:

N-channel FET (BFW11) -

1No.Resistors(6.8KΩ,1MΩ,1.5KΩ) -
1No.EachCapacitors0.1µF, -2Nos
47µF -1No.
Regulated power Supply(0-30V) -1No.
Functiongenerator -1No.
CRO -1No.
-1pair

THEORY:
A field-effect transistor (FET) is a type of transistor commonly used for weak-signal
amplification (for example, for amplifying wireless (signals). The device can amplify analog or
digital signals. It can also switch DC or function as an oscillator. In the FET, current flows along
a semiconductor path called the channel. At one end of the channel, there is an electrode called
the source. At the other end of the channel, there is an electrode called the drain. The physical
diameter of the channel is fixed, but its effective electrical diameter can be varied by the
application of a voltage to a control electrode called the gate. Field-effect transistors exist in two
major classifications. These are known as the junction FET(JFET)and the metal-oxide-
semiconductor FET(MOSFET). The junction FET has a channel consisting of N-type
semiconductor (N-channel) or P-type semiconductor (P-channel) material; the gate is made of the
opposite semiconductor type. In P-type material, electric charges are carried mainly in the form
of electron deficiencies called holes. In N-type material, the charge carriers are primarily
electrons. In a JFET, the junction is the boundary between the channel and the gate. Normally,
this P-N junction is reverse-biased (a DC voltage is applied to it) so that no current flows
between the channel and the gate. However, under some conditions there is a small current
through the junction during part of the input signal cycle. The FET has some advantages and
some disadvantages relative to the bipolar transistor.
 ,
FREQUENCY RESPONSE PLOT

TABULATION

S.NO OutputVoltage(Vo) Voltagega Gain

in=V0/Vin indB=20log10(V0/Vi
n)
,

Field-effect transistors are preferred for weak-signal work, for example in wireless,
communication and broadcast receivers. They are also preferred in circuits and systems requiring
high impedance. The FET is not, in general, used for high-power amplification, such as is
required in large wireless communications and broadcast transmitters.
Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. A single IC can
contain many thousands of FETs, along with other components such as resistors, capacitors, and
diodes. A common source amplifier FET amplifier has high input impedance and a moderate
voltage gain. Also, the input and output voltages are 180 degrees out of Phase.

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A signal of 1 KHz frequency and 20mVpeak-to-peak is applied at the Input of
amplifier.
3. Output is taken at drain and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20 log10(V0/Vi)
5. Repeat the above steps for various input voltages.
6. Plot Av in dB Versus Frequency
7. The Bandwidth of the amplifier is calculated from the graph using the Expression,
BandwidthBW=f2-f1

Where f1 is lower 3 dB frequency f2 is upper3 dB frequency

PRECAUTIONS:
1. All the connections should be tight.
2. Transistor terminals must be identified properly

RESULT:

Thus the frequency response of the common source FET Amplifier was drawn and
Bandwidth was calculated.

Bandwidth=
,
,
 ,

EXPERIMENT NO:7A
DATE:
DESIGN OF COMMON BASE AMPLIFIER CIRCUIT

AIM:
To design and construct a Common Base amplifier circuit using and to calculate its bandwidth and
cutoff frequency.

EQUIPMENTS REQUIRED:

S.NO EQUIPMENT RANGE QUANTITY

1 Transistor BC547 1
2 RPS (0-30)V 1
3 Resistor 22K 1
4 Resistor 4.7K 1
5 Resistor 330 Ω 1
6 Resistor 1.2K 1
7 Capacitor 1 uf 3
8 BreadBoard - 1
9 Single strand Wires - -
10 CRO 30 MHz 1
11 CRO Probes - 3
12 Function Generator (0-3)MHz 1

THEORY
An amplifier is used to increase the signal level; the amplifier is use to get a larger signal output
from a small signal input The transistor can be used as a amplifier, if it is biased to operate in the
active region, i.e. base-emitter junction is to be forward biased, while the base –collector junction
to be reverse biased. Common-Base amplifier is constructed using self-bias circuit. The resistors
R1, R2 and RE are biasing resistors. Acts as a potential divider. Due to the change in the
temperature or β, the base current increases so this makes to increase the collector current IC,
therefore a Reverse Leakage Current ICO increases hence this affects the stability of transistor. By
providing an emitter resistor RE, it creates a voltage drop across RE therefore the increased emitter
current due to IC starts to flow through RE to ground and this makes in the reduction of Base
Emitter Voltage VBE. Due to reduction in V BE, base current IB reduces and hence collector Current
IC also reduces and the output remains constant.
For the common base amplifier the AC Input resistance is typically low from 10to100Ω.The output.
 ,

TABULATION
Vin =

Frequency Output Voltage(Vo) Gain=20log(Vo/Vi)(db)

SL.NO
(Hz)
 ,

resistance of CB amplifier is typically high from 50KΩ to 1MΩ. Typical values of voltage amplification
(Av) for CB amplifier vary from 50 to 300. The current amplification is always less than 1. The basic CB
amplifying action was proposed for transferring the current from low resistance to high resistance circuit.

PROCEDURE

1. Connect the circuit as per the circuit diagram

2. Set Vs=50mV using signal generator.
3. Keep the input voltage constant; vary the frequency from 50 Hz to 3 MHz insteps.
4. Note down the corresponding output voltage.
5. Plot the graph gain Vs frequency.
6. Calculate the bandwidth from the graph.

RESULT

Hence designed and constructed the Common Base Amplifier and calculated the
bandwidth and cut-off frequency.
 ,

CIRCUIT DIAGRAM:

INPUT WAVWFORM

OUTPUT WAVEFORM
 ,

EXPERIMENT NO: 7(B)

DATE:

FREQUENCY RESPONSE OF CC AMPLIFIER

AIM:

1. To measure the voltage gain of a CC amplifier

2. To draw the frequency response of the CC amplifier

APPARATUS REQUIRED:

TransistorBC107 -1No.
Regulated Power Supply (0-30V) -1No.
Function Generator -1No.
CRO -1No.
Resistors 33KΩ, 3.3KΩ, 330Ω, -1No.Each
1.5KΩ, 1KΩ, 2.2KΩ & 4.7KΩ

Capacitors10µF -2Nos
100µF -1No.
Breadboard
Connecting wires

THEORY:

In common-collector amplifier the input is given at the base and the output is taken at the emitter. In
this amplifier, there is no phase inversion between input and output. The input impedance of the CC
amplifier is very high and output impedance is low. The voltage gain is less than unity. Here the collector is
at ac ground and the capacitors used must have a negligible reactance at the frequency of operation.

This amplifier is used for impedance matching and as a buffer amplifier. This circuit is also known as
emitter follower.

The most common use of the emitter follower is as a circuit, which performs the function of impedance
transformation over a wide range of frequencies.
 ,

TABULATION:

INPUT VOLTAGE Vi=20mV

Frequency(HZ) Output Voltage(Vo) Gain in dB Av=20log10(V0/Vi)

 ,

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. The voltage gain calculated by using the expression Av=V0/Vi
3. For plotting the frequency response the input voltage is kept constanta20mVpeak-to-peak and the
frequency is varied from 100Hz to 1MHz.
4. Note down the values of output voltage for each frequency.
5. The voltage gain in dB is calculated by using the expression,

Av=20log10(V0/Vi)
6. A graph is drawn by taking frequency on X-axis and gain in dB on y-axis on semi-log graph sheet.
7. The Bandwidth of the amplifier is calculated from the graph using the Expression,
Bandwidth BW=f2-f1
Where f1is lower cut-off frequency of CE amplifier ; f2is upper cut-off frequency of CE amplifier

8. The gain Bandwidth product of the amplifier is calculated using the Expression,

Gain -Bandwidth product=3-dB midband gain X Bandwidth

PRECAUTIONS:
1. The input voltage must be kept constant while taking frequency response.
2. Proper biasing voltages should be applied.

RESULT:

Thus the voltage gain of a CC amplifier was measured and the frequency response of the CC
amplifier was drawn.
CIRCUIT DIAGRAM:

MODEL CALCULATIONS

i) For common mode signal

V1= Volts V2= Volts

𝑉𝑂
𝐺𝑎𝑖𝑛 𝐴𝐶=
((𝑉1 +𝑉2)/2)

AC=

ii) For differential mode signal

V1= Volts V2= Volts

𝑉𝑂
𝐺𝑎𝑖𝑛 𝐴𝑑=
(𝑉1 −𝑉2)

Ad=

CMRR in dB=20 log10(Ad/Ac)

EXPERIMENT NO: 9

DATE:
Differential amplifier using FET
AIM:
To construct the Differential Amplifier in Differential mode and to find the common
mode rejection ratio (CMRR).

APPARATUSREQUIRED:

COMPONENTS
Sl.No SPECIFICATIONS QUANTITY
/EQUIPMENTS

1. FET BFW10 2
2. Resistor 1KΩ 3
3. Dual trace CRO 20MHz 1
4. Dual Regulated Power Supply (0-30)V 1
5. Breadboard 1
6. Connecting Wires Few

THEORY

A differential amplifier is a type of electronic amplifier that amplifies the

differencebetweentwoinputvoltagesbutsuppressesanyvoltagecommontothetwoinputs.
Differential amplifiers are usually implemented with a basic two-transistor circuit called a long-
tailed pair or differential pair. This circuit was originally implemented using a pair of vacuum
tubes. The circuit works the same way for all three-terminal devices with current gain. The
long-tail resistor circuit bias points are largely determined by Ohm's Law and less so by active
component characteristics.
Common mode Rejection Ratio

CMRR=|Ad/Ac|
Where
Ad =Differential mode gain
Ac=Common mode gain
 1. Connections are made as per the circuit diagram.
2. Switch ON the RPS
3. Vary the input voltages using function generator and note the corresponding output voltage.
4. ReducetheRPSvoltageto0V
5. Calculate the Gain.
6. Calculate the CMRR

RESULT

Thus constructed a differential amplifier circuit for single input balanced output in the common
mode and differential mode configuration and studied the output waveform, also its CMRR has been
determined and verified practically.

Differential mode :

Common mode :

CMRR :
,

CASCODE AMPLIFIER CIRCUIT DIAGRAM

 ,

EXPERIMENT NO: 8
DATE:
CASCODE AMPLIFIERS
AIM:
To design and construct a cascade amplifier circuit and to draw its frequency response graph.

EQUIPMENTS REQUIRED

S.NO EQUIPMENT RANGE QUANTITY

1 Transistor BC547 2
2 RPS (0-30)V 1
3 Resistor 1.2K,33 K,22K, 12K 1
4 Resistor 680Ω 1
5 Capacitor 1 uf,2.2uf 2
6 BreadBoard - 1
7 Single strand Wires - -
8 CRO (0-30)MHz 1
9 CRO Probes - 3
10 Function Generator (0-3)MHz 1

THEORY
A cascode amplifier comprises of a common emitter amplifier and a common base amplifier
stages in cascade. In the circuit diagram Q1 common base configuration and Q2 is common emitter
configuration. Principal advantage of this circuit is its low internal capacitance which is a limiting factor
gain at high frequencies. Cascode amplifier can able to amplify wide range of frequencies than that is
possible with CE amplifier. This is because no high frequency feedback occurs from the output back to
input through the miller capacitance as it occurs in transistor CE configuration. Cascode amplifier
provides same voltage gain of CE amplifier but in wide range of frequencies. The advantage of CE and
CB stages are put together in cascode connection.
 ,

TABULATION

Vin=
Frequency Output Gain=20log(Vo/Vi)
SL.NO
(Hz) Voltage(Vo) (db)
 ,

PROCEDURE

1. Connect the circuit as per the circuit diagram

2. Set Vs=50mV using signal generator.
3. Keep the input voltage constant; vary the frequency from 50 Hz to 1 MHz in steps.
4. Note down the corresponding output voltage.
5. Plot the graph gainVs frequency.
6. Calculate the bandwidth from the graph

RESULT

Hence designed and constructed Cascode amplifier and plotted its frequency response.
 CIRCUIT DIAGRAM:

GRAPH:
INPUT WAVEFORM

OUTPUT WAVEFORM

ELECTRONICDEVICESANDCIRCUITSLAB
 EXPERIMENT NO: 10
DATE:

CLASS-A POWER AMPLIFIER (TRANSFORMER COUPLED)

AIM:

To observe the input and output waveforms and to calculate the efficiency of CLASS

A Power Amplifier.

EQUIPMENT REQUIRED:

S.NO EQUIPMENT RANGE QUANTITY

1 Transistor BC547 2
2 RPS (0-30)V 1
3 Resistor 1.2K,33 K,22K, 12K 1
4 Resistor 680Ω 1
5 Capacitor 1 uf,2.2uf 2
6 BreadBoard - 1
7 Single strand Wires - -
8 CRO (0-30)MHz 1
9 CRO Probes - 3
10 Function Generator (0-3)MHz 1

THEORY:

The amplifier is said to be class A power amplifier if the q point and the input signal are
selected such that the output signal is obtained for a full input cycle. For this class the position
of q point is approximately at the midpoint of the load line. For all the values of input signal
the transistor remains in the active region and never entire into the cutoff or saturation region.
The collector current flows for 3600 (lifecycle) of the input signal in other words the angle of
the collector current flow is 3600 the class A amplifiers or furthers classified as directly
coupled and transformer coupled and transformer coupled amplifiers in directly coupled type.
The load is directly connected in the collector circuit while in the transformer coupled type,
the load is coupled to the collector using the transformer.
Advantages:

1. Distortion analysis is very important

2. It amplifies audio frequency signals faithfully hence they are called as audio
 amplifiers

Disadvantages:

1.Hparameter analysis is not applicable

PROCEDURE

1. Connect the circuit as per the circuit diagram

2. Set Vs=50mV using signal generator.
3. Keep the input voltage constant; vary the frequency from 50 Hz to 1 MHz in steps.
4. Note down the corresponding output voltage.
5. Plot the graph gain Vs frequency.
6. Calculate the bandwidth from the graph

RESULT: