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UNIT-01: Explain The Architecture of A Basic Computer

The document provides an overview of computer architecture, detailing the components such as the input unit, output unit, memory unit, arithmetic and logic unit (ALU), and control unit, along with their functions. It also discusses the design of a 4-bit adder/subtractor, the workings of an arithmetic logic shift unit, register transfer language, memory reference instructions, and the types of buses in a computer system. Furthermore, it explains micro-operations and addressing modes, highlighting their significance in computer operations.
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0% found this document useful (0 votes)
13 views69 pages

UNIT-01: Explain The Architecture of A Basic Computer

The document provides an overview of computer architecture, detailing the components such as the input unit, output unit, memory unit, arithmetic and logic unit (ALU), and control unit, along with their functions. It also discusses the design of a 4-bit adder/subtractor, the workings of an arithmetic logic shift unit, register transfer language, memory reference instructions, and the types of buses in a computer system. Furthermore, it explains micro-operations and addressing modes, highlighting their significance in computer operations.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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UNIT-01

Explain the architecture of a basic Computer.


Computer Architecture
1. Computer Architecture is concerned with the way hardware components are
connected together to form a computer system.
2. It acts as the interface between hardware and software.
3. Computer Architecture helps us to understand the functionalities of a system.
4. A programmer can view architecture in terms of instructions, addressing modes and
registers.
5. Computer Architecture deals with high-level design issues.
6. Architecture involves Logic (Instruction sets, Addressing modes, Data types, Cache
optimization)
1. Input Unit:
Computer accepts encoded information through input unit. The standard input device is
a keyboard. Whenever a key is pressed, keyboard controller sends the code to
CPU/Memory. Examples include Mouse, Joystick, Tracker ball, Light pen, Digitizer,
Scanner etc.
2. Output Unit: Computer after computation returns the computed results, error
messages, etc. via output unit. The standard output device is a video monitor, LCD/TFT
monitor. Other output devices are printers, plotters etc.
3. Memory Unit: Memory unit stores the program instructions (Code), data and results
of computations etc. Memory unit is classified as: Primary /Main Memory Secondary
/Auxiliary Memory
4. Arithmetic and logic unit: ALU consist of necessary logic circuits like adder,
comparator etc., to perform operations of addition, multiplication, comparison of two
numbers etc.
5. Control Unit: Control unit co-ordinates activities of all units by issuing control
signals. Control signals issued by control unit govern the data transfers and then
appropriate operations take place.
Design a 4-bit combinational adder/sub-tractor using full adders.
Binary Adder-Subtractor
● The addition and subtraction operations can be combined into one common
circuit by including an exclusive-OR gate with each fulladder.
● A 4-bit adder-subtractor circuit is shown in the following figure.

● In the above figure, mode input M controls the operation.


● When M = 0 the circuit is an adder and when M = 1 the circuit becomes a
subtractor.
● Each exclusive-OR gate receives input M and one of the inputs B.
● When M = 0, we have B0 = B.
● The full-adders receive the value of B, the input carry is 0, and the circuit
performs A+B.
● When M = 1, we have B1 = B' and C0 = 1.
● The B inputs are all complemented and 1 is added through the input carry.
● The circuit performs the operation A+2's complement of B.

Draw the schematic diagram and discuss the working of arithmetic


logic shift unit.
Arithmetic Logic Shift Unit
● Instead of having individual registers performing the microoperations directly,
computer systems employ a number of storage registers connected to a common
operational unit called an arithmetic logic unit, abbreviated ALU.
● To perform a microoperation, the contents of specified registers are placed in
the inputs of the ALU.
● The ALU performs an operation and the result of the operation is then transferred
to a destination register.
● The ALU is a combinational circuit, so that the entire register transfer operation
from the source registers through the ALU and into the destination register can
be performed during one clock pulse period.
● The arithmetic, logic, and shift circuits can be combined into one ALU with
common selection variables.
● One stage of an arithmetic logic shift unit is shown in the following figure.
Figure 15:
● Inputs Ai and Bi are applied to both the arithmetic and logic units.
● A particular microoperation is selected with inputs S1 and S0. A 4 x 1 multiplexer
at the output chooses between an arithmetic output in Di and a logic output in Ei.
● The data in the multiplexer are selected with inputs S3 and S2
● .The other two data inputs to the multiplexer receive inputs Ai-1 for the shift-right
operation and Ai+1 for the shift-left operation.
● The circuit whose one stage is specified in the above figure provides eight
arithmetic microoperation, four logic microoperations, and two shift
microoperations.
● Each operation is selected with the five variables S3, S2, S1, S0 and Cin The
input carry Cin is used for arithmetic operations only.
● The first eight are arithmetic microoperations, which are selected with S3S2 = 00.
● The next four are logic microoperations, which are selected with S3S2 = 01.
● The input carry has no effect during the logic microoperations and is marked with
don't-care x.
● The last two operations are shift microoperations and are selected with S3S2 =
10 for shift right microoperation and S3S2=and 11 for shift left microoperation.
● The other three inputs have no effect on the shift.
Table 10: Function Table for Arithmetic Logic Shift Unit
Explain Register transfer language in detail.
● The symbolic notation used to describe the Micro operation transfers among
registers is called a Register Transfer Language.
● Information transferred from one register to another register is designed in
symbolic form by means of replacement operator().
● The statement R2 R1 denotes a transfer of the contents of register R1 into
register R2.
● we want to transfer only under a predefined condition, this can be shown by
means of if-then statement.
● if(p = 1) then R2 R1 where p is a control signal generated in the control section.
● A Control function is a Boolean variable that is equal to 0 or 1.
● The control function included in the statement is represented as follows. p: R2
R1 Here the transfer operation is performed by hardware only if p = 1.
● Every statement written in a register transfer notation implies a hardware
construction for implementing the transfer.

● * A comma is used to separate two or more operations that are executed at the same
time.
● Eg: R2 R1, R1 R2 t t+1 /n Load Control Circuit R2 R1 Clock p (a) Block Diagram Clock
Load (b) Timing Diagram
● Figure 5:
● Transfer from R1 to R2 when p =1
● The above statement denotes an operation that exchanges the content of two registers
during one common clock pulse.
Discuss about Memory Reference Instructions.
1. Memory Reference Instructions In Memory reference instruction:
2. First 12 bits(0-11) specify an address.
3. Next 3 bits specify operation code (opcode) and can range from 000 to 110.
4.Left most bit specify the addressing mode I I = 0 for direct address I = 1 for indirect
address
5. The address field is denoted by three x’s (in hexadecimal notation) and is equivalent
to 12-bit address.
6.When I = 0, the last four bits of an instruction have a hexadecimal digit equivalent from
0 to 6 since the last bit is zero (0).
7. When I = 1 the last four bits of an instruction have a hexadecimal digit equivalent from
8 to E since the last bit is one

Figu
re 21: Memory - reference instruction format
Computer Instructions for Memory
What is a bus? What are different types of buses used in
computers? Discuss their uses.
A bus is a communication system within a computer or between computers
that transfers data between different components. The purpose of buses is to
reduce the number of "pathways" needed forcommunication between the
components, by carrying out all communications over a single data channel.
Types of Computer Bus
1. Address Bus

2. Data Bus

3. Control Bus

1. Address Bus
● A collection of wires used to identify particular location in main memory is called

Address Bus. Or in other words, the information used to describe the memory locations

travels along the address bus.

● The address bus transports memory addresses which the processor wants to access in

order to read or write data..

● The address bus is unidirectional.

● The size of address bus determines how many unique memory locations can be

addressed.

● Example:

○ A system with 4-bit address bus can address 24 = 16 Bytes of

memory.

○ A system with 16-bit address bus can address 216 = 64 KB of

memory

○ A system with 20-bit address bus can address 220 = 1 MB of

memory.

2. Data Bus
● A collection of wires through which data is transmitted from one part of a computer to

another is called Data Bus.

● Data Bus can be thought of as a highway on which data travels within a computer.

● The main objective of data bus is transfer of the data between microprocessor to input/

output devices or memory.

● The data bus transfers instructions coming from or going to the processor.

● The data bus is bidirectional because the data can flow in either direction from CPU to

memory(or input/output device) or from memory to the CPU.

● The size (width) of bus determines how much data can be transmitted at one time.

● Example:

○ A 16-bit bus can transmit 16 bits of data at a time.

○ 32-bit bus can transmit 32 bits at a time.

Control Bus
● The connections that carry control information between the CPU and other devices

within the computer is called Control Bus.

● The main objective of control bus is all signals controller carried from processor to other

hardware device.

● The control bus transports orders and synchonisation signal coming from the control

unit and travelling to all other hardware components

● The Control bus is bidirectional because the data can flow in either direction from CPU

to memory(or input/output device) or from memory to the CPU.

● it also transmits response signals from the hardware.

● Example:

○ This bus is used to indicate whether the CPU is

reading from memory or writing to memory.


Uses:
Address bus:
● An address bus is a computer bus that identifies the location of data in a
computer's memory, and is used to transfer information between the CPU and
memory
Control bus:
A control bus is a signal line that manages communication between a
computer's CPU and other components:
Communicates with other devices
The control bus allows the CPU to communicate with other devices
within the computer.

Data bus:
A data bus is a communication system that transfers data between components of
a computer, or between computers. It has many uses, including:
Transferring data
A data bus carries data between the CPU and memory, and between the
CPU and I/O devices. It allows the CPU to read from or write to memory and
I/O device
Draw the schematic diagram and discuss the working of arithmetic
logic shift unit.

logic shift unit.


Arithmetic Logic Shift Unit
● Instead of having individual registers performing the microoperations directly,
computer systems employ a number of storage registers connected to a common
operational unit called an arithmetic logic unit, abbreviated ALU.
● To perform a microoperation, the contents of specified registers are placed in
the inputs of the ALU.
● The ALU performs an operation and the result of the operation is then transferred
to a destination register.
● The ALU is a combinational circuit, so that the entire register transfer operation
from the source registers through the ALU and into the destination register can
be performed during one clock pulse period.
● The arithmetic, logic, and shift circuits can be combined into one ALU with
common selection variables.
● One stage of an arithmetic logic shift unit is shown in the following figure.
Figure 15:

Inputs Ai and Bi are applied to both the arithmetic and logic units.
A particular microoperation is selected with inputs S1 and S0. A 4 x 1 multiplexer at
the output chooses between an arithmetic output in Di and a logic output in Ei.
The data in the multiplexer are selected with inputs S3 and S2
.The other two data inputs to the multiplexer receive inputs Ai-1 for the shift-right
operation and Ai+1 for the shift-left operation.
The circuit whose one stage is specified in the above figure provides eight arithmetic
microoperation, four logic microoperations, and two shift microoperations.
Each operation is selected with the five variables S3, S2, S1, S0 and Cin The input
carry Cin is used for arithmetic operations only.
The first eight are arithmetic microoperations, which are selected with S3S2 = 00.
The next four are logic microoperations, which are selected with S3S2 = 01.
The input carry has no effect during the logic microoperations and is marked with
don't-care x.
The last two operations are shift microoperations and are selected with S3S2 = 10
for shift right microoperation and S3S2=and 11 for shift left microoperation.
The other three inputs have no effect on the shift.
Table 10: Function Table for Arithmetic Logic Shift Unit

Give the functional organization of a digital computer and explain the


function of each element of a computer
1. Input Unit:
Computer accepts encoded information through input unit. The standard input
device is a keyboard. Whenever a key is pressed, keyboard controller sends the
code to CPU/Memory. Examples include Mouse, Joystick, Tracker ball, Light
pen, Digitizer, Scanner etc.
2. Output Unit: Computer after computation returns the computed results, error
messages, etc. via output unit. The standard output device is a video monitor,
LCD/TFT monitor. Other output devices are printers, plotters etc.
3. Memory Unit: Memory unit stores the program instructions (Code), data and
results of computations etc. Memory unit is classified as: Primary /Main Memory
Secondary /Auxiliary Memory
4. Arithmetic and logic unit: ALU consist of necessary logic circuits like adder,
comparator etc., to perform operations of addition, multiplication, comparison of
two numbers etc.
5. Control Unit: Control unit co-ordinates activities of all units by issuing control
signals. Control signals issued by control unit govern the data transfers and then
appropriate operations take place.
Q8)What are micro operations? Discuss arithmetic micro
operations
● Micro-operations are simple instructions that perform basic
operations on data stored in registers in a computer's central
processing unit (CPU). These operations are used to implement
complex machine instructions, also known as macro-instructions
Arithmetic micro operations
● The basic arithmetic microoperations are addition,
subtraction, increment and decrement.
● Add Microoperation: R3 ← R1 + R2
● The above statement states that the contents of
register R1 are added to the contents of register R2
and the sum transferred to register R3. Subtract
Microoperation: R3 ← R1 + R2 bar+ 1
● In the above statement R2 bar is the symbol for the 1’s
complement of R2.
● Adding 1 to the 1’s complement produces the 2’s
complement.
● Adding the contents of R1 to the 2’s complement of R2 is
equivalent to R1 – R2.
● The increment and decrement microoperations are
symbolized by plus-one and minus-one operations,
respectively
UNIT -02
Explain design of micro programed control unit.
What are addressing modes? List and explain different addressing
modes with suitable examples
ADDRESSING MODES In some computers the addressing mode of the instruction is
specified with a distinct binary code, just like the operation code is specified. Other
computers use a single binary code that designates both the operation and the mode of the
instruction. Instructions may be defined with a variety of addressing modes, and
sometimes, two or more addressing modes are combined in one instruction. An example
of an instruction format with a distinct addressing mode field is shown in the below
figure.

The operation code specifies the operation to be performed. The mode field is used to locate
the operands needed for the operation. There may or may not be an address field in the
instruction. If there is an address field, it may designate a memory address or a processor
register. Moreover, as discussed in the preceding section, the instruction may have more
than one address field, and each address field may be associated with its own particular
addressing mode. Although most addressing modes modify the address field of the
instruction, there are two modes that need no address field at all. These are the implied
and immediate modes.
1. Implied Mode: In this mode the operands are specified implicitly in the definition of the
instruction.
For example, the instruction “complement accumulator” is an implied-mode instruction
because the operand in the accumulator register is implied in the definition of the
instruction. In fact, all register reference instructions that use an accumulator are implied-
mode instructions.Example: Zero-address instructions in a stack-organized computer are
implied-mode instructions since the operands are implied to be on top of the stack. CMA,
CME, CLE, CLA
2. Immediate Mode: In this mode the operand is specified in the address part of the
instruction itself. In other words, an immediate-mode instruction has an operand field
rather than an address field. Immediate-mode instructions are useful for initializing
registers to a constant value. LD
3. Register Mode: In this mode the operands are in registers that reside within the CPU. The
particular register is selected from a register field in the instruction. A k-bit field can
specify any one of 2k registers. LD R
4. Register Indirect Mode: In this mode the instruction specifies a register in the CPU
whose contents give the address of the operand in memory. In other words, the selected
register contains the address of the operand rather than the operand itself. Before using a
register indirect mode instruction, the programmer must ensure that the memory address
for the operand is placed in the processor register with a previous instruction. A reference
to the register is then equivalent to specifying a memory address. The advantage of a
register indirect mode instruction is that the address field of the instruction sues fewer
bits to select a register than would have been required to specify a memory address
directly. LD (R) OR LD R
5. Auto increment or Auto decrement Mode: This is similar to the register indirect mode
except that the register value is incremented or decremented after (or before) its value is
used to access memory. When the address stored in the register refers to a table of data in
memory, it is necessary to increment or decrement the register after every access to the
table. LD (R) + Auto increment LD (R) - Auto decrement
6. Direct Address Mode: In this mode the effective address is equal to the address part of
the instruction. The operand resides in memory. In a branch-type instruction the address
field specifies the actual branch address. LD 10
7. Indirect Address Mode: In this mode the address field of the instruction gives the
address where the effective address is stored in memory. Control fetches the instruction
from memory and uses its address part to access memory again to read the effective
address. LD (10)
8. Relative Address Mode: In this mode the content of the program counter is added to the
address part of the instruction in order to obtain the effective address. The address part of
the instruction is usually a signed number (in 2’s complement representation) which can
be either positive or negative. When this number is added to the content of the program
counter, the result produces an effective address whose position in memory is relative to
the address of the next instruction. LD
9. Indexed Addressing Mode: In this mode the content of an index register is added to the
address part of the instruction to obtain the effective address. The index register is a
special CPU register that contains an index value. The address field of the instruction
defines the beginning address of a data array in memory. LD 5(IR)
10. Base Register Addressing Mode: In this mode the content of a base register is added to
the address part of the instruction to obtain the effective address. This is similar to the
indexed addressing mode except that the register is now called a base register instead of
an index register. The difference between the two modes is in the way they are used
rather than in the way that they are computed. An index register is assumed to hold an
index number that is relative to the address part of the instruction. A base register is
assumed to hold a base address and the address field of the instruction gives a
displacement relative to this base address. The base register addressing mode is used in
computers to facilitate the relocation of programs in memory. When programs and data
are moved from one segment of memory to another, as required in multiprogramming
systems, the address values of the base register requires updating to reflect the beginning
of a new memory segment. LD 5(BR)

Explain the basic organization of a micro programmed control


unit and the generation of control signals using micro program
Discuss about functioning of micro-programmed control unit.
What are micro operations? Discuss arithmetic micro operations

● Micro-operations are simple instructions that perform basic


operations on data stored in registers in a computer's central
processing unit (CPU). These operations are used to implement
complex machine instructions, also known as macro-instructions
Arithmetic micro operations
● The basic arithmetic microoperations are addition, subtraction,
increment and decrement.
● Add Microoperation: R3 ← R1 + R2
● The above statement states that the contents of register
R1 are added to the contents of register R2 and the sum
transferred to register R3. Subtract Microoperation: R3 ←
R1 + R2 bar+ 1
● In the above statement R2 bar is the symbol for the 1’s
complement of R2.
● Adding 1 to the 1’s complement produces the 2’s complement.
● Adding the contents of R1 to the 2’s complement of R2 is
equivalent to R1 – R2.
● The increment and decrement microoperations are symbolized by
plus-one and minus-one operations, respectively
What are addressing modes? List and explain different addressing
modes with suitable examples
Already there in set -01
Explain the interrupt cycle with a neat flow chart
Discuss about functioning of micro-programmed control unit.
Already there in set -01

UNIT _03
Describe the control unit organization with a separate Encoder and
Decoder functions in a hardwired control.
Explain about Input-output interface.
Explain data types used in data representations with one example for
each
Explain the Booth’s algorithm for multiplication of decimal numbers.

Explain the fixed point and floating-point representations used in


computer arithmetic
With the help of hardware schematic and flowchart, explain the
implementation of multiplication operation in computers.
Explain the floating point addition- subtraction unit with a neat
diagram
Explain the Booth’s algorithm for multiplication of signed two’s
complement numbers
UNIT -04
Discuss about Daisy chaining priority interrupt
Discuss about DMA.
What is a cache memory? What is its use in computers?
Discuss any six ways of improving the cache performance.
Here are six ways to improve cache performance:
● Cache aside caching: This strategy sends the browser's HTTP
request to the cache memory first. If the content is available, it's a
cache hit, and if not, the data is retrieved from the origin server.

● Client-side caching: This process stores web resources on the user's
device, such as in their web browser. This speeds up web page loading
by reducing the need to fetch resources from the web server.

● Implement cache invalidation: This mechanism ensures data
consistency and accuracy by defining strategies to refresh or remove
cached items when data changes.

● Merge write buffer entries: This reduces miss penalty.

● Increase cache size: A larger cache means more instructions can be
queued and carried out.

● Increase block size: This can improve miss rate

Define the terms


i) ROM ii) PROM iii) EPROM iv) EEPROM
v) Flash Memory vi)Cache memory.
Definitions:

i) ROM (Read-Only Memory)


A non-volatile memory used to store data that does not change, such as
firmware or system software. Data in ROM is permanently written during
manufacturing and cannot be modified during regular operation.
ii) PROM (Programmable Read-Only Memory)
A type of ROM that is manufactured as a blank memory and can be
programmed once using a special device called a programmer. After
programming, its content cannot be changed or erased.
iii) EPROM (Erasable Programmable Read-Only Memory)
A type of ROM that can be erased by exposing it to ultraviolet (UV) light
and then reprogrammed. It is useful for development and testing purposes
but requires a UV eraser to clear the data.
iv) EEPROM (Electrically Erasable Programmable Read-Only
Memory)
A type of ROM that can be erased and reprogrammed electronically
without needing special equipment. It is slower than Flash memory and is
typically used in small-scale applications, such as storing configuration
settings in embedded systems.
v) Flash Memory
A type of non-volatile memory that can be electrically erased and
reprogrammed in blocks. It is faster than EEPROM and widely used in
USB drives, solid-state drives (SSDs), and memory cards due to its high
speed and durability.
vi) Cache Memory
A small, high-speed memory located close to the processor. It temporarily
stores frequently accessed data and instructions to reduce the time needed
to access data from main memory (RAM), thereby improving overall
system performance. Cache memory is typically divided into levels such as
L1, L2, and L3, with L1 being the fastest and smallest.
How is data stored and read from a magnetic hard disk? Explain.
Data Storage (Writing Data):

● The read/write head creates a magnetic field using an


electromagnetic coil.
● This field alters the orientation of magnetic particles on the disk
surface in specific regions.
● Each magnetic orientation represents binary data:
○ North-South polarity: Represents a binary 1.
○ South-North polarity: Represents a binary 0.
● Data is written sequentially on tracks within sectors (small segments
of a track).
Data Reading:

● As the platter spins, the read/write head senses the magnetic field of
the regions it passes over.
● Changes in the magnetic field induce a small electric current in the
head (using electromagnetic induction).
● This current is converted into binary data (0s and 1s) and processed
by the hard disk controller.
● The controller translates the binary data into meaningful information
for the computer.
What is a cache memory? What is its use in computers?
Already there in set -01

In a certain system the main memory access time is 100 ns. The
cache is 10 time faster than the main memory and uses the write
though protocol. If the hit ratio for read request is 0.92 and 85% of
the memory requests generated by the CPU are for read, the
remaining being for write; then what is the average time
consideration for both read and write requests?
Given:

● Main memory access time (TmmT_{mm}) = 100 ns


● Cache access time (TcacheT_{cache}) = Tmm/10=10
nsT_{mm} / 10 = 10 \, \text{ns}
● Read hit ratio (HrH_r) = 0.92
● Read requests = 85% (fr=0.85f_r = 0.85), Write requests = 15%
(fw=0.15f_w = 0.15)
● Write-through protocol (write to both cache and main memory).
UNIT-05
Explain Interprocessor communication and synchronization.
What are multiprocessors? Mention the categories of multiprocessors?
List the major MIMD Styles.
Difference between arithmetic, RISC and instruction pipeline
Describe the data and control path techniques in pipelining.

Data Path in Pipelining:

The data path refers to the hardware components that carry the data, like registers,
buses, and ALUs (Arithmetic Logic Units), which move data between different
stages of execution in a pipeline. The data path allows the flow of information as
the instructions are processed through various stages, such as fetching, decoding,
executing, memory access, and writing back.

Control Path in Pipelining:

The control path manages the flow of data and the sequence of operations by
directing the various stages in the pipeline. It involves control signals that
determine when and how different parts of the data path are used, ensuring
synchronization between the stages of the pipeline.

Basic Stages of Pipelining:

● IF (Instruction Fetch): Fetches the instruction from memory.


● ID (Instruction Decode): Decodes the instruction and prepares operands.
● EX (Execution): Performs the arithmetic/logic operation or address
calculation.
● MEM (Memory Access): Reads or writes data from/to memory.
● WB (Write Back): Writes the result back into the register.

What is a RISC? Discuss its characteristics


Reduced Set Instruction Set Architecture (RISC) – The main idea behind is
to make hardware simpler by using an instructionset composed of a few
basic steps for loading, evaluating and storing operations just likea load
command will load data, store command will store the data
Characteristic of RISC –
1. Simpler instruction, hence simple instruction decoding.
2. Instruction come under size of one word.
3. Instruction take single clock cycle to get executed
. 4. More number of general purpose register.
5. Simple Addressing Modes.
6. Less Data types.
7. Pipeline can be achieved.
What are multi processors? Discuss their characteristics
1. Multiprocessor: A Multiprocessor is a computer system with two or more
central processing units (CPUs) share full access to a common RAM. The
main objective of using a multiprocessor is to boost the system’s execution
speed, with other objectives being fault tolerance and application matching.
There are two types of multiprocessors, one is called shared memory
multiprocessor and another is distributed memory multiprocessor. In shared
memory multiprocessors, all the CPUs shares the common memory but in a
distributed memory multiprocessor, every CPU has its own private memory.
What is pipelining? How it improves the performance of computing?
Explain.
Pipelining improves computing performance by reducing the processor's cycle
time and increasing the throughput of instructions

Discuss the implementation of arithmetic pipeline

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