774 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO.

5, MAY 2000

[2] A. Baschiroto and R. Castelo, “A 1-V 1.8-MHz CMOS switched-opamp

SC filter with rail-rail output swing,” IEEE J. Solid-State Circuits, vol.
32, pp. 1979–1996, Dec. 1997.
[3] A. Baschiroto, R. Castelo, and G. P. Montagna, “Active series switch
for switched opamp circuits,” IEE Electron. Lett., vol. 34, no. 14, pp.
1365–1366, 1998.
[4] V. Peluso, P. Vancorenland, M. Steyaert, and W. Sansen, “900 mV dif-
ferential class AB OTA for switched opamp applications,” IEE Electron.
Lett., vol. 33, no. 17, pp. 1455–1456, Aug. 14th, 1997.
[5] J. Ramírez-Angulo, R. G. Carvajal, J. Tombs, and A. Torralba, “A simple
technique for op-amp continuous-time 1 V operation,” IEE Electron.
Lett., vol. 35, no. 4, pp. 263–264, Feb. 1999.
Fig. 5. Implementation of an amplifier with gain A using the FVCVS [6] B. J. Blalock, P. E. Allen, and G. A. Rincón-Mora, “Designing 1–V op
technique. This circuit replaces the circuit in Fig. 2(b). I and I are obtained amps using standard digital CMOS technology,” IEEE Trans. Circuits
using two copies of the circuit in Fig. 2(a), with inputs V and V , respectively. Syst. II, vol. 45, pp. 769–780, July 1998.

Ib = Vs =R generated in the first stage is scaled by the factor A (using

a current mirror) and the resulting current Ib0 = A 1 Ib is transformed
into an output voltage Vo = Ib0 1 R = A 1 Ib 1 R = A 1 Vs in the
second stage. Cancellation of common mode components is required Low-Distortion CMOS Complementary Class E RF Tuned
as explained below. Power Amplifiers
Consider following notation: let VsQ denote the DC value of the input
signal source Vs , which, for the sake of simplicity, is also assumed to Steve Hung-Lung Tu and Chris Toumazou
be the DC value of the op-amp output terminal Vout . Let vs denote the
signal component of the input signal source Vs , so that Vs = VsQ + vs .
Abstract—A low-distortion tuned power amplifier which is suitable
In order to obtain an amplified output voltage, a floating VCVS with
value Vf = A 1 vs + VsQ 0 Vref must be inserted in the feedback path of
for integrated circuit implementation is proposed. The amplifier is a
complementary class-E tuned power amplifier because of both -type
the main op amp OA. Coming back to Fig. 2(a), Ib = (Vs 0 Vref )=R = and -type transistors are employed to achieve a highly symmetrical
Q Q Q
(vs =R) 0 Ib , where Ib = (Vs 0 Vref )=R is the DC value of the topology, thereby reducing the significant distortion in the output signal
of the conventional single-ended class-E power amplifier. In this paper,
current source Ib .
Simple calculations lead to Vf = [AIb 0 (A 0 1)IbQ ] 1 R and to
a complementary class-E power amplifier is presented together with

Vo = A 1 vs + VsQ . Hence, the implementation of Vf uses a resistor

HSPICE simulation results.

R and two pairs of matched current sources with values A 1 Ib and

Index Terms—CMOS circuits, radio frequency, tuned power amplifiers,
Q
(A 0 1) 1 Ib . In order to achieve subtraction, the currents A 1 Ib and
wireless transceivers.
Q
A 1 Ib must flow through R in opposite directions, as shown in Fig. 5.
The current Ib is obtained using the circuit in Fig. 2. Another copy of I. INTRODUCTION
that circuit is used to generate IbQ using an input voltage Vs = VsQ . The class-E tuned power amplifier has been an important building
The technique introduced here can be easily extended to implement block in the wireless RF transceiver system for the past several years
fully differential amplifiers. This will be discussed in detail in a future [1]. This is due to its high power efficiency [2], simplicity, and rela-
publication. tively high tolerance to circuit variations [3]. Recently, much research
General Building Block of Low-Voltage Linear Systems: Notice that has focused on analysis as well as implementation issues of class-E
the proposed approach allows also low-voltage implementation of the amplifiers [4]–[6]. Fig. 1 shows the configuration of a conventional
linear weighted addition which is the basic operation of linear systems. single-ended class-E power amplifier. Since the transistor acts as a
This can be done by weighting currents I1 = V1 =R . . . In = Vn =R switch rather than an amplifier, large-gate-width transistors are nec-
generated in transconductance stages by factors Ai . . . An and then essary in order to approach the ideal switch. However, the transistors
applying the summation of these currents to a transresistance stage to
transform them into an output voltage Vo = R 1 (Ai 1 I1 + 1 1 1 + An 1
also lead to large parasitic junction capacitances. For class-E power
In ) = A1 1 V1 + 1 1 1 + An 1 Vn . Common mode components can be
amplifiers, since the capacitance of the resonant circuits are different
in switch-on and switch- off states, it leads to harmonic distortion of
cancelled using the same technique discussed above. the output signal. Therefore, a higher performance RF passive filter
is required after the power amplifier [7]. This requirement, however,
VI. CONCLUSION may lead to a larger insertion power loss through the RF filter and
A novel technique to implement low-voltage CMOS amplifiers with reduces the power efficiency of the power amplifier by lowering the
rail-to-rail input swing, operating from a supply close to a transistor’s output power at the antenna for a given input power. In addition, for
threshold voltage, was introduced. Its practical implementation was integrated implementations, this approach not only consumes a large
discussed and functionality was demonstrated based on postlayout sim- chip area but it also presents difficulties in obtaining high-Q inductors.
ulations. This technique offers potential for the implementation of low- It has shown that monolithic inductors have often been limited to 10
voltage linear systems operating in continuous time.
Manuscript received March 26, 1999; revised November 2, 1999. This paper
REFERENCES was recommended by Associate Editor J. Suykens.
The authors are with the Department of Electrical and Electronic Engineering,
[1] F. You, S. H. K. Embabi, and E. Sánchez-Sinencio, “Low-voltage class Imperial College of Science, Technology, and Medicine, London SW7 2BT,
AB buffers with quiescent current control,” IEEE J. Solid-State Circuits, U.K.
vol. 33, pp. 915–920, June 1998. Publisher Item Identifier S 1057-7122(00)03963-5.

1057–7122/00$10.00 © 2000 IEEE

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 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MAY 2000 775

Fig. 1. Conventional single-ended class-E power amplifier.

nH or less if a self resonance beyond 2 GHz is desired [8], whereas for

many wireless applications it is highly desirable to have an inductance Fig. 2. Schematic of the complementary class-E power amplifier.
substantially in excess of 10 nH.
In this paper, we suggest a new power amplifier based on a highly
total harmonic distortion (THD) as a function of the off-state resonant
symmetrical circuit topology. With the approach, we can improve the
frequency. It reveals the relationship between the distortion and the dis-
significant harmonic distortion of the conventional class-E power am-
tance of the two different frequencies, on-state resonant frequency, and
plifier. In addition, we also explore the optimum conditions for the cir-
off-state resonant frequency. Both architectures demonstrate low dis-
cuit operation and the relationship of the circuit components.
tortion when the off-state resonant frequency is near the on-state reso-
nant frequency (1.8 GHz in the simulation). However, the conventional
II. CIRCUIT DESCRIPTION structure suffers larger distortion than the proposed structure when the
Fig. 1 shows the conventional single-ended class-E power amplifier. difference of the two resonant frequencies becomes larger.
The function of the MOSFET is to act as a switch. The switch is turned The comparison of THD’s between the conventional single-ended
on and off periodically at the input frequency. L0 and C0 resonate at class-E power amplifier and the proposed power amplifier for different
this frequency and only pass a sinusoidal current to the load RL . CP supply voltages has also been performed. We employed the same
insures that in the time when the switch is turned off the voltage across matching network to transform the standard 50- load to the optimum
the switch still keeps relatively low until after the drain current has loads for different supply voltages and compared the two architec-
reduced to zero. tures. Fig. 5 shows HSPICE simulation results for the comparisons.
The proposed power amplifier is shown in Fig. 2 comprising a pair Apparently, the proposed power amplifier has much lower THD’s than
of P -type and N -type devices in a cascade connection. The devices are the conventional one, as predicted.
switched on and off alternatively and the duty cycles are 50% to obtain
maximum output power [2]. Each active device pumps current into the IV. RELATIONSHIPS AMONG THE NETWORK COMPONENTS
resonant R-L-C circuit from the power supply via the RF chock on
The components of the proposed power amplifier include two tran-
every other transition of the input signal.
sistors as switching devices, two RF chokes, and two sets of resonant
Fig. 4(a) and (b) depicts the equivalent resonant circuits at the M1 on,
L-C circuits. Since the power efficiency has a very close relation with
M2 off state and M1 off, and M2 on state, respectively. Two possible
resonant frequencies can be found when M1 on, M2 off. One is !1 =
the feature size of the transistors, the best performance can be found
p
(1= L1 C1) and the other is !2 = (1= L2 (C2 CP 2 =(C2 + CP 2 ))). when the feature size of the transistors is the smallest. On the other
hand, large-width transistors must be employed in order to provide
The system frequency is dominated by !1 if it equals the operating fre-
large output power. The maximum driving current of the RF choke is
quency and the same condition can be applied when M1 off, M2 on.
at the transition of on to off of the transistor. We can thereby determine
Notice that the system resonant frequencies for the two cases are the
the size of the N -type transistor. Since the transistor is operating in the
same if the circuit topology is symmetrical. That is, C1 = C2 ; L1 =
strong inversion region, then iD(max)  (vGS 0 Vth )vD SAT . From
L2 ; Cp1 = Cp2 . Moreover, the other resonant circuits at the different
frequencies !1(o ) = (1= L1 (C1 CP 1 =(C1 + CP 1 ))) and !2(o ) =
this relationship we can obtain the following equation:
(1= L2 (C2 CP 2 =(C2 + CP 2 ))) for the two cases can still shape the VDD t
+ Const1 = (vGS 0 Vth )vD SAT (1)
two drain voltages, thereby maintaining small power loss of the con- Ldc1 t=
ventional class-E configuration.
where is the conductance coefficient which is equal to
Cox W=L; Vdd is the supply voltage, vGS is the voltage of the
III. SIMULATION RESULTS
input signal, Vth is the threshold voltage of the transistor, vD SAT is
The output currents of the conventional single-ended circuit and the the saturation voltage of vDS , and Ldc1 is the inductance of the RF
proposed circuit can be represented by a Fourier series. Fig. 3 shows the choke.
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 776 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MAY 2000

Fig. 3. THD versus off-state resonant frequency.

The relationships among the circuit components can be found by em-

ploying KCL, KVL, boundary conditions, and the class-E switching
conditions [11] for the circuit behaviors of the on and off states and
these equations are derived in the Appendix. Fig. 6 shows the THD as
a function of 1 (= 2 ), where 1 is the ratio of the resonant frequency
of L1 -C1 -Cp1 to the operating frequency ! , namely, 1 = (!01 =! ),
and !01 = (1= L1 (C1 Cp1 =(C1 + Cp1 ))). Here, the lowest THD is
at 1 = 1:5 for the curve 1 = 1:05, where 1 is the ratio of the
operating frequency to the resonant frequency of the RF choke induc-
tance, Ldc1 , and the parallel capacitance, Cp1 . Notice that since the
symmetrical circuit topology is employed, we can only analyze the
half part of the circuit which we use the subscripts 1 and 2 to repre-
sent the two symmetrical parts. From these relationships, we can de-
termine the component values. Therefore, 1 = ! Ldc1 Cp1 = 1:05;
2 = ! Ldc2 Cp2 = 1:05, thus Ldc = 1:05 =Cp ! . Since Cp is
2 2

proportional to the transistor size, thus Ldc is the function of W and

(a)

! . Once VDD ; ! (operating frequency), vD SAT ; vGS ; Vth are known,

we can determine the transistor size W from (1). In addition, the min-
imum distortion can be obtained by setting 1 = 2 = 1:5. If we let
p
the operating frequency ! equal (1= L1 C1 ), then 1 = (!01 =! ) =
(C1 + Cp1 =Cp1 ) = 1:5. Moreover, Cp1 can be derived from the
transistor size, here we can obtain C1 = (1:52 0 1)Cp1 and L1 =
1=! C1 .
2

V. CONCLUSION

A low-distortion high-frequency tuned power amplifier has been in-

troduced. The conflict between distortion and power efficiency of the
conventional single-ended class-E power amplifier has been released
because of the highly symmetrical circuit topology employed. Fur-
(b) thermore, since the inductances of the series-resonant circuits are ex-
Fig. 3. (a) Equivalent resonant circuit when M1 on, M2 off. (b) Equivalent tremely low, the parasitic metal resistive loss should not be a serious
resonant circuit when M1 off, M2 on. problem for the implementation of on-chip spiral inductors. Therefore,
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 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MAY 2000 777

Fig. 5. THD versus supply voltage.

Fig. 6. THD as a function of .

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 778 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MAY 2000

Fig. 7. Equivalent circuit when M1 on, M2 off. Fig. 8. Equivalent circuit when M1 off, M2 on.

We can obtain the following equation:

the implementation of the circuit as an output stage of the class-E RF

Ldc2 Cp2 d iL dc21 (t)

power amplifier in CMOS process is feasible. 2
+ iL dc21 (t) = I2 sin( 2 !t + '2 ): (A.10)
dt2
APPENDIX Thus
DERIVATIONS OF VOLTAGE AND CURRENT EQUATIONS
iL dc21 (t) = k1 cos !2 t + k2 sin !2 t + I2
1 0 2 sin( 2 !t + '2 )
Fig. 7 and 8 show the equivalent circuits to derive the following equa- 2
tions when 0  t  (=!) the MOSFET M1 is on and M2 is off. The
(A.11)
where
following equations are given by Kirchhoff’s law:
2!
!2 = 1
Ldc2 Cp2
; 2 =
!2
; 6
( 2 = 1):
iL dc11 (t) = iM 1 (t) + i11 (t) (A.1)
i21 (t) = iR1 (t) + i11 (t) (A.2) Applying boundary conditions, we can solve k1 ; k2 , and Const1 and
iM 1 (t) + ip21 (t) + iR1 (t) = 0 (A.3) I2 ; '2 can be solved by applying the class-E optimum switching con-
iL dc21 (t) = ip21 (t) + i21 (t) (A.4) ditions [11]. Substituting (A.4) and i21 (t) = I2 sin( 2 !t + '2 ) into
(A.6) and differentiating (A.6) with respect to t gives
v21 (t) = v01 (t) + vL21 (t) + vC 21 (t) (A.5)
1
i (t) dt = iR1 (t)RL + L2 di21 (t) diR1 (t) 1
k1 cos !2 t + k2 sin !2 t + I2 sin( 2 !t2 + '2 :
Cp2 p21 dt dt
=
RL Cp2 1 0 2
1 (A.12)
+ i (t) dt (A.6)
C2 21 Therefore, the normalized output voltage is

0v21 (t) 0 VDD = Ldc2 diL dc21 dt

(t)
(A.7) v01 (t) = k1 sin
0 0 2
2
0
!t k20 cos 2
2
!t
VDD 0 v11 (t) = Ldc1 diL dc11 (t) : (A.8) 0 I20 cos( 2 !t + '2 ) for 0  t 

dt 2 (1 0
2
2) !
(A.13)

Since v11 (t) = 0 in this period, then where

k1 = Ldc2 !2 k1 k2 = Ldc2 !2 k2 I2 = Ldc2 !2 I2

iL dc11 (t) = VDD t + Const1:
0 0 0

(A.9) VDD VDD VDD

Ldc1 v01 (t)
v01 =
0
:
Define 2 = (!02 =! ), where !02 =
VDD
(1= L2 (C2 Cp2 =(C2 + Cp2 ))), and ! is the operating The same approach can be employed to analyze the state when
frequency. (=! )  t  (2=! ).
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 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MAY 2000 779

REFERENCES is required. As indicated by [7], the computational burden for the run-
[1] B. Razavi, “Challenges in portable RF transceiver design,” IEEE Cir- ning DCT is rather intensive. One approach for computing the running
cuits Devices, pp. 12–26, Sept. 1996. DCT’s and discrete sine transforms (DST’s) is to use their shift prop-
[2] F. H. Raab, “Idealized operation of the class E tuned power amplifier,” erties, as derived by Yip and Rao [6]. The shift properties are a set of
IEEE Trans. Circuits Syst., vol. CAS-24, pp. 725–735, Dec. 1977. recursive equations that can be used for updating the DCT’s and DST’s
[3] , “Effects of variations on the class E tuned power amplifier,” IEEE
J. Solid-State Circuits, vol. SC-13, pp. 239–247, Apr. 1978. coefficients. However, this approach is not very efficient in terms of
[4] J. A. Blanchard and J. S. Yuan, “Effects of collector current exponen- computation. A source of the excessive computational burden is the
tial decay on power efficiency for class E tuned power amplifier,” IEEE dependency between a DCT coefficient and its corresponding DST co-
Trans. Circuits Syst.I, vol. 41, pp. 69–72, Jan. 1994. efficient. The process of updating a DCT (or DST) requires updating
[5] M. J. Chudobiak, “The use of parasitic nonlinear capacitors in class E
the corresponding DST (or DCT). To alleviate this problem, Murthy
amplifiers,” IEEE Trans. Circuits Syst. I, vol. 41, pp. 941–944, Dec.
1994. and Swamy [7] proposed an approach for DCT-II, DST-II, DCT-IV,
[6] T. Sowlati et al., “Low voltage, high efficiency GaAs class E power am- and DST-IV. In [7] each transform member was represented as the real
plifier for wireless transmitters,” IEEE J. Solid-State Circuits, vol. 30, part of a complex function and recursive equations were derived for up-
pp. 1074–1080, Oct. 1995. dating these complex functions. In other words, the approach updates
[7] N. O. Sokal and F. H. Raab, “Harmonic output of class E RF power am-
plifier and load coupling network design,” IEEE J. Solid-State Circuits, complex functions rather than transform coefficients. It is obvious that
vol. SC-12, pp. 86–88, Feb. 1977. there is still some excessive and unnecessary computation.
[8] N. M. Nguyen and R. G. Meyer, “Si IC-compatible inductors and LC This paper proposes a more efficient class of running algorithms for
passive filters,” IEEE J. Solid-State Circuits, vol. 25, pp. 1028–1031, DCT’s and DST’s by deriving a set of recursive equations which enable
Aug. 1990. the independent updating of each DCT and DST member respectively.
[9] C. Li and Y. Yam, “Maximum frequency and optimum performance of
class E power amplifiers,” Proc. Inst. Elect. Eng., vol. 141, no. 3, June The proposed recursive equations are called second-order shift (SOS)
1994. properties due to their second-order nature. By contrast, the shift prop-
[10] J. Chang, A. A. Abidi, and M. Gaitan, “Large suspended inductors on erties derived by Yip and Rao [6] are referred to as the first-order shift
silicon and their use in a 2-m CMOS RF amplifier,” IEEE Electron. (FOS) properties, as they are in effect first-order recursive equations.
Device Lett., vol. 14, May 1993.
[11] N. O. Sokal and A. D. Sokal, “Class E, a new class of high efficiency This paper is organized as follows.: Section II reviews the FOS prop-
tuned single-ended switching power amplifiers,” IEEE J. Solid-State erties of DCT’s and DST’s. The SOS properties for the DCT’s and
Circuits, vol. SC-10, pp. 168–176, June 1975. DST’s are derived and presented in Section III. A performance anal-
ysis of running DCT’s and DST’s based on SOS properties is under-
taken in Section IV and the results are compared with the most recent
approaches reported in literature thus far. Finally, Section V concludes
the paper.

Computing Running DCT’s and DST’s Based on Their II. FIRST-ORDER SHIFT PROPERTIES OF DCT’s AND DST’s
Second-Order Shift Properties
As defined in [8], the family of DCT’s and DST’s for the signal block
Jiangtao Xi and Joe F. Chicharo x(n 0 N ), x(n 0 N + 1); 1 1 1 ; x(n) is given as follows [8]
DCT-I:
N m
Pm x(n 0 N + m) cos
Abstract—This paper presents a set of second-order recursive equations 2
c(n; k) = Pk k ;
which are referred to as the second-order Shift (SOS) properties of the dis- N m= 0 N
crete cosine transform (DCT) and the discrete sine transform (DST). The
proposed SOS properties enable independent updating of the respective for k = 0; 1; 1 1 1 ; N (1)
DCT and DST coefficients. This is in direct contrast with existing method-
ology for computing the running DCT and DST where there is an inherent
interdependency between the DCT and DST coefficients. The SOS prop-
erties provide more efficient algorithms in terms of computational burden DCT-II:
and memory requirements when implementing running DCT’s and DST’s. N01 
x(n 0 N + m) cos
2 1
c(n; k) = Pk m+ k ;
Index Terms—DCT, discrete cosine transform, DST. N m=0 2 N
for k = 0; 1; 1 1 1 ; N 01 (2)
I. INTRODUCTION
The discrete cosine transform (DCT) [1] has been successfully ap-
plied to the fields of speech and image processing. In order to com- DCT-III:
pute the DCT efficiently, various fast and efficient block- based algo- N01 
P x(n 0 N + m) cos m k +
2 1
c(n; k) = ;
rithms have been proposed (for example, see [2]–[5] and their refer-
N m=0 m 2 N
ences). However, in the case where the DCT parameters need to be up-
dated for every new signal sample, the running DCT implementation for k = 0; 1; 1 1 1 ; N 0 1 (3)

Manuscript received September 16, 1997; revised March 6, 1999. This paper
DCT-IV:
was recommended by Associate Editor J. Götze.
N01 
x(n0N +m) cos
The authors are with the School of Electrical, Computer, and Telecommuni- 2 1 1
c(n; k) = Pk m+ k+ ;
cations Engineering, The University of Wollongong, Wollongong, NSW 2522, N m=0 2 2 N
Australia.
Publisher Item Identifier S 1057-7122(00)03966-0. for k = 0; 1; 111; N 0 1 (4)

1057–7122/00$10.00 © 2000 IEEE

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