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Digital Electronics Material

The document outlines various tasks related to digital electronics, including Boolean expression simplification, Karnaugh maps, logic gate implementations, and memory operations. It covers topics such as flip-flops, counters, multiplexers, and coding systems like Hamming and Gray code. Additionally, it discusses the design and implementation of combinational circuits and the differences between various logic families.

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30 views5 pages

Digital Electronics Material

The document outlines various tasks related to digital electronics, including Boolean expression simplification, Karnaugh maps, logic gate implementations, and memory operations. It covers topics such as flip-flops, counters, multiplexers, and coding systems like Hamming and Gray code. Additionally, it discusses the design and implementation of combinational circuits and the differences between various logic families.

Uploaded by

sfarmy1729
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Unit- 02

1. Simplify the following Boolean expression


abc’d+ab’c’d+abcd+a’b’c’d+abc’d’+a’bcd’
2. Simplify using k-map
F=Ʃm(0,1,4,7,9,13)+d(2,11)
3. Realize the following expression
ab’c+abc+ab’+ac’+a’b’c
4. Implement using any universal gate -----

5. Convert into canonical form a’b+bc’+ab’c+ac


6. Implement the following function using Quine McCluskey method

F (A, B, C, D) =A’BC’D’+AB’C’D’+A’B’C’D+ABC’D+ABC’D’

7. Design the given function using Prime implicant method F=Ʃm(0,1,2,4,5,6,8,9,12)

8. 3. Realize ABC+AB’+BC’+A’BC using logic gates.

9. Realize F = XY + X(X + Z) + Y(X + Z) using logic gates.

10. Minimize the expression F(XYZ)=X’Y’Z + X’YZ+YZ’.


11. Realize the expression using NOR gate only.

F = XY + X(X + Z) + Y(X + Z).

12. Implement Y= (B+C)(C+ D’)(A+ B +C’)

13. Convert into canonical form

F=ABCD+AB’C’D’+AB’C+AB

14. Realize using NAND gate only

Y=(AB+C)' D

15. Using K-map, reduce the following Boolean function

F=πM(0,2,3,6,7) + d(8,10,11,15)

and obtain minimal POS.


16) Plot the following logical Expression F=ABCD+AB’C’D’+AB’C+AB on a 4-

variable K – map & realize the SOP using only NAND gates and POS using only

NOR gates.

17) Realize ABC+AB’+BC’+A’BC using logic gates.

18) Realize the function F=((AB'C)+(AC'D)+(AB'D))' using NOR gates only

Construct a Karnaugh Map for the following function F(A,B,C,D,E)=Ʃm(0,5,6,10,11,16,20,24,25,27,29,31) and draw the logic
diagram
Unit- 04

1) Discuss master slave JK flip flop through excitation table and block diagram. [BL=2]

2) Differentiate between asynchronous and synchronous counter. Provide block diagrams of

both. [BL=2]

3) Calculate the count sequence of an asynchronous Mod-16 counter starting from the initial

state 0000. Show the output for the first 6 clock pulses. [BL=3]

4) Describe the operation of ring counter. [BL=2]

5) Describe the functionality of a Parallel-In Parallel-Out (PIPO) shift register. [BL = 2]

6) The content a 4-bit shift register is initially 1001. The register is shifted 6 times to the right

with the serial input being 101001. Analyze the content of the register after each shift.

7) Differentiate between edge triggering and level triggering in sequential circuits. [BL=2]

8) Using D flip-flop, design a synchronous counter which counts in the sequence

000,001,010,011,100,101,110,111,000 [BL=4]

9) Design and implement a MOD-6 synchronous counter using J-K flip flop. [BL=4]

10) Differentiate between TTL, DTL and RTL logic. [BL=2]

11) Explain different types of ROM and differentiate between them.

12) Define a Counter & its applications. Describe modulus counters

13) Describe shift registers? List its different types


Unit- 03
1) Draw the block diagram of n-bit parallel adder. Perform the addition of (1101)2

with (1001)2. Consider input carry as 1.

2) Explain the working of a 4×1 MUX. Design a 16×1 MUX using 4×1 MUX.

3) Draw the circuits of two input NAND and two input NOR gates using CMOS.

Explain the working of both.

4) Discuss about the purpose of decoder and implement a full adder using decoder.

5) Implement the following Boolean function using an 8:1 multiplexer considering

D as the input and A, B, C as selection lines: F (A, B, C, D) = AB’+BD+B’CD’

6) Design a full subtractor combinational circuit to produce the outputs: Difference and

Borrow

7) Demonstrate on a 2-bit magnitude comparator with three outputs:

A>B, A=B and A<B.

8) Explain the construction and working of Bi-CMOS inverter.

9) Design the combinational circuit to decode BCD code to Binary Code.

10) Design and implement the 3 line to 8-line decoder

11. Differentiate between a MUX and a De-MUX.

12. Realize F(w, x, y, z)= Σ m(1,4,6,10,11,15) using 8 to 1 MUX.

13. Explain adder subtractor circuit.

14. Design of a 1×8 demultiplexer circuit.

15. Implement F (A, B, C, D) = BC’+CD+B’CD’ using MUX

16. Differentiate between an encoder and decoder.

17. Construct a 3:8 decoder using 2:4 decoder.

18. Construct a full subtractor using decoder.

19. Discuss a decimal to BCD encoder and draw the circuit using logic gates.

20. Perform the addition of (1101)2 with (1001)2


Unit- 05

1) Explain the concepts of read and write operations in memory. [BL=2]

2) Implement the following function using PAL. [BL=4]

a) A(x,y,z)=∑m(1,3,5,6)

b) B(x,y,z)=∑m(0,2,6,7)

c) C(x,y,z)=∑m(2,3,6)

3) Design a Gray to Binary code converter using a PLA.

4) Realize the following functions using PAL, F= m(3,4,5,7) G= m(1,3,5,6,7) and H= m(1,4,5).

5) write short note on designing PLA and PAL. Draw a block diagram and explain its working.

6) Design 3 bit Binary to Gray code converter using PLA.

7) How is memory size described? Explain with an example.

8) Distinguish between EPROM and EEPROM


Digital Electronics - Material
Unit- 01
1) Convert
a) (3000.45)10=( )8 b)(85.63)10=( )2
c) (0.122)10=( )16 d) (259)10=( )16
2) -73-43 by using 2’s complement
3) 55-20 by using 2’s complement
4) 78-26 BCD number using 10’s complement
5) 24-68 using 10’s complement
6) Consider a binary code that consists only four valid codewords as given below.
00000, 01011, 10101, 11110
Let minimum Hamming distance of code be ‘d’ and maximum number of erroneous
bits that can be corrected by the code be ‘e’. Find the value of ‘d’ and ‘e’.
7) Discuss the types of parity bit and discuss how the simple parity bit can detect a
damaged data unit with example.
8) Convert (A0CB.EE)16 = (___)10.
9) Represent 4 bit code 1101 into 7 bit even parity Hamming code.
10) Find the Excess 3 code of (546)
11) Perform the following
a) (5531)8- (3261)8+(100)10
b) convert (19.75)10 into binary
c) determine the base x: (211)x = (152)8
d) convert (F4D2)16 into decimal
12) Define digital signal and Analog signals and its function in details and also define advantages and
application of digital signals and Analog signals.
13) Carry out following addition and subtraction of following numbers (17F68)16 and (3376)8with result in ( ) 8 and ( )
16 respectively

14) Write steps to convert a) Binary code to octal and hexadecimal directly b) Gray code to binary code c) Decimal
number to any other base

15) write short note-

a) Hamming code

b) ASCII code

c) Floating point representation

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