Logic Gates

Logic gates are the basic building blocks of any digital system. It is an electronic circuit having one or more than one inpu t and only
one output. The relationship between the input and the output is based on a certain logic. Based on this, logic gates are named as
AND gate, OR gate, NOT gate etc.

AND Gate

A circuit which performs an AND operation is shown in figure. It has n input (n >= 2) and one output.

Logic diagram

Truth Table

OR Gate

A circuit which performs an OR operation is shown in figure. It has n input (n >= 2) and one output.

Logic diagram

Truth Table
NOT Gate

NOT gate is also known as Inverter. It has one input A and one output Y.

Logic diagram

Truth Table

NAND Gate

A NOT-AND operation is known as NAND operation. It has n input (n >= 2) and one output.

Logic diagram

Truth Table
NOR Gate

A NOT-OR operation is known as NOR operation. It has n input (n >= 2) and one output.

Logic diagram

Truth Table

XOR Gate

XOR or Ex-OR gate is a special type of gate. It can be used in the half adder, full adder and subtractor. The exclusive-OR gate is
abbreviated as EX-OR gate or sometime as X-OR gate. It has n input (n >= 2) and one output.

Logic diagram
Truth Table

XNOR Gate

XNOR gate is a special type of gate. It can be used in the half adder, full adder and subtractor. The exclusive-NOR gate is
abbreviated as EX-NOR gate or sometime as X-NOR gate. It has n input (n >= 2) and one output.

Logic diagram

Truth Table

De-Morgan's Theorem
A famous mathematician DeMorgan invented the two most important theorems of boolean algebra. The DeMorgan's theorems are
used for mathematical verification of the equivalency of the NOR and negative-AND gates and the negative-OR and NAND gates.
These theorems play an important role in solving various boolean algebra expressions. In the below table, the logical operation for
each combination of the input variable is defined.
Input variables Output Condition

A B AND NAND OR NOR

0 0 0 1 0 1

0 1 0 1 1 0

1 0 0 1 1 0

1 1 1 0 1 0

The rules of De-Morgan's theorem are produced from the Boolean expressions for OR, AND, and NOT using two input variables x
and y. The first theorem of Demorgan's says that if we perform the AND operation of two input variables and then perform the NOT
operation of the result, the result will be the same as the OR operation of the complement of that variable. The second theorem of
DeMorgan says that if we perform the OR operation of two input variables and then perform the NOT operation of the result, the
result will be the same as the AND operation of the complement of that variable.

De-Morgan's First Theorem

According to the first theorem, the complement result of the AND operation is equal to the OR operation of the complement of that
variable. Thus, it is equivalent to the NAND function and is a negative-OR function proving that (A.B)' = A'+B' and we can show this
using the following table.

Inputs Output For Each Term

A B A.B (A.B)' A' B' A'A+B'

0 0 0 1 1 1 1

0 1 0 1 1 0 1

1 0 0 1 0 1 1

1 1 1 0 0 0 0
De-Morgan's Second Theorem

According to the second theorem, the complement result of the OR operation is equal to the AND operation of the complement of
that variable. Thus, it is the equivalent of the NOR function and is a negative-AND function proving that (A+B)' = A'.B' and we can
show this using the following truth table.

Inputs Output For Each Term

A B A+B (A+B)' A' B' A'.B'

0 0 0 1 1 1 1

0 1 1 0 1 0 0

1 0 1 0 0 1 0

1 1 1 0 0 0 0
Let's take some examples in which we take some expressions and apply DeMorgan's theorems.

Example 1: (A.B.C)'

(A.B.C)'=A'+B'+C'

Example 2: (A+B+C)'

(A+B+C)'=A'.B'.C

Example 3: ((A+BC')'+D(E+F')')'

For applying the DeMorgan's theorem on this expression, we have to follow the following expressions:

1) In complete expression, first, we find those terms on which we can apply the DeMorgan's theorem and treat each term as a single
variable.

So,

2) Next, we apply DeMorgan's first theorem. So,

3) Next, we use rule number 9, i.e., (A=(A')') for canceling the double bars.

4) Next, we apply DeMorgan's second theorem. So,

5) Again apply rule number 9 to cancel the double bar

Now, this expression has no term in which we can apply any rule or theorem. So, this is the final expression.

Example 3: (AB'.(A + C))'+ A'B.(A + B + C')'

 The combinational circuit is time-independent. The output it generates does not depend on any of its previous inputs. On the other hand, sequential
circuits are the ones that depend on clock cycles. They depend entirely on the past as well as the present inputs for generating output.

Combinational Circuit:

 The output of a Combinational Circuit depends entirely on the present input.

 It exhibits a faster speed.
 It is comparatively easier to design.

 No feedback is present between the input and output.

 The combinational circuit depends on time.

 Logic gates form the building blocks of such circuits.

 One can make use of it for both boolean and arithmetic operations.

 They don’t hold the capacity of storing any state.

 These circuits do not have a clock- thus, they don’t require triggering.

 They do not possess any memory element.

 Users can feasibly use as well as handle them.

 Example – Demultiplexer, Multiplexer, Decoder, Encoder, etc.

Sequential Circuit:

 The output of a Sequential Circuit depends on both- past as well as present inputs.

 It works at a comparatively slower speed.

 The design of these circuits is comparatively much tougher than the Combinational Circuit.

 A feedback path exists between the output and the input.

 The circuit is time-dependent.

 Flip-flops constitute the building blocks of such a circuit.

 People mainly use them for storing data and information.

 They possess the capability of storing any data state or retaining an earlier state at any given point.

 Because a Sequential circuit depends on a clock, it usually requires triggering.

 They always possess a memory element.

 A user may not be able to handle and use these circuits easily.

 For Example – Counters, Flip-flops, etc.

Difference Between Combinational and Sequential Circuit
Parameters Combinational Circuit Sequential Circuit

Meaning and It is a type of circuit that generates It is a type of circuit in which the output does not
Definition an output by relying on the input it only rely on the current input. It also relies on the
receives at that instant, and it stays previous ones.
independent of time.

Feedback A Combinational Circuit requires no The output of a Sequential Circuit, on the other
feedback for generating the next hand, relies on both- the previous feedback and the
output. It is because its output has no current input. So, the output generated from the
dependency on the time instance. previous inputs gets transferred in the form of
feedback. The circuit uses it (along with inputs) for
generating the next output.

Performance We require the input of only the In the case of a Sequential Circuit, the performance
current state for a Combinational is very slow and also comparatively lower. Its
Circuit. Thus, it performs much dependency on the previous inputs makes the
faster and better in comparison with process much more complex.
the Sequential Circuit.

Complexity It is very less complex in This type of circuit is always more complex in its
comparison. It is because it basically nature and functionality. It is because it implements
lacks implementation of feedback. the feedback, depends on previous inputs and also on
clocks.

Elementary Logic gates form the building/ Flip-flops form the building/ elementary blocks of a
Blocks elementary blocks of a Sequential Circuit.
Combinational Circuit.

Operation One can use these types of circuits You can mainly make use of these types of circuits
for both- Boolean as well as for storing data.
Arithmetic operations.

flip flop:

A circuit that has two stable states is treated as a flip flop. These stable states are used to store binary
data that can be changed by applying varying inputs. The flip flops are the fundamental building blocks
of the digital system. Flip flops and latches are examples of data storage elements. In the sequential
logical circuit, the flip flop is the basic storage element. The latches and flip flops are the basic storage
elements but different in working. There are the following types of flip flops:
SR Flip Flop

The S-R flip flop is the most common flip flop used in the digital system. In SR flip flop, when
the set input "S" is true, the output Y will be high, and Y' will be low. It is required that the
wiring of the circuit is maintained when the outputs are established. We maintain the wiring until
set or reset input goes high, or power is shutdown.

The S-R flip flop is the simplest and easiest circuit to understand.

Truth Table:

J-K Flip-flop

The JK flip flop is used to remove the drawback of the S-R flip flop, i.e., undefined states. The
JK flip flop is formed by doing modification in the SR flip flop. The S-R flip flop is improved in
order to construct the J-K flip flop. When S and R input is set to true, the SR flip flop gives an
inaccurate result. But in the case of JK flip flop, it gives the correct output.
In J-K flip flop, if both of its inputs are different, the value of J at the next clock edge is taken by
the output Y. If both of its input is low, then no change occurs, and if high at the clock edge, then
from one state to the other, the output will be toggled. The JK Flip Flop is a Set or Reset Flip
flop in the digital system.

Truth Table:

D Flip Flop

D flip flop is a widely used flip flop in digital systems. The D flip flop is mostly used in shift-
registers, counters, and input synchronization.
Truth Table:

T Flip Flop

Just like JK flip-flop, T flip flop is used. Unlike JK flip flop, in T flip flop, there is only single
input with the clock input. The T flip flop is constructed by connecting both of the inputs of JK
flip flop together as a single input.
The T flip flop is also known as Toggle flip-flop. These T flip-flops are able to find the
complement of its state.

Truth Table:

Boolean algebra
The logical symbol 0 and 1 are used for representing the digital input or output. The symbols "1" and "0" can also be used fo r a
permanently open and closed digital circuit. The digital circuit can be made up of several logic gates. To perform the logical
operation with minimum logic gates, a set of rules were invented, known as the Laws of Boolean Algebra. These rules are used to
reduce the number of logic gates for performing logic operations.

The Boolean algebra is mainly used for simplifying and analyzing the complex Boolean expression. It is also known as Binary
algebra because we only use binary numbers in this. George Boole developed the binary algebra in 1854.

Rules in Boolean algebra

1. Only two values(1 for high and 0 for low) are possible for the variable used in Boolean algebra.
2. The overbar(-) is used for representing the complement variable. So, the complement of variable C is represented as .
3. The plus(+) operator is used to represent the ORing of the variables.
4. The dot(.) operator is used to represent the ANDing of the variables.

Boolean Laws

There are six types of Boolean Laws.

Commutative law
Any binary operation which satisfies the following expression is referred to as commutative operation.

Commutative law states that changing the sequence of the variables does not have any effect on the output of a logic circuit.

Associative law
This law states that the order in which the logic operations are performed is irrelevant as their effect is the same.

Distributive law
Distributive law states the following condition.

AND law
These laws use the AND operation. Therefore they are called as AND laws.

OR law
These laws use the OR operation. Therefore they are called as OR laws.

INVERSION law
This law uses the NOT operation. The inversion law states that double inversion of a variable results in the original variabl e itself.

De Morgan Law

The operation of an OR and AND logic circuit will remain same if we invert all the inputs, change operators from AND to OR and OR
to AND, and invert the output.

(A.B)' = A'+B'

(A+B)' = A'.B'

Karnaugh Map(K-Map) method

The K-map is a systematic way of simplifying Boolean expressions. With the help of the K-map method, we can find the simplest
POS and SOP expression, which is known as the minimum expression. The K-map provides a cookbook for simplification.

Just like the truth table, a K-map contains all the possible values of input variables and their corresponding output values. However,
in K-map, the values are stored in cells of the array. In each cell, a binary value of each input variable is stored.

The K-map method is used for expressions containing 2, 3, 4, and 5 variables. For a higher number of variables, there is another
method used for simplification called the Quine-McClusky method. In K-map, the number of cells is similar to the total number of
variable input combinations. For example, if the number of variables is three, the number of cells is 2 3=8, and if the number of
variables is four, the number of cells is 24. The K-map takes the SOP and POS forms. The K-map grid is filled using 0's and 1's. The K-
map is solved by making groups. There are the following steps used to solve the expressions using K-map:

1. First, we find the K-map as per the number of variables.

2. Find the maxterm and minterm in the given expression.
3. Fill cells of K-map for SOP with 1 respective to the minterms.
4. Fill cells of the block for POS with 0 respective to the maxterm.
5. Next, we create rectangular groups that contain total terms in the power of two like 2, 4, 8, … and try to cover as many
elements as we can in one group.
6. With the help of these groups, we find the product terms and sum them up for the SOP form.
2 Variable K-map

There is a total of 4 variables in a 2-variable K-map. There are two variables in the 2-variable K-map. The following figure shows the
structure of the 2-variable K-map:

o In the above figure, there is only one possibility of grouping four adjacent minterms.
o The possible combinations of grouping 2 adjacent minterms are {(m 0, m1), (m2, m3), (m0, m2) and (m1, m3)}.
o 3-variable K-map
o The 3-variable K-map is represented as an array of eight cells. In this case, we used A, B, and C for the variable. We can use
any letter for the names of the variables. The binary values of variables A and B are along the left side, and the values of C
are across the top. The value of the given cell is the binary values of A and B at left side in the same row combined with
the value of C at the top in the same column. For example, the cell in the upper left corner has a binary value of 000, and
the cell in the lower right corner has a binary value of 101.

o
o The 4-Variable Karnaugh Map
o The 4-variable K-map is represented as an array of 16 cells. Binary values of A and B are along the left side, and the values
of C and D are across the top. The value of the given cell is the binary values of A and B at left side in the same row
combined with the binary values of C and D at the top in the same column. For example, the cell in the upper right corner
has a binary value of 0010, and the cell in the lower right corner has a binary value of 1010
o

o 5-variable K-map
o With the help of the 32- cell K-map, the boolean expression with 5 variables can be simplified. For constructing a 5-
variable K-map, we use two 4-variable K-maps. The cell adjacencies within each of the 4- variable maps for the 5-variable
map are similar to the 4- variable map.
o A K-map for five variables (PQRST) can be constructed using two 4-variable maps. Each map contains 16 cells with all
combinations of variables Q, R, S, and T. One map is for P = 0, and the other is for P = 1).
Sum of product(SOP)
A canonical sum of products is a boolean expression that entirely consists of minterms. The Boolean function F is defined on two
variables X and Y. The X and Y are the inputs of the boolean function F whose output is true when any one of the inputs is set to
true. The truth table for Boolean expression F is as follows:

Inputs Output

X Y F

0 0 0

0 1 1

1 0 1

1 1 1

In our previous section, we learned about how we can form the minterm from the variable's value. Now, a column will be added for
the minterm in the above table. The complement of the variables is taken whose value is 0, and the variables whose value is 1 will
remain the same.

Inputs Output Minterm

X Y F M
0 0 0 X'Y'

0 1 1 X'Y

1 0 1 XY'

1 1 1 XY

Now, we will add all the minterms for which the output is true to find the desired canonical SOP(Sum of Product) expression.

F=X' Y+XY'+XY

Converting Sum of Products (SOP) to shorthand notation

The process of converting SOP form to shorthand notation is the same as the process of finding shorthand notation for minterms.
There are the following steps to find the shorthand notation of the given SOP expression.

o Write the given SOP expression.

o Find the shorthand notation of all the minterms.
o Replace the minterms with their shorthand notations in the given expression.

Example: F = X'Y+XY'+XY

1. Firstly, we write the SOP expression:

F = X'Y+XY'+XY

2. Now, we find the shorthand notations of the minterms X'Y, XY', and XY.

X'Y=(01)2 =m1

XY'=(10)2 =m2

XY = (11)2 = m3

3. In the end, we replace all the minterms with their shorthand notations:

F=m1+m2+m3

Converting shorthand notation to SOP expression

The process of converting shorthand notation to SOP is the reverse process of converting SOP expression to shorthand notation.
Let's see an example to understand this conversion.

Example:
Let us assume that we have a boolean function F, which defined on two variables X and Y. The minterms for the function F a re
expressed as shorthand notation is as follows:

F=∑(1,2,3)

Now, from this expression, we will find the SOP expression. The Boolean function F has two input variables X and y and the output of
F=1 for m1, m2, and m3, i.e., 1st, 2nd, and 3rd combinations. So,

F=∑(1,2,3)

F=m1+m2+m3

F= 01 + 10 + 11

Now, we replace zeros with either X' or Y' and ones with either X or Y. Simply, the complement variable is used when the variable
value is 1 otherwise the non-complement variable is used.

F=∑(1,2,3)

F=01+10+11

F= A'B + AB' + AB

Product of Sum (POS)

A canonical product of sum is a boolean expression that entirely consists of maxterms. The Boolean function F is defined on two
variables X and Y. The X and Y are the inputs of the boolean function F whose output is true when only one of the inputs is set to
true. The truth table for Boolean expression F is as follows:

Inputs Output

X Y F

0 0 0

0 1 1

1 0 1

1 1 0

In our minterm and maxterm section, we learned about how we can form the maxterm from the variable's value. A column will be
added for the maxterm in the above table. The complement of the variables is taken whose value is 0, and the variables whose value
is 1 will remain the same.

Inputs Output Minterm

X Y F M

0 0 0 X'+Y'

0 1 1 X'+Y

1 0 1 X+Y'

1 1 1 X+Y

Now, we will multiply all the minterms for which the output is false to find the desired canonical POS(Product of sum) expression.

F=(X'+Y').(X+Y)

Converting Product of Sum (POS) to shorthand notation

The process of converting POS form to shorthand notation is the same as the process of finding shorthand notation for maxterms.
There are the following steps used to find the shorthand notation of the given POS expression.

o Write the given POS expression.

o Find the shorthand notation of all the maxterms.
o Replace the minterms with their shorthand notations in the given expression.

Example: F = (X'+Y').(X+Y)

1. Firstly, we will write the POS expression:

F = (X'+Y').(X+Y)

2. Now, we will find the shorthand notations of the maxterms X'+Y' and X+Y.

X'+Y'=(00)2 =M0

X+Y = (11)2 = M3

3. In the end, we will replace all the minterms with their shorthand notations:

F=M0.M3

Converting shorthand notation to POS expression

The process of converting shorthand notation to POS is the reverse process of converting POS expression to shorthand notation.
Let's see an example to understand this conversion.

Example:
Let us assume that we have a boolean function F, defined on two variables X and Y. The maxterms for the function F are expressed as
shorthand notation is as follows:

F=∏(1,2,3)

Now, from this expression, we find the POS expression. The Boolean function F has two input variables X and Y and the output of
F=0 for M1, M2, and M3, i.e., 1st, 2nd, and 3rd combinations. So,

F=∏(1,2,3)

F=M1.M2.M3

F= 01.10.11

Next, we replace zeros with either X or Y and ones with either X' or Y'. Simply, if the value of the variable is 1, then we take the
complement of that variable, and if the value of the variable is 0, then we take the variable "as is".

F=∑(1,2,3)

F=01.10.11

F=(A+B').( A'+B).( A'+B')

Half Adder
The Half-Adder is a basic building block of adding two numbers as two inputs and produce out two outputs. The adder is used to
perform OR operation of two single bit binary numbers. The augent and addent bits are two input states, and 'carry' and 'sum 'are
two output states of the half adder.

Block diagram

Truth Table
In the above table,

1. 'A' and' B' are the input states, and 'sum' and 'carry' are the output states.
2. The carry output is 0 in case where both the inputs are not 1.
3. The least significant bit of the sum is defined by the 'sum' bit.

The SOP form of the sum and carry are as follows:

Sum=x'y+xy'
Carry = xyn Pattern

Construction of Half Adder Circuit:

In the block diagram, we have seen that it contains two inputs and two outputs. The augent and addent bits are the input states,
and carry and sum are the output states of the half adder. The half adder is designed with the help of the following two logic gates:

1. 2-input AND Gate.

2. 2-input Exclusive-OR Gate or Ex-OR Gate

Half-Adder logical circuit:

So, the Half Adder is designed by combining the 'XOR' and 'AND' gates and provide the sum and carry.

There is the following Boolean expression of Half Adder circuit:

Sum= A XOR B (A+B) Carry= A AND B (A.B)

Full Adder
The half adder is used to add only two numbers. To overcome this problem, the full adder was developed. The full adder is use d to
add three 1-bit binary numbers A, B, and carry C. The full adder has three input states and two output states i.e., sum and carry.

Block diagram

Truth Table

In the above table,

1. 'A' and' B' are the input variables. These variables represent the two significant bits which are going to be added
2. 'Cin' is the third input which represents the carry. From the previous lower significant position, the carry bit is fetched.
3. The 'Sum' and 'Carry' are the output variables that define the output values.
4. The eight rows under the input variable designate all possible combinations of 0 and 1 that can occur in these variables.
Note: We can simplify each of the output 'Boolean function' with the help of the unique map method.

The SOP form can be obtained with the help of K-map as:

Sum = x' y' z+x' yz+xy' z'+xyz

Carry = xy+xz+yz

Construction of Half Adder Circuit:

The above block diagram describes the construction of the Full adder circuit. In the above circuit, there are two half adder
circuits that are combined using the OR gate. The first half adder has two single-bit binary inputs A and B. As we know that, the half
adder produces two outputs, i.e., Sum and Carry. The 'Sum' output of the first adder will be the first input of the second ha lf adder,
and the 'Carry' output of the first adder will be the second input of the second half adder. The second half adder will again provide
'Sum' and 'Carry'. The final outcome of the Full adder circuit is the 'Sum' bit. In order to find the final output of the 'Carry', we
provide the 'Carry' output of the first and the second adder into the OR gate. The outcome of the OR gate will be the final carry out
of the full adder circuit.

The MSB is represented by the final 'Carry' bit.

The full adder logic circuit can be constructed using the 'AND' and the 'XOR' gate with an OR gate.
The actual logic circuit of the full adder is shown in the above diagram. The full adder circuit construction can also be represented in
a Boolean expression.

Sum:

o Perform the XOR operation of input A and B.

o Perform the XOR operation of the outcome with carry. So, the sum is (A XOR B) XOR C in which is also represented as:
(A ⊕ B) ⊕ Cin

Carry:

1. Perform the 'AND' operation of input A and B.

2. Perform the 'XOR' operation of input A and B.
3. Perform the 'OR' operations of both the outputs that come from the previous two steps. So the 'Carry' can be represented
as:
A.B + (A ⊕ B)

Full Subtractor
The Half Subtractor is used to subtract only two numbers. To overcome this problem, a full subtractor was designed. The full
subtractor is used to subtract three 1-bit numbers A, B, and C, which are minuend, subtrahend, and borrow, respectively. The full
subtractor has three input states and two output states i.e., diff and borrow.

Block diagram
Truth Table

In the above table,

o 'A' and' B' are the input variables. These variables represent the two significant bits that are going to be subtracted.
o 'Borrowin' is the third input which represents borrow.
o The 'Diff' and 'Borrow' are the output variables that define the output values.
o The eight rows under the input variable designate all possible combinations of 0 and 1 that can occur in these variables.

Note: We can simplify each of the Boolean output functions with the help of the unique map method.

The SOP form can be obtained with the help of K-map as:
Diff=xy' z'+x' y' z+xyz+x'yz'
Play Video

Borrow=x' z+x' y+yz

Construction of Full Subtractor Circuit:

The above block diagram describes the construction of the Full subtractor circuit. In
the above circuit, there are two half adder circuits that are combined using the OR gate. The first half subtractor has two single-bit
binary inputs A and B. As we know that, the half subtractor produces two outputs, i.e., 'Diff' and 'Borrow'. The 'Diff' output of the first
subtractor will be the first input of the second half subtractor, and the 'Borrow' output of the first subtractor will be the second input
of the second half subtractor. The second half subtractor will again provide 'Diff' and 'Borrow'. The final outcome of the Full
subtractor circuit is the 'Diff' bit. In order to find the final output of the 'Borrow', we provide the 'Borrow' of the first and the second
subtractor into the OR gate. The outcome of the OR gate will be the final carry 'Borrow' of full subtractor circuit.

The MSB is represented by the final 'Borrow' bit.

The full subtractor logic circuit can be constructed using the 'AND', 'XOR', and NOT gate with an OR gate.
The actual logic circuit of the full subtractor is shown in the above diagram. The full subtractor circuit construction can also be
represented in a Boolean expression.

Diff:

o Perform the XOR operation of input A and B.

o Perform the XOR operation of the outcome with 'Borrow'. So, the difference is (A XOR B) XOR 'Borrow in' which is also
represented as:
(A ⊕ B) ⊕ 'Borrowin'

Borrow:

o Perform the 'AND' operation of the inverted input A and B.

o Perform the 'XOR' operation of input A and B.
o Perform the 'OR' operations of both the outputs that come from the previous two steps. So the 'Borrow' can be
represented as:
A'.B + (A ⊕ B)'

Shift Register
A group of flip flops which is used to store multiple bits of data and the data is moved from one
flip flop to another is known as Shift Register. The bits stored in registers shifted when the
clock pulse is applied within and inside or outside the registers. To form an n-bit shift register,
we have to connect n number of flip flops. So, the number of bits of the binary number is directly
proportional to the number of flip flops. The flip flops are connected in such a way that the first
flip flop's output becomes the input of the other flip flop.
A Shift Register can shift the bits either to the left or to the right. A Shift Register, which
shifts the bit to the left, is known as "Shift left register", and it shifts the bit to the right,
known as "Right left register".

The shift register is classified into the following types:

o Serial In Serial Out

o Serial In Parallel Out
o Parallel In Serial Out
o Parallel In Parallel Out
o Bi-directional Shift Register
o Universal Shift Register

Serial IN Serial OUT

In "Serial Input Serial Output", the data is shifted "IN" or "OUT" serially. In SISO, a single bit is
shifted at a time in either right or left direction under clock control.

Block Diagram:

Truth Table
Waveforms

Serial IN Parallel OUT

In the "Serial IN Parallel OUT" shift register, the data is passed serially to the flip flop, and
outputs are fetched in a parallel way. The data is passed bit by bit in the register, and the output
remains disabled until the data is not passed to the data input. When the data is passed to the
register, the outputs are enabled, and the flip flops contain their return value

Below is the block diagram of the 4-bit serial in the parallel-out shift register.

Block Diagram

Parallel IN Serial OUT

In the "Parallel IN Serial OUT" register, the data is entered in a parallel way, and the outcome
comes serially. A four-bit "Parallel IN Serial OUT" register is designed below. The input of
the flip flop is the output of the previous Flip Flop. The input and outputs are connected through
the combinational circuit. Through this combinational circuit, the binary input B 0, B1, B2, B3 are
passed. The shift mode and the load mode are the two modes in which the "PISO" circuit
works.

Block Diagram

Parallel IN Parallel OUT

In "Parallel IN Parallel OUT", the inputs and the outputs come in a parallel way in the
register. The inputs A0, A1, A2, and A3, are directly passed to the data inputs D0, D1, D2, and
D3 of the respective flip flop. The bits of the binary input is loaded to the flip flops when the
negative clock edge is applied. The clock pulse is required for loading all the bits. At the output
side, the loaded bits appear.

Block Diagram
Bidirectional Shift Register

The binary number after shifting each bit of the number to the left by one position will be
equivalent to the number produced by multiplying the original number by 2. In the same way, the
binary number after shifting each bit of the number to the right by one position will be equivalent
to the number produced by dividing the original number by 2.

For performing the multiplication and division operation using the shift register, it is required that the data should be mov ed in both
the direction, i.e., left or right in the register. Such registers are called the "Bidirectional" shift register.