CSII_labjournal
CSII_labjournal
List of Experiments
Signature
Expt. Page Date of
Name of the Experiment Remarks of practical
No. No. completion
in charge
1 Study of logic gates and
verification of De Morgan's
theorems.
4 Study of Multiplexer IC
74153 (Dual 4 to 1 MUX)
5 Study of De-Multiplexer IC
74139 (Dual 1 to 4 MUX)
10 Study of components
12 Study of PC Architecture
1
2
Practical 1
Apparatus / Components:
3 Resistor 330 Ω
Part 1: To verify different logic gates with truth tables using ICs.
4) Graphs etc.
Procedure:
6) Conclusion 3. Write expected truth table as per logic equation for each gate.
3
Specification and pin diagram:
14 + VCC 14 + VCC
i/p i/p
2
1
2
1
i/p i/p
13
12
13
12
IC 7 4 3 2
IC 7408
3
o/p 3 o/p
o/p o/p
11
11
i/p i/p
5
4
5
4
i/p i/p
10
9
10
9
6
6
o/p o/p
o/p o/p
8
8
7 7
GND GND
14 + VCC 14 + VCC
i/p
1
I/P
2
1
13
i/p O/P
I/P
13
12
2
O/P
o/p
IC 7 4 8 6
12
IC 7404
3
3
I/P
o/p
11
11
i/p I/P
O/P
5
4
O/P
i/p
10
5
I/P
9
10
9
I/P
6
o/p O/P
6
o/p O/P
8
8
7 7
GND GND
14 + VCC 14 + VCC
o/p
1
i/p
i/p o/p
13
2
1
13
12
2
3
i/p
IC 7 4 0 0
IC 7 4 0 2
o/p
12
11
3
o/p i/p
11
i/p
o/p
4
5
4
i/p o/p
10
10
9
5
6
i/p
6
o/p
9
8
o/p i/p
8
7
GND 7
GND
4
Verification of Truth tables :
1. AND Gate (IC 7408)
+5 V
INPUT OUTPUT
A B Expected Observed
1 330 Ω
3 0 0 0
2
0 1 0
1 0 0
1 1 1
+5 V
INPUT OUTPUT
A B Expected Observed
1 330 Ω
3
2 0 0 0
0 1 1
1 0 1
1 1 1
A Expected Observed
330 Ω
1 2 0 1
1 0
+5 V INPUT OUTPUT
A B Expected Observed
1
3
330 Ω 0 0 0
2
0 1 1
1 0 1
1 1 0
5
5. NAND Gate (IC 7400)
INPUT OUTPUT
+5 V
A B Expected Observed
0 0 1
1 330 Ω
3
2 0 1 1
1 0 1
1 1 0
0 0 1
2 330 Ω
1
3 0 1 0
1 0 0
1 1 0
LHS RHS
+5 V +5 V
1 2
1
2 3
1 2
3 3 4
330 Ω
330 Ω
6
Observation Table:
0 0 1 1
0 1 0 0
1 0 0 0
1 1 0 0
+ 5 V LHS RHS
+5 V
1 2 32
1 1
3 3
2 2
3 4
330 Ω
330 Ω
Observation Table:
0 0 1 1
0 1 1 1
1 0 1 1
1 1 0 0
7
Result:
Conclusion:
Theory:
Logic gate is a basic building block of any digital circuit. It is an electronic circuit
having two inputs and one output which is result of some logical relation of inputs.
This logic can be multiplication, addition or inversion etc.
Truth Table:
It is a table which contains all possible combinations of inputs and status of output
which stand true for all these inputs. The possible combination of input is dependent
on number of input. e.g. If a circuit has n inputs then possible combinations are 2n .
8
Practical 2
2 Resistor 330 Ω
2
7408
3
Carry
3)
4) Calculations
Graphs etc.
4) Graphs etc.
B
4) Graphs etc.
5) Result 330 Ω
1
5) Result
2
7486 3 Sum
5)
6) Result
Conclusion
6) Conclusion
6) Conclusion
9
Truth Table:
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Working:
Half adder is a combinational circuit which can add two single bit binary numbers.
SUM
A
Half Adder
B CARRY
As shown in the block diagram above it has two inputs which is nothing but 2 single
bit binary numbers and two outputs, SUM and CARRY . In the circuit diagram of
half adder circuit AND and Ex-OR gates are used to represent SUM and CARRY
because the Boolean equation for SUM = A + B and foe CARRY = A . B . The
major drawback of the half adder circuit is that it can add Carry further. i.e. Three bit
addition is not possible in Half Adder. So all what is required is cascading of more
half adder blocks together to have multi bit binary addition.
Result:
Conclusion:
10
Practical 3
Date : Aim : To build and test a full adder using logic gates .
…… /… /… Apparatus / Components :
Completion
for :
Circuit Diagram:
1) Diagram
+ 5V
2) Observations A
1
3
2
7408
3) calculations
B
4) Graphs etc.
1
7486 3
2
+ 5V
5) Result A
Carry
1
330 Ω
4 3
C 6 2
6) Conclusion 5
7408
B
330 Ω
4
6
Sum
7486
5
11
Truth Table:
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Working:
Full adder is a combinational circuit which can add three single bit binary numbers.
A SUM
B Full Adder
C CARRY
12
As shown in the block diagram above it has three inputs which is nothing but 3
single bit binary numbers and two outputs, SUM and CARRY . In the circuit
diagram of full adder circuit AND, Ex-OR and OR gates are used to represent SUM
and CARRY because the Boolean equation for SUM = A + B + C, that for CARRY
= AB + BC +AC. Full adder circuit can also be constructed using 2 half adders.
Carry 1
A Carry
Half Adder 1 1
3
B 2
Sum
The major advantage of the full adder circuit is that it can add Carry further since
three bit addition is possible in full Adder. So by cascading multiple full adder
blocks together n bit binary addition is possible easily. The circuit is call as Parallel
Adder.
Result:
Conclusion:
13
14
Practical 4
STUDY OF MULTIPLEXER
Date : Aim : 1.To study the working of 4 line to 1 line multiplexer using
gates . 2. To test a given 4 to 1 multiplexer using IC 74153.
…… /… /…
Apparatus / Components :
A B Strobe
2) Observations
1 2 3 4 5 6
D0 1
2
3) calculations 7421 6
4
5
1
3
2 7432
D1 9
4) Graphs etc. 10
7421 8
12
13 9
8
10 7432
D2 1 Y
5) Result 2
7421 6
4
5
4
6
5 7432
6) Conclusion D3 9
10
7421 8
12
13
15
Truth Table:
Expected(I/P
G S1 S0 Observed
Selected)
0 0 0 D0
0 0 1 D1
0 1 0 D2
0 1 1 D3
1 X X 0
D0 D1 D2 D3
+ 5V
16 6
5 4 3
14
S1
IC 74153
2
S0 1 7 8
G2 GND
Y 330 Ω
Working:
IC 74153 is a dual 4:1 multiplexer. It is 16 pin IC which has two 4:1 multiplexers
built inside. There are four separate data inputs for both MUX but select input and
data output is common for both. Apart from this Multiplexer has most important
control signal called as 'STROBE' signal which can activate or deactivate the entire
circuit. IC 74153 has two separate strobe signals namely G1 & G2. Both are active
low signals.
1 16
G2 +Vcc
2 15
G1
S0
3 14
D3 S1
4 13
D2 D3
MUX 2
MUX 1
5 12
D1 D2
6 11
D0 16 D1
10
D0
Y2 7
9
8 IC 74153 Y1
GND
Observation Table:
G S1 S0 Y
0 0 0 D0
0 0 1 D1
0 1 0 D2
0 1 1 D3
1 X X 0
Theory:
Multiplexer is a combinational circuit which has many inputs and a single output.
Particular input is selected and connected to the output. Selection of any input
depends on the status of control signals.
S1 S0
Select Lines
Data Input
D0
D1
D2
4 : 1 MUX Y
Data Output
D3
The above diagram shows a 4:1 multiplexer with 4 inputs , 1 output and two select
inputs. Here select inputs are nothing but control signal. The number of control
inputs depends on the number of data inputs ,so relation between them is given by
the equation M= 2N , where M = Data inputs and N = Control signal. There are
different configurations of Multiplexer such as 8:1 , 16:1 , 32:1 and so on.
Multiplexing process reduces the circuit complexity as well as it saves circuit size,
propagation delay and cost of circuit.
Result:
17
Conclusion:
18
Practical 5
STUDY OF DEMULTIPLEXER.
1) Diagram
Circuit Diagram:
2)
A B Strobe
Observations
1 2 3 4 5 6
Din 1
3) calculations 2
4 7421 6 Y0
5
4) Graphs etc. 9
10
12 7421 8 Y1
13
5) Result
1
2
4 7421 6 Y2
5
6) Conclusion
9
10
12 7421 8 Y3
13
19
Truth Table:
G S1 S0 Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3
0 0 0 Din 0 0 0
0 0 1 0 Din 0 0
0 1 0 0 0 Din 0
0 1 1 0 0 0 Din
1 X X 0 0 0 0
+ 5V GND
16
1
3 8
S1
IC 74139
2
S0 4 5 6 7
Y0 Y1 Y2 Y3
EXPECTED OBSERVED
CONTROL INPUTS
OUTPUTS OUTPUTS
Strobe G S1 S0 Y0 Y1 Y2 Y3
L 0 0 Din 0 0 0
L 0 1 0 Din 0 0
L 1 0 0 0 Din 0
L 1 1 0 0 0 Din
H X X 0 0 0 0
20
Working:
IC 74139 is a dual 1:4 De-multiplexer. It is 16 pin IC which has two 1:4 De-
multiplexers built inside. There are four separate data outputs , select inputs and
strobe signals for both DEMUX. 'STROBE' signal is control input which can
activate or deactivate the entire circuit. IC 74139 has two separate strobe signals
namely G1 & G2. Both are active low signals.
1 16
G1 +Vcc
2 15
G2
S0
3 14
S1 S0
4 13
Y0 S1
DEMUX 1
DEMUX 2
5 12
Y1 Y0
6 11
Y2 Y1
10
Y2
Y3 7
9
8 IC 74139 Y3
GND
Theory:
De- Multiplexer is a combinational circuit which has single input and a many
outputs. Particular output terminal is selected and connected to the input. Selection
of any output depends on the status of control signals. In other words it behaves
exactly opposite to that of Multiplexer.
circuit.
Conclusion:
21
22
Practical 6
STUDY OF ENCODER.
…… /… /…
Apparatus / Components :
3 Encoder IC 74147
Circuit Diagram:
Completion
for :
1) Diagram
2)
Observations
3) calculations
4) Graphs etc.
5) Result Working:
23
Observation Table:
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
X1 IC +VCC
X2
7 330 Ω
X3 D
4
330 Ω
X4 C
1
X5 330 Ω
4
B
X6
7 330 Ω
X7
A
X8
X9
24
Truth Table using IC 74147:
INPUTS OUTPUTS
X1 X2 X3 X4 X5 X6 X7 X8 X9 D C B A
H H H H H H H H H L L L L
L H H H H H H H H L L L H
X L H H H H H H H L L H L
X X L H H H H H H L L H H
X X X L H H H H H L H L L
X X X X L H H H H L H L H
X X X X X L H H H L H H L
X X X X X X L H H L H H H
X X X X X X X L H H L L L
X X X X X X X X L H L L H
Conclusion:
Board Connections:
25
26
PRACTICAL 7
STUDY OF DECODER
…… /… /… Apparatus / Components :
3 Decoder IC 7447
Circuit Diagram:
+ Vcc
Completion
for : 3
330 Ω
1) Diagram f 9
A 16 15 a
330 Ω
7 g 10
14
2) Observations 330 Ω f b
B a 7 g
IC 13
1 330 Ω
7447 b 6
12
C 330 Ω
c 4 e c
3) calculations 2 11 d
330 Ω
D d 2
10
6 330 Ω
e 1
8 9 SSD
4) Graphs etc.
5) Result
6) Conclusion
27
Working:
Observation Table:
Conclusion:
Board Connections:
28
Practical 8
STUDY OF RS FLIP FLOP.
1) Diagram
+ Vcc 1 330 Ω
3
2
2)
Observations
4 330 Ω
6
3) 5
+ Vcc
calculations
4) Graphs etc.
Procedure:
29
Observation Table:
EXPECTED
INPUTS OUTPUT
Description
S R Q Q
Race
0 0 0 0
Reset
0 1 0 1
Set
1 0 1 0
No Change
1 1 1 0
Circuit Diagram:
+ Vcc 2
330 Ω
1
3
5
330 Ω
4
+ Vcc 6
Procedure:
30
Observation Table:
EXPECTED
INPUTS OUTPUT
Description
S R Q Q
No Change
0 0 0 1
Reset
0 1 0 1
Set
1 0 1 0
Race
1 1 1 1
Theory:
Sequential circuits are the one in which output at any time instant depends on
present state of input as well as past state of output. Hence it very important for such
circuits that previous state of output must be stored. So electronic circuit which acts
as memory element is nothing but Flip Flop. It is a basic building block of
sequential circuit. It is used to store single bit data. It is also called as one bit
memory cell or latch. Flip Flop has two inputs and two outputs. Depending upon
types of inputs there are three basic Flip Flops namely RS Type, J-K Type and D
Flip Flop.
Apart from these inputs Flip Flop also requires external triggering input called as
Clock signal .So again depending upon presence of Clock signal Flip Flop can be of
Clocked or Un-clocked type.
Flip Flop can store only one bit data. That can be either '0' or '1'. If output of Flip
Flop is one '1' then it is called as 'SET' condition or if it is '0' then 'RESET'
condition. Both the outputs of Flip Flop are compliments of each other so they can't
be equal at any time instant but if such condition occurs then it is called as
Forbidden / Unpredictable condition. Flip Flops are used to construct Counters and
Shift registers.
RS Flip Flop:
In this Flip Flop there are two inputs R (Reset ) and S (Set) , and two outputs Q and
Q . Whenever 'R' input is high it Resets the Flip Flop and if 'S' input is high then it
Sets the Flip Flop.
While observing the output state if LED glows then it is said that Flip Flop is in 'Set'
condition and if LED remains off then it is said that Flip Flop is in 'Reset' condition .
Conclusion:
31
32
Practical 9
Date :
Aim : To study the Decade Counter circuit using IC 7490 .
…… /… /…
Apparatus / Components :
1) Diagram
Circuit Diagram:
2) Observations
+ Vcc
3
3) calculations 330 Ω
9
1 5 16 15 a
330 Ω
12 7 10
14 14
330 Ω f b
4) Graphs etc. 9 1 7 g
2 IC 13
330 Ω
3 8 2 7447 6
12
6 330 Ω
5) Result 11 6 4 e c
7 11 d
330 Ω
2
10 10
330 Ω
1
6) Conclusion IC 7490 8 9 SSD
Procedure:
33
1. Connect the circuit as shown in the diagram.
2. Set signal generator to generate square wave of frequency 1 HZ. Keep the
amplitude sufficiently high in order to observe proper output.
Observation Table:
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 2
3 0 0 1 1 3
4 0 1 0 0 4
5 0 1 0 1 5
6 0 1 1 0 6
7 0 1 1 1 7
8 1 0 0 0 8
9 1 0 0 1 9
Theory:
Counter is a sequential circuit used to count clock pulses. It is constructed using
number of flip flops connected together. IC 7490 is a counter available in Integrated
format. It is called as Decade counter because it can count 10 states and then gets
Reset. There are 4 flip flops connected to each other inside IC 7490.But they are
arranged in such a way that they produce two different sections MOD 2 ( 1 RS
FF)and MOD 5 ( 3 JK FF).
In the circuit diagram shown below there are three blocks IC 7490, IC 7447 and then
Seven Segment Display (SSD) . Signal generator is required to give pulse input to
the counter circuit. Frequency of pulses must be low so that outputs can be observed
properly .These pulses acts as a clock signal to the flip flop inside IC 7490.
IC 7490
MOD 2 MOD 5
CLK A
CLK B
QA 34
QB QC QD
Output of IC 7490 is given to the decoder /driver circuit IC 7447. It is used to drive
Seven Segment Display. The decimal digit on SSD is the actual count of decade
counter circuit. IC 7490 is also called as scalar circuit. We can construct any
Modulus of counter from MOD 2 to MOD 10 using this IC.
Board Connections:
Conclusion:
35
36
Practical 10
Date :
Aim : To study the basic electronics components and classification.
…… /… /…
Apparatus / Components:
1) Resistors,
Initials for
Attendance
2) Capacitors
3) Diodes
4) Transistor
Diagram:
Completion Resistors
for :
1) Diagram
2) Observations
3) calculations
4) Graphs etc.
5) Result
6) Conclusion
Capacitors
37
Transistors
Procedure:
38
Observation Table:
10
Theory:
Resistors
39
2) Capacitors
3) Specify types.
3) Diodes
2) When two materials i.e. n-type and p-type are attached together, a momentary
flow of electrons occur from n to p side resulting in a third region where no charge
carriers are present. It is called Depletion region due to the absence of charge
carriers (electrons and holes in this case).
3) The diode's terminals are attached to each of these regions. The boundary
between these two regions, called a p–n junction, is where the action of the diode
takes place. The crystal allows electrons to flow from the N-type side (called the
cathode) to the P-type side (called the anode), but not in the opposite direction.
4) Transistors
2) The transistors also is a P-N device but with two P-N junctions and three
terminals
Conclusion:
40
Practical 11
Date :
Aim: To study the resistor color coding system for determining
…… /… /…
the value of carbon composition resistor.
Apparatus / Components:
Diagram:
Completion
for :
1) Diagram
2)
Observations
3) calculations
4) Graphs etc.
5) Result
Calculation of resistance
6) Conclusion
1)
2)
3)
41
Theory:
Method for determing the value of resistance
1) Note down the color codes present on the carbon composition resistors.
2) Note the digits for the first and second color band. The third band is multiplier
and multiply it to the digits of first and second color bands.
Refer the color code table for that.
3) Finally note down the value with tolerance value in ohms.
Conclusion:
42
Practical 12
Date :
Aim : To study the personal computer architecture and
…… /… /… Functionality of each part of the computer
Apparatus / Components:
Attendance Diagram:
Motherboard
Completion
for :
1) Diagram
2) Observations
3) calculations
4) Graphs etc.
Procedure:
5) Result
6) Conclusion
43
Motherboard
Daughterboard
Bus Types
• The address bus (sometimes called the memory bus) transports memory
addresses which the processor wants to access in order to read or write data.
It is a unidirectional bus.
• The data bus transfers instructions coming from or going to the processor. It is
a bidirectional bus.
• The control bus (or command bus) transports orders and synchronization
signals coming from the control unit and travelling to all other hardware
components. It is a bidirectional bus, as it also transmits response signals
from the hardware.
44
RAM VS ROM
RAM is a form of data storage that can be accessed randomly at any time, in any
order and from any physical location in contrast to other storage devices, such as
hard drives, where the physical location of the data determines the time taken to
retrieve it. RAM is measured in megabytes and the speed is measured in
nanoseconds and RAM chips can read data faster than ROM.
Comparison char
RAM ROM
RAM is volatile i.e. its contents It is non-volatile i.e. its contents are
Volatility: are lost when the device is retained even when the device is
powered off. powered off.
The two main types of RAM are The types of ROM include PROM,
Types:
static RAM and dynamic RAM. EPROM and EEPROM.
Questions
1) What is DMA controller?
2) Explain the bus standards.
3) Explain the properties of CPU.
4) What is interrupt? Explain it.
5) Explain the specifications of computer system.
6) Explain the various types of memory
45
46