UNIT-1

BINARY SYSTEMS, BOOLEAN ALGEBRA & LOGIC GATES, GATE LEVEL MINIMIZATION

2 MARKS QUESTIONS

1. What are the characteristics of Digital Systems?

2. Convert (15) 10 to Binary
3. Explain about Diminished Radix complement
4. What is meant by parity bit?
5. Define duality property.
6. Define binary logic?
7. Which gates are called as the universal gates? What are its advantages?
8. State the associative property of Boolean algebra
9. Explain classification of Number system
10. What is a prime implicate?
11. What is meant by karnaugh map or K-Map method?
12. Define Pair, Quad, and Octet
13. What are called don’t care conditions?
14. What are the 2 forms of Boolean expression?
15. Define Minterm & Maxterm
16. Explain SOP and POS form
17. Explain Canonical SOP form
18. State De Morgan's theorem
19. Explain demorgan’s law
20. What is an essential prime implicante

10 MARKS QUESTIONS

1. a) Convert the following numbers

i)(163.789)10 to Octal number ii)(11001101.0101)2 to base-8 and base

-4 iii)(4567)10 to base2 iv) (4D.56)16 to Binary
b)
Subtract (111001)2 from (101011) using 1’s complement?
2. Represent the decimal number 3452 in i) BCD ii) Excess-3

3. Perform (-50)-(-10) in binary using the signed-2’s complement

4. Convert the following numbers

i) (250.5)10 = ( )2 ii) ) (673.23)10 = ( )8 iii)(101110.01)2=( )8

5. a) Convert the following to binary and then to gray code (AB33)16

b) Perform the following Using BCD arithmetic (7129) 10 + (7711) 10

6. Explain the Binary codes with examples?

7. a) What is Digital System? Characteristics of digital systems

8. Design the circuit by Using NAND gates F= ABC’+ DE+ AB’D’

9. ) Simplify and implementation the following SOP function using NOR gates
F(A,B,C,D)= ∑m(0,1,4,5,10,11,14,15)
10. Convert the following
a)(1AD)16=( )10 b) (453)8=( )10 c) (10110011)2=( )10 d) (5436)10=( ) 3.

11. Explain binary to Gray & Gray to binary conversion with example?
12. State and Explain the DeMorgan’s Theorem and Consensus Theorem
13. Convert the following numbers

i) (615)10 = ( )16 ii) ) (214)10 = ( )8 iii)(0.8125)10=( )2

iv) (658.825)10=( )8 v)(54)10=( )2

16. Simplify the Boolean expression using K-MAP

F(A,B,C,D) = ∑m(1,2,3,8,9,10,11,14) +d(7,15)

17. Simplify the Boolean expression using K-map and implement using NAND gates
F(A,B,C,D) = ∑m(0,2,3,8,10,11,12,14).
18. Simplify the Boolean expressions to minimum number of literals

i) (A + B)(A + C’ )(B’ + C’ )
ii) AB + (AC)’ + AB’C (AB + C)
iii) (A+B)’ (A’+B’)’
19. Reduce the expression f(x,y,z,w)= πM(0,2,7,8,9,10,11,15) .d (3,4) using K-Map?

20. Obtain the a) SOP b) POS expression for the function given below
F(A,B,C,D)= = ∑m(0,1,2,5,8,9,10)

21. Simplify the Boolean expressions to minimum number of literals

i) X’ + XY + X Z’ + XYZ’ ii) (X+Y) (X+Y’)

22. Obtain the Complement of Boolean Expression

ii) A+B+A’B’C ii) AB + A (B +C) + B’(B+D)

23. Determine the minimal sum of product form of

a) f(w,x,y,z)=∑m(4,5,7,12,14,15) +d(3,8,10)

b) F(A,B,C,D)=πM(0,3,5,6,8,12,15)

24. Convert the given decimal number 234 to binary, quaternary, octal, hexadecimal and BCD
equivalent.

25. Perform the following

a) Subtraction by using 10’s complement for the given 3456 - 245.

26. Subtraction by using 2’s complement for the given 111001-1010.

27. a) Convert the following to Decimal and then to Octal. (i) (42341)6 (ii) (10010011)2.

b) Convert the following to Decimal and then to Hexadecimal. ( i) (1234)8 (ii) 110011112

28. Simplify the following Boolean expression:

(a) F = (A+B)(A’+C)(B+C).

(b) F = A+B+C’+D(E+F)

29. Obtain the truth table of the following Boolean function and express the function as sum of
minterms and product of maxterms F = (A+B) (B+C)

30. Simplify the following Boolean functions to minimum number of literals

(i) xyz + x’y + xyz’. (ii) xz + x’yz.

31. Convert the following to Decimal and then to Octal

(a) 123416 (b) 12EF16 (c) 101100112 (d) 100011112 (e) 35210
(f) 99910
32. Simplify the following Boolean expressions to minimum no. of literals.

i. ABC+A’B+ABC’ ii. (BC’+A’D)(AB’+CD’)

iii. x’yz+xz iv. xy+x(wz+wz’)
33. Obtain the Dual of the following Boolean expressions.

i. AB+A(B+C)+B’(B+D) ii. A+B+A‘B’C

iii. A’B+A’BC’+A’BCD+A’BC’D’E iv. ABEF+ABE’F’+A’B’EF
34. State Duality theorem. List Boolean laws and their Duals.

35. Simplify the following Boolean functions to minimum number of literals:

i. F = ABC + ABC’ + A’B ii. F = (A+B)’ (A’+B’)

36. Convert the following to binary and then to gray code.

(i) (1111)16 (ii) (BC54)16 (iii) (237)8 (iv) (164)10 (v) (323)8
3 7 . Perform the following using BCD arithmetic
(i) (79)10 + (177)10 (ii) (481)10 + (178)10
38. Convert the following to gray code and then to binary.
 (a) (1111)16 (b) (BC54)16 (c) (237)8 (d) (164)10 (e) (323)8

39.a) Minimize the following Boolean function using K-Map

F (A, B, C, D) = Σm(0, 2, 4, 6, 8, 10, 12, 14).

b) Realize it using NAND Gates.

41.a) Simplify the following Boolean expressions using K-map

F(W,X,Y,Z)= XZ+W’XY’+WXY+W’YZ+WY’Z
b) Implement the same using NAND gates.

42.a) Simplify the following expression using the K-map for the 3-variable.

Y = AB’C+A’BC+A’B’C+A’B’C’+AB’C’
b) Simplify the Boolean function F(A,B,C,D)=∑(1,3,7,11,15)+d(0,2,5)
43.a) Implement the following Boolean function using NOR gates.

Y=(AB’+A’B)(C+D’).
b) Simplify the following Boolean function for minimal POS form using K-map
F(X,Y,Z) = X’YZ + XY’Z’ + XYZ + XYZ’

44. Simplify the Boolean function by using tabulation method

F(a,b,c,d)=Σm(0,1,2,5,6,7,8,9,10,14)
45. Simplify the following Boolean function in POS form using K-map

F(A,B,C,D) = Σ(1,2,4,5,9,12,13,14)
46. Simplify the following Boolean function using Tabulation method

Y(A,B,C,D) = Σ(1,3,5,8,9,11,15)
47.b) Write the given Boolean expression f = A+B in Sum of minterms.

c) SOP of F(x, y, z)=Σ(2, 3, 6, 7).

d) Implement OR gate using only two input NAND gates

e) Implement the following Boolean equation using only NAND gates Y=AB+CDE+F.

UNIT –II
 COMBINATIONAL LOGIC CIRCUITS

1. Define combinational logic.

2. Explain the design procedure for combinational circuits
3. Define Half adder and full adder

4. What is Decoder?

5. Define Encoder?
6. Construct 2:1 multiplexer?
7. Define subtractor?
8. Difference between encoder and decoder
9. Define de-multiplexer?
10. Explain Applications of Multiplexer
11. Define priority encoder?
10 MARKS QUESTIONS

Implement BCD to 7-segment decoder for cathode type using 4:16 decoder?

Implement the following Boolean function using 8:1 multiplexer

F(A, B, C, D) = A’BD’ + ACD + A’C’ D +B’CD

Explain about Full Adder?

Explain about 2-bit Magnitude Comparator?

Explain Full binary subtractor in detail?

Design the combinational circuit binary to gray code?

Explain about Binary Multiplier ?

Implement the following Boolean function using 8:1 multiplexer

F(A,B,C.D) = Σ𝑚 (0,1,2,5,7,8,9,14,15)
Explain about Decimal Adder?

Design a 4 bit adder-subtractor circuit and explain the operation in

detail

Explain the functionality of a Multiplexer?

Explain The Half adder? Implement the full adder using two half
adders

Design a 4 bit binary parallel subtractor and the explain operation

in detail?

Design the combinational circuit of 4 Bit Parallel Adder?

Design & implement a 4-bit Binary-To-Gray code converter.

Design a 4 bit binary-to-BCD code converter

Design & implement BCD to Excess-3 code converter.

Design 32:1 Mux using two 16:1 Muxs and one 2:1 Mux.

Design & implement Full Adder with truth table.

Design & implement Full Subtractor with truth table.

Explain Carry Look Ahead Adder circuit with the help of logic
diagram

Construct a BCD Adder-circuit.

Implement 4-bit Magnitude Comparator and write down its

design procedure

Design & implement Full Adder using Decoder

Implement a 2-bit Magnitude comparator and write down its design procedure.
What is encoder? Design octal to binary encoder

Implement the following Boolean function using 8:1 multiplexer.

F(A,B,C,D) = A’BD’+ACD+B’CD+A’C’D.

What is multiplexer? Construct 4*1 multiplexer with logic gates and truth table

Design the full adder using half adders

Realize a 2-bit comparator using gates

What is priority encoder? Mention its operation

 UNIT –IV
Synchronous Sequential Logic

2 MARKS QUESTIONS

1. What are the classifications of sequential circuits?

2. What is the operation of D flip-flop?
3. What is flip-flop
4. Define Race Around Condition
5. Difference between latch and flip-flop
6. Define Propagation Delay
7. What is Master Slave Flip-flop
8. Explain Shift Registers
9. What are the applications of Flip-flops
10. What is state diagram

10 MARKS QUESTIONS
1. A) Explain the Logic diagram of JK flip-flop?
B) Write difference between Combinational & Sequential circuits?
2. A) Explain the Logic diagram of SR flip-flop?
B) Design and draw the 3 bit up-down synchronous counter?
3. A) Draw and explain the operation of D Flip-Flop?
B) Explain about Shift Registers?
4. A) Draw and explain the operation of SR LATCH?
B) Explain about Ring counter?
5. A) Explain about ripple counter?
B) What is state assignment? Explain with a suitable example?
6. Explain the working of the following
i) J-K flip-flop ii) S- R flip-flop iii) D flip-flop
7. Explain the design of a 4 bit binary counter with parallel load in detail?
8. How does it set eliminate is a Master –slave J-K flip-flop?
9. A) Explain synchronous and ripple counters compare their merits and demerits?
B) Design a 4 bit binary synchronous counters with D-flip flop?
10. a)Write the truth table of clocked T- Flip Flop?
b) Define shift registers?
c) Write the differences between latches and flip flops?
d) Write the differences between synchronous and asynchronous counters?
e) Define Flip-flop and various types of flip flops?
 UNIT –IV
SYNCHRONOUS SEQUENTIAL LOGIC
1. a) Design D Flip Flop by using SR Flip Flop and draw the timing diagram.
b) Write the differences between combinational and sequential circuits.
2. a) Draw the logic symbol, characteristics table and derive characteristics equation of JK
flip flop.
b) Design T Flip Flop by using JK Flip Flop and draw the timing diagram.
3. a) Draw the circuit of JK flip flop using NAND gates and explain its operation.
.
4. a) Convert S-R flip flop into JK-flip flop. Draw and explain the logic diagram.
b) A clocked sequential circuit with single input x and single output z produces an output z=1
whenever the input x compares the sequence 1011 and overlapping is allowed. Obtain the
state diagram, state table and design the circuit with D flip-flops.
5. A sequential circuit with two D-flip flops A and B, two inputs ‘x’ and ‘y’ and one output ‘z’ is
specified by the following next state and output equation.
A(t+1) = x’y+xA, B(t+1) = x’B+xA and Z = B
i) Draw the logic diagram of the circuit.
ii) List the state table and draw the corresponding state diagram
6. Design and implement 3-bit ripple counter using J-K flip flop. Draw the state diagram, logic
diagram and timing diagram for the same.
7. With a neat sketch explain MOD 6 Johnson counter using D FF.
8. Implement 6-bit ring counter using suitable shift register. Briefly describe its operation.

9. Design a binary counter having repeated binary sequence using JK flip flops: 0, 1, 2,4,5,6.

10. a) Differentiate a Latch with a Flip flop.

b) List asynchronous inputs of a sequential device
c) Draw the block diagram of sequential circuit using combinational circuit and memory unit.

d) Draw the logic circuit of flip-flop and truth table using NOR gates.
e) Give the comparison between combinational circuits and sequential circuits.

UNIT –V
Memory and Programmable Logic , Digital Logic Circuits

2 MARKS QUESTIONS
 4. List the major differences between PLA and PAL
5. Define PLA
6.

10 MARKS QUESTIONS
1. A) Write difference between PROM ,PLA &PAL?
2.
3. Implement the following function using PLA
A(x,y,z)=∑m(1,2,4,6) B(x,y,z)=∑m(0,1,6,7) C(x,y,z)=∑m(2,6)
4. Design PAL for a combinational circuit that squares a 3 bit number?
5. Construct the PROM using the conversion from BCD code to Excess-3 code?

6. A)Explain about TTL family ?

B) Explain about memory decoding error detection and correction?

7. a)Write the difference between PLA & PAL?
b) Define fan out of a logic gate?
c) What is the function of EAROM?
d) Define CMOS?
e) Write a short notes on Programmable array Logic?
UNIT –V
FINITE STATE MACHINES & PROGRAMMABLE MEMORIES

1. Implement the following Boolean function using PLA

(i)F(w,x,y,z) = Σm(0,1,3,5,9,13) (ii)F(w,x,y,z) ) = Σm(0,2,4,5,7,9,11,15)
2. Implement the following Boolean function usingPAL.
(i)A(w,x,y,z) = Σm(0,2,6,7,8,9,12,13) (ii)B(w,x,y,z) ) = Σm(0,2,6,7,8,9,12,13,14)
(iii)C(w,x,y,z) = Σm(1,3,4,6,10,12,13) (iv)D(w,x,y,z) ) = Σm(1,3,4,6,9,12,14)
3. Implement the following Boolean function usingPLA
(i)F1= Σm(0,1,2,3,8,10,12,14) (ii)F2 = Σm(0,1,2,3,4,6,8,10,12,14).
4. Implement PLA circuit for the following functions F1(A,B,C)= Σm(3,5,6,7),
F2(A,B,C)= Σm(0,2,4,7).

5. Discuss Mealy & Moore Machine models of sequential machines.

6. Explain the minimization procedure for determining the set of equivalent state of a
specified machine M.
7. Explain the following related to sequential circuits with suitable examples.
a)State diagram
b) State table
c) State assignment
8. a
9. Given the 8-bit data word 01011011,generate the 12-bit composite word for the hamming
code that corrects and detects single errors.
10. Give the logic implementation of a 32x4 bit ROM using a decoder of a suitable figure.