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COA-Unit - IV

The document outlines the course outcomes for a Computer Organization and Architecture class, detailing key topics such as memory hierarchy, types of memory (RAM and ROM), and cache memory. It explains the differences between static and dynamic RAM, as well as various types of ROM, while also discussing memory organization and mapping techniques. Additionally, it includes practical questions regarding memory chip requirements and configurations for different capacities.

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0% found this document useful (0 votes)
24 views66 pages

COA-Unit - IV

The document outlines the course outcomes for a Computer Organization and Architecture class, detailing key topics such as memory hierarchy, types of memory (RAM and ROM), and cache memory. It explains the differences between static and dynamic RAM, as well as various types of ROM, while also discussing memory organization and mapping techniques. Additionally, it includes practical questions regarding memory chip requirements and configurations for different capacities.

Uploaded by

Kartik Sharma
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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RAJ KUMAR GOEL INSTITUTE OF

TECHNOLOGY , Ghaziabad
Computer Organization And Architecture
BCS-302

Unit: IV

COA

Dr. Vinish Kumar


B Tech :3th Sem Professor
CSE(AI&ML)
Course Outcomes
Course outcome: After completion of this course students will be able
to:

Study of the basic structure and operation of a


CO 1 K1, K2
digital computer system.
Analysis of the design of arithmetic & logic unit
CO 2 and understanding of the fixed point and floating- K2, K4
point arithmetic operations.
Implementation of control unit techniques and the
CO 3 K3
concept of Pipelining
Understanding the hierarchical memory
CO 4 K2
system, cache memories and virtual memory
Understanding the different ways of
CO 5 communicating with I/O devices and standard I/O K2, K4
interfaces
CO 4

Understanding the hierarchical memory system,


cache memories and virtual memory
Memory Hierarchy
Memory refers to any storage medium used for storing information.
Since there are many different kinds of storage media , we can
categorize them according to the Memory Speed, Storage Capacity .

Memory Hierarchy consists of total memory system of any


computer. The memory components ranges from higher capacity slow
auxiliary memory to a relatively fast main memory, to cache memory
that can be accessible to the high-speed processing logic.
Memory Hierarchy

Smaller, L0:
faster, registers CPU registers hold words retrieved from L1
and cache
costlier L1: on-chip L1
(per byte) cache (SRAM) L1 cache holds cache lines retrieved from
storage the L2 cache memory
devices L2: off-chip L2
cache (SRAM) L2 cache holds cache lines retrieved
from main memory

L3: Main memory


Larger, (DRAM)
Main memory holds disk
slower, blocks retrieved from local
and disks
cheaper Local secondary storage
L4:
(per byte) (local disks)
storage Local disks hold files retrieved
from disks on remote network
devices
servers

L5: Remote secondary storage


(distributed file systems, Web servers)
Memory Hierarchy
Memory Hierarchy
Memory Type
Cache Main Secondary Archival

Technology TTL MOS Magnetic Paper

Speed 10^1 ns 10^2 ns 10^3 ns 10^5 ns


(access time)

Size Small,< 8K Medium, Large, Very large,


(capacity) 64K-8M 300K-1G 

Usage Processor, On-line, Dynamic, On-line, Archival, Off-line,


Data Buffer Temporary Storage Bulk storage permanent storage

Representative TTL Semiconductor Floppy disk, Paper


Example memories Memories Hard disk,tape
MAIN-MEMORY
MAIN-MEMORY :The memory unit that communicates directly with the CPU is called main
memory. It is relatively large and fast memory basically used to store programs and data during
computer operation.
The main memory can be classified into two categories as follows :
1.RAM
•It is read and write memory. User can write information into RAM and can read information
from it.
•It possesses random access property, i.e. any memory location can be accessed in a random
manner without going through any other memory location. The access search time for each
memory location is same.
•It is volatile in nature i.e. it is volatile memory. The information written in it is retained as long
as the power supply is on. As soon as the power supply goes off its stored information’s are lost.
•There are two types of RAM
(i) static RAM
(ii) dynamic RAM
SRAM : The static RAM consists of internal flip-flops that stores the binary information. The
stored information is there as long as the power supply is on.
DRAM : The dynamics RAM stores information in form of electric charges that are applied to
capacitors. The capacitors are provided inside the RAM chip by MOS transistors. The stored
charge on the capacitors are tends to discharge with time and hence the capacitors must be
periodically refreshed by refreshing dynamic memory.
MAIN-MEMORY
The difference between SRAM and DRAM are as follows:
SRAM DRAM
It stores information as long as the power is
It stores information as long as the
supplied or a few milliseconds when power is
power is supplied.
switched off.
Transistors are used to store
Capacitors are used to store data in DRAM.
information in SRAM.
To store information for a longer time, contents
Capacitors are not used hence no
of the capacitor needs to be refreshed
refreshing is required.
periodically.
SRAM is faster needcompared to
DRAM provides slow access speeds.
DRAM.

These are expensive. These are cheaper.

SRAMs are low-density devices. DRAMs are high-density devices.

These are used in cache memories. These are used in main memories.

Consumes less power and generates


Uses more power and generates more heat.
less heat.
MAIN-MEMORY
2.ROM
•ROM stands for read only memory.
•It is non-volatile i.e. information stored in it is not lost even if the power supply is
goes-off.
•Its used for permanently storage of information.
•It possesses random-access property.
•The stored information can only be read from ROM at the time of operation and
nothing can be written into ROM by user/programmer, i.e. it is not accessible to user.
•The contents of ROM are decided by the manufacturer and are permanently store in
ROM at the time of manufacture.
Different type of ROMs are
• Programmable ROM, where the data is written after the memory chip has been
created. It is non-volatile.
• Erasable Programmable ROM, where the data on this non-volatile memory chip
can be erased by exposing it to high-intensity UV light.
• Electrically Erasable Programmable ROM, where the data on this non-volatile
memory chip can be electrically erased using field electron emission.
• Mask ROM, in which the data is written during the manufacturing of the memory
chip.
MAIN-MEMORY
Difference RAM ROM
RAM is a volatile memory which ROM is a non-volatile memory which
Data retention could store the data as long as the could retain the data even when power
power is supplied. is turned off.
Data stored in RAM can be retrieved
Working type Data stored in ROM can only be read.
and altered.
Used to store the data that has to be
It stores the instructions required during
Use currently processed by CPU
bootstrap of the computer.
temporarily.
Speed It is a high-speed memory. It is much slower than the RAM.
The CPU can access the data stored The CPU can not access the data stored
CPU Interaction
on it. on it unless the data is stored in RAM.
Size and Capacity Small size with less capacity. Large size with higher capacity.

Used as/in CPU Cache, Primary memory. Firmware, Micro-controllers


The data stored is not as easily
Accessibility The data stored is easily accessible
accessible as in RAM
Cost Costlier cheaper than RAM.
A RAM chip can store only a few A ROM chip can store multiple
Storage
megabytes of data. gigabytes (GB) of data.
RAM & ROM Chip Organization
Memory Address Map

The table, called a memory address map, is a pictorial representation


of assigned address space for each chip in the system.

The interconnection between memory, and processor is established


from the knowledge of size of memory required and type of RAM and
ROM chip is available. RAM and ROM chips available in a variety of
sizes.

Suppose, a computer system needs 512 bytes of RAM and 512 bytes
of ROM. The capacity of RAM chip is 128 × 8 and that of ROM is
512 × 8. Hence, the number of RAM chips required will be
a. How many 128 x 8 RAM chips are needed to provide a memory capacity of
2048 bytes?
b. How many lines of the address bus must be used to access 2048 bytes of
memory? How many of these tines will be common to all chips?
c. How many lines must be decoded for chip selection? Specify the size of
decoders.

Q. A computer uses RAM chips or 1024 x I capacity.


a. How many chips are needed, and how should their address tines be
connected to
provide a memory capacity of 1024 bytes?
b. How many chips are needed to provide a memory capacity or 16K bytes?
Explain In words how the chips are be connected to the address bus.

Q. A ROM chip of 1024 x 8 bits has four select inputs and operates from a 5
volt
power supply. How many pins are needed for the IC package? Draw a block
diagram and label all input and output terminals in the ROM.
a. How many 128 x 8 RAM chips are needed to provide a memory capacity of
2048 bytes?
b. How many lines of the address bus must be used to access 2048 bytes of
memory? How many of these tines will be common to all chips?
c. How many lines must be decoded for chip selection? Specify the size of
decoders.
Q. A computer uses RAM chips or 1024 x 1 capacity.
a. How many chips are needed, and how should their address tines be
connected to provide a memory capacity of 1024 bytes?
b. How many chips are needed to provide a memory capacity or 16K bytes?
Explain In words how the chips are be connected to the address bus.
Q. A ROM chip of 1024 x 8 bits has four select inputs and operates from a 5
volt power supply. How many pins are needed for the IC package? Draw a
block diagram and label all input and output terminals in the ROM.
Q. A computer system needs 4096 bytes of RAM and 4096 bytes of ROM. The
capacity of RAM chip is 128 × 8 and that of ROM is 512 × 8.
a. How many RAM and ROM chips are needed?
b. Draw a memory-address map for the system.
c. Indicate what size decoders are needed..
Q. A computer employs RAM chips of 256 x 8 and ROM chips of 1024 x 8. The
computer system needs 2K bytes of RAM, 4K bytes of ROM, and four interface
units, each with four registers. A memory-mapped 1/0 configuration is used. The
two highest-order bits of the address bus are assigned 00 for RAM, 01 for ROM,
and 10 for interface registers.
a. How many RAM and ROM chips are needed?
b. Draw a memory-address map for the system.
c. Give the address range in hexadecimal for RAM, ROM, and interface.
2D and 2.5D Memory organization
Internal structure of Memory either RAM or ROM is made of memory cells
which contains a memory bit. Basically group of 8 bits makes a word. Now the
memory is formed in multidimensional array of rows and columns. In which
each cell stores a bit and a complete row contains a word. A memory simply
can be divided in this below form.
2n = N where, n is the no. of address lines and N is the total memory in bytes.
there will be 2n words.
2D Memory organization –
Basically in 2D organization memory is divides in the form of rows and
columns. Each row contains a word now in this memory organization there is a
decoder. A decoder is a combinational circuit which contains n input lines and
2n output lines. One of the output line will select the row which address is
contained in the MAR. And the word which is represented by the row that will
get selected and either read or write through the data lines.
2D and 2.5D Memory organization
2D-Memory System
2D and 2.5D Memory organization
2.5D Memory organization – In 2.5D Organization the scenario
is the same but we have two different decoders one is a column
decoder and another is a row decoder. Column decoder is used to
select the column and a row decoder is used to select the row. The
address from the MAR goes as the decoders’ input. Decoders will
select the respective cell through the bit outline, then the data
from that location will be read or through the bit, inline data will
be written at that memory location.
2D and 2.5D Memory organization
2D and 2.5D Memory organization

Comparison between 2D & 2.5D Organizations –


1.In 2D organization hardware is fixed but in 2.5D hardware changes.
2.2D Organization requires more gates while 2.5D requires less.
3.2D is more complex in comparison to the 2.5D organization.
4.Error correction is not possible in the 2D organization but in 2.5D it could be done
easily.
5.2D is more difficult to fabricate in comparison to the 2.5D organization.
2D and 2.5D Memory organization

Comparison between 2D & 2.5D Organizations –


•In 2D organization hardware is fixed but in 2.5D hardware
changes.
•2D Organization requires more gates while 2.5D requires less.
•2D is more complex in comparison to the 2.5D organization.
•Error correction is not possible in the 2D organization but in
2.5D it could be done easily.
•2D is more difficult to fabricate in comparison to the 2.5D
organization
INTRODUCTION
Cache: A small but fast memory, in which the contents of
the most commonly accessed locations are maintained,
can be placed between the CPU and the main memory.
When a program executes, the cache memory is searched
first.
Why is cache memory fast?
• Faster electronics used
• A cache memory has fewer locations than a main
memory, which reduces the access time
• The cache is placed both physically closer and logically
closer the CPU than the main memory
• This cache less computer usually needs a few bus cycles
to synchronize the CPU with the bus.
• Searching Techniques.
Memory Hierarchy
Cache Mapping
Cache Main Memory
The cache and Main Memory are divided into parts called :-
Block Frames Blocks

Bi for i= 0,1,2…….m Bj for j=0,1,2,…..n

m=2r n=2s
Each Block/Block Frame is assumed to have b words b=2 w

Therefore Cache has m.b=2r+w Main Memory has n.b=2s+w

{ Bi} {Bj}
In a k –way associative cache ,the m block frames are divided into
v=m/k (2d=V) sets with k blocks per set.
Cache Mapping
Commonly used methods:
1. Direct-Mapped Cache
2. Associative Mapped Cache
3. Set-Associative Mapped Cache
Cache Mapping
1.Direct-Mapped Cache: In this mapping a block is mapped to a block frame
using the below modulo-m function
Bj Bi if i=j(modulo m)

Advantage: It is the simplest cache Organization


Disadvantage: This mapping is very Rigid
Direct Mapping Cache Organization
Direct Mapping Cache Organization
The memory address is divided into three fields:
The lower w bits specify the word offset within each block.
The uppers bits specify the block address in main memory,
The leftmost (s — r) bits specify the tag to be matched.
The block field (r bits) is used to implement the (modulo-m) placement,
where m = 2r. Once the block Bj is uniquely identified by this field, the tag
associated with the addressed block is compared with the tag in the memory
address.
A cache hit occurs when the two tags match. Otherwise a cache miss
occurs. In case of a cache hit, the word offset is used to identify the desired
data word within the address block.
When a miss occurs, the entire memory address (s + w bits) is used to
access the main memory. The first s bits locate the addressed block, and the
lower w bits locate the word within the block.
Fully Associative Cache Mapping
1.Fully Associative Cache: In this mapping a block from main memory can be
placed in any one of the available block frames
Advantage: Allow the implementation of better replacement policy .
Disadvantage: Hardware coast increases.
Fully Associative Cache Organization
Set Associative Cache Mapping
1. Set Associative Cache: In this mapping a block is mapped to a block frame
in a set using the below modulo-m function
Bj Bi ε Si if j(modulo v)=i
Advantage: More economic with comparison to fully associative cache.
Easier to implement.
Set Associative Cache Organization
Cache Performance
The performance of cache memory is frequently measured
in terms of a quantity called hit ratio. When the CPU
refers to memory and finds the word in the cache, it is
said to produce a hit. If the word is not found in the
cache, it is in main memory and it counts as a miss.
Hit ratio = Number of hits
Number of hits + Number of miss.
Let t is cache-access time(TLB)
H is the hit ratio
T is the main memory access time.
Then, the
Average Access Time = H*(T + t) + (1-H) * (2*T + t)
The hit ratio h always lies in the closed interval of 0 and 1.
Cache Performance
Topic objective: To compute the effective memory access time of
cache memory.
TLB Hit ratio=0.9
RAM access time T=100 ns and TLB access time t=20 ns
Effective access time without TLB= 2T= 200 ns
Effective access time with TLB
=H*(T + t) + (1-H) * (2*T + t)
=0.9*(100+20) + (1-0.9)*(2*100+20)
=0.9*120+0.1*220=108+22= 130 ns
Reduction in effective access time=(200-130)*100/200=35%
Virtual Memory
VIRTUAL MEMORY
Virtual memory is a technique that allows the execution of
processes that may not be completely in memory.
The main advantage of this scheme is that programs can be larger
than the physical memory. Portions of the program or data are
brought into main memory when they are required by the CPU.
Virtual memory is the separation of the user logical memory from
physical memory. This separation allows an extremely large virtual
memory to be provided for programmers when only a smaller
physical memory is available.
Virtual memory makes the task of programming easy, because the
programmer no longer needs to worry about the amount of
physical memory available. It gives an illusion to the programmers
that they have a very large memory at their end, even though the
computer actually has small main memory.
Virtual Memory
An address generated by user program is called Virtual address and
the set of virtual addresses make the virtual address space.
A main memory address is called Physical address and set of such
locations are called memory space or Physical address space.
However, in a system that uses a virtual memory, the size of virtual
address space is usually longer than the available physical address
space.

Memory Table for Mapping a Virtual Address.


Address mapping can be further simplified if the information in
address space and memory space can be divided into groups of equal
size.
The address space is broken into groups of equal size known as page
and the memory space is broken into groups of same size known as
blocks. The size of a Block is always equal to a page.
Virtual Memory
Memory table for mapping a virtual address.
Virtual Memory
Consider a computer with an address space of 8K and a memory space of 4K. If we
split each into groups of 1K words we obtain eight pages and four blocks as shown
in Fig. below . At any given time, up to four pages of address space may reside in
main memory in any one of the four blocks.
Virtual Memory
Virtual Memory
Q: A virtual memory has a page size of 1K words. There are eight pages and four
blocks. The associative memory page table contains the following entries:
Page Block
0 3
1 1
4 2
6 0
Make a list of a virtual addresses (In decimal) that will cause a page fault if
used by the CPU.
Sol: The pages that are not in main memory are:
Page Address Address that will cause fault
2 2K 2048 − 3071
3 3K 3072 − 4095
5 5K 5120 − 6143
7 7K 7168 − 8191
Page Replacement
• When a program starts execution, one or more pages are transferred into
main memory and the page table is set to indicate their position. The
program is executed from main memory until it attempts to reference a
page that is still in auxiliary memory. This condition is called page fault.
• When a page fault occurs in a virtual memory system, it signifies that the
page referenced by the CPU is not in main memory. A new page is then
transferred from auxiliary memory to main memory. If main memory is
full, it would be necessary to remove a page from a memory block to make
room for the new page. The policy for choosing pages to remove is
determined from the replacement algorithm that is used. The goal of a
replacement policy is to try to remove the page least likely to be
referenced in the immediate future.
• Two of the most common replacement algorithms used are
1. First-in, first-out (FIFO)
2. Least recently used (LRU).
Virtual Memory
1. First-in, first-out (FIFO) :-The FIFO algorithm
selects for replacement the page that has been in
memory the longest time. Each time a page is loaded
into memory, its identification number is pushed
into a FIFO stack. FIFO will be full whenever
memory has no more empty blocks. When a new
page must be loaded, the page least recently brought
in is removed. The page to be removed is easily
determined because its identification number is at
the top of the FIFO stack.
Advantage:-Being easy to implement.
Disadvantage:- that under certain circumstances
pages are removed and loaded from memory too
frequently.
Virtual Memory
2. Least recently used (LRU):-In this we replace the page
that is not used from the longest time. The LRU
algorithm can be implemented by associating a counter
with every page that is in main memory. When a page is
referenced, its associated counter is set to zero. At fixed
intervals of time, the counters associated with all pages
presently in memory are incremented by 1. The least
recently used page is the page with the highest count.
The counters are often called aging registers, as their
count indicates their age, that is, how long ago their
associated pages have been referenced.
Advantage:-has been more attractive on the assumption
that the least recently used page is a better candidate for
removal than the least recently loaded page as in FIFO.
Disadvantage:- more difficult to implement
Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1
First-In-First-Out (FIFO) Algorithm

Least Recently Used (LRU) Algorithm

57
Q A virtual memory system has an address space of 8K words, a memory space
of 4K words, and page and block size of IK words . The following page
reference changes occur during given time interval. (Only page changes are
listed. If the same page Is referenced again, it is not listed twice)
420126140102357
Determine the four pages that are resident In main memory after each page
reference change if the replacement algorithm used is
(a) FIFO
(b) LRU.
Q A virtual memory system has an address space of 8K words, a memory space
of 4K words, and page and block size of IK words . The following page reference
changes occur during given time interval. (Only page changes are listed. If
the same page Is referenced again, it is not listed twice)
1 6 4 5 1 4 3 2 1 2 1 4 6 7 4
Determine the four pages that are resident In main memory after each page
reference change if the replacement algorithm used is
(a) FIFO :
(b) LRU.
AUXILIARY MEMORY
• AUXILIARY MEMORY : The storage devices that provide backup
storage is called auxiliary memory.
• Magnetic Disk: Magnetic disk are circular metal plate coated
with magnetized material on both sides. Several disks are stacked
to a spindle one below the other with read/ write head to make a
disk pack. The disk drive consists of a motor and all disks rotate
together at very high speed. Information’s are stored on the
surface of a disk along concentric set of rings called tracks. These
tracks are divided into sections called sector. A set of
corresponding tracks in all surfaces of a disk pack is called
cylinder. Thus, if a disk pack has n plates, there are 2n surfaces;
hence the number of tracks per cylinder is 2n. The minimum
quantity of information which can be stored is a sector. If the
number of bytes to be stored in sector is less than the capacity of
sector, the rest of sector is padded with the last type recorded.
AUXILIARY MEMORY
Let s bytes are stored per sector, p sectors are there per track, t tracks per
surface and m surfaces. Then, the capacity of disk will be defined as
Capacity = m × t × p × s bytes
If d is the diameter of the disk, the density of recording is :
Density =(p*s)/(π*d) bytes/inch
A set of disk drives are connected to a disk controller. The disk controller
accepts commands and positions the read-write heads for reading or
writing. When the read-write command is received by disk controller,
the controller first positions the arm so that the read-write head
reaches the appropriate cylinder.
The time taken to reach the appropriate cylinder is known as Seek time
(Ts). The maximum seek time is the time taken by the head to reach
the innermost cylinder from the outermost cylinder or vice-versa. The
minimum seek time will be 0 if the head is already positioned on the
appropriate cylinder. Once, the head is positioned on the cylinder there
is further delay because the read-write head has to be positioned on the
appropriate sector. This is rotational delay also known as Latency time
(T1). The average rotational delay equals half the time taken by the
disk to complete one notation.
AUXILIARY MEMORY
. Floppy Disc
Floppy disc also known as diskette is a very convenient bulk storage device and
can be taken out of the computer. It can be either 5.25" or 3.5" size, the 3.5"
size being more common. It is contained in a rigid plastic case. The read/write
heads of the disc drive can write or read information from both sides of the
disc. The storage of data is in magnetic form, similar to that in hard disc. The
3.5" floppy disc has storage up to 1.44 Mbytes. It has a hole in the centre for
mounting it on the drive. Data on the floppy disc is organized during
formatting process. The disc is organized into sectors and tracks. The 3.5" high
density disc has 80 concentric circles called tracks and each track is divided
into 18 sectors. Tracks and circles exist on both sides of the disc. Each sector
can hold 512 bytes of data plus other information like address etc. It is a cheap
read/write bulk storage device.
The speed of the disk is indicated by nx, where n is an integer indicating the factor by
which the original nominal speed of 150 KB/S is multiplied. Thus,
a 52x CD-ROM disk speed will be 52 × 150 = 7800 KB/S. CD-ROM has a buffer size of
256 Kilobytes to keep data temporarily. It is connected to the computer system by small
computer system interface (SCSI) adapter.
AUXILIARY MEMORY
Floppy Disc
The main advantages of CD-ROMs are :
(i) Large data/information storage capacity.
(ii) Mass replication is inexpensive and fast.
(iii) These are removable disks.
Disadvantages of CD-ROMs are :
(i) It is read-only and hence cannot be up dated.
(ii) Access time is longer than that of a magnetic disk.
Erasable Optical Disk
Recent development in optical disks is the erasable optical disk. They are used as an
alternative to standard magnetic disk when speed of the access is not important and
the volume of the data stored is large. They can be used for image, multimedia,
back-up a high-volume, low-activity storage. The date in these disks can be
changed repeatedly same as that of magnetic disk. The erasable optical disks are
portable and are highly reliable and have longer life. They uses format that makes
semi-random access feasible
AUXILIARY MEMORY

5.8.3. Magnetic Tapes


Almost all computer system uses magnetic disk as permanent storage, but tape is still very popular
form of low-cost magnetic storage media and is used primarily for back-up storage purposes. The
standard backup tape device today is digital audio tape (DAT). These tapes provide approximately
1.2 G bytes of storage on a standard cartridge-size cassette tape. These magnetic tapes memories
are similar to that of audio-tape recorders.
A magnetic-tape drive consists of two spools on which the tape is wounded. Between the two spools,
there is a set of nine magnetic heeds to write and read information on the tape. The nine heads
operates independently and records information on nine parallel tracks, parallel to the edge of the
tape. Eight tracks an used to record a byte of data and the ninth track is used to record a parity bit
for each byte. The standard width of the tape is half an inch. The number of bits per inch (bpi) is
known as recording density.
Normally, when a data is recorded into the tape, a block of data is recorded and then a gap is left and
then another block is recorded and so on. This gap is known as inter-block gap (IBG). The blocks
are normally 10 times long as that of IBG. The beginning of the tape (BOT) is indicated by a metal
foil known a marker and the end of tape (EOT) is also indicate by a metal foil known as end of tape
marker.
The data on the tape are arranged as blocks and cannot be addressed. They can only retrieve
sequentially in the same order in which they are written. Thus, if a desired record is at the end of
the tape, earlier records have to be read before it is reached and hence the access time is very high
compared to that of magnetic disks.
AUXILIARY MEMORY
5.8.4. Optical Disks
Optical disk storage technology provides the advantage of high volume, economical storage
with somewhat slower access times than traditional magnetic disk storage.
CD-ROM
Compact disk-read only memory (CD-ROM) optical drives are used for storage of information
that is distributed for read-only use. A single CD-ROM can holds up to 800 MB of information.
Software and large reports distributed to a large number of users are good candidate for this
media. CD-ROM is also more reliable for distribution than floppy disks or tapes. Now days
almost all software and documentations are distributed only on CD-ROM.
In CD-ROMs the information is stored evenly across the disk in segments of the same size.
Therefore, in CD-ROMs data stored on a track increases as we go towards outer surface of
disk, and hence, the CD-ROMs are rotated at variable speeds for the reading process.
Information in CD-ROM is written by creating pits on the disk surface by shining a laser beam.
As the disk rotates the laser beam traces out a continuous spiral. When 1 is to written on the
disk, circular pit of around 0.8 micrometer diameter is created by the sharply focused beam
and no pit is created if a zero is to be written. The pre-recorded information on CD-ROM is
read with the help of a CD-ROM reader which uses a laser beam for reading. For this, the CD-
ROM disk is inserted into a slot of CD drive. Then the disk is rotated by a motor.
A laser head moves in and out to the specified position. As the disk rotates the head sense
pits and land, which is converted to 1’s and 0’s by the electronic interface and sent to the
computer.

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