ISSN (Online) : 2319 - 8753

ISSN (Print) : 2347 - 6710

International Journal of Innovative Research in Science, Engineering and Technology

Volume 3, Special Issue 3, March 2014

2014 International Conference on Innovations in Engineering and Technology (ICIET’14)

On 21st & 22nd March Organized by

K.L.N. College of Engineering, Madurai, Tamil Nadu, India

FPGA Implementation of Digital Modulation

Schemes
S.Rajaram#1, R.Gayathre#2
Department of ECE, Thiagarajar College of Engineering, Madurai, Tamilnadu, India

ABSTRACT— Software Defined Radio (SDR) has been input/output (I/O) elements and hard-embedded
one of the new techniques developed to change the way processors.
the traditional wireless communication system work. This
A literature survey shows that, FPGAs are widely
paper deals with the Field-programmable gate-array
used in different applications, such as motor controllers
(FPGA) implementation of Digital Modulator such as
[1], neural network implementations [2-4], finite-impulse-
Quadrature amplitude modulation (QAM), Binary
response (FIR) filter realization [5,6], fuzzy-logic
amplitude-shift keying (BASK), Binary frequency shift
controllers [7], etc. Implementation of digital modulation
keying (BFSK) and Binary phase-shift keying (BPSK).
and demodulation using FPGAs has received considerable
Since digital modulation is more secure and more efficient
attention. Signal-processing systems such as software-
in long-distance transmission and noise detection and
defined radios (SDRs) can receive various kinds of
correction than its analog counterpart, it has an important
modulated signals via software programming using digital
place in modern communications. They employ the
signal processors (DSPs), FPGAs, general purpose
minimum number of blocks necessary for achieving the
processors (GPPs), and application specific integrated
modulation. The input carrier signal and message signal
circuits (ASICs) [8,9]. In this context, FPGAs are the
are generated using CO-ordinate Rotation Digital
solution, due to their high flexibility and high speed [9].
Computer (CORDIC) algorithm. These digital modulators
were developed and compiled to a Very high speed
Since digital modulation is more secure and more
integrated circuit Hardware Description Language
efficient in long-distance transmission. Moreover noise
(VHDL) net list, and were later implemented individually
detection/correction is easier than analog, hence it has an
into Spartan 3 FPGA board.
important place in modern communications. A digital
receiver for software-defined radios based on QAM
KEYWORDS— Software Defined Radio (SDR); Field-
techniques [10,11]; and BASK, BPSK, and BFSK [14,15]
programmable gate-array (FPGA); Quadrature amplitude
digital modulators to be used in communications systems
modulation (QAM); Binary amplitude-shift keying
[12,13]. All of these papers have in common the design
(BASK); Binary frequency shift keying (BFSK) ; Binary
of models in the MATLAB environment, Verilog HDL or
phase-shift keying (BPSK) ; CO-ordinate Rotation Digital
VHDL and implementations using FPGAs.
Computer (CORDIC)
I. INTRODUCTION The objective of this paper is to implement a fully
digital QAM, BASK, BFSK, and BPSK modulators that
Field-programmable gate arrays (FPGAs) are
employ the minimum number of digital blocks suitable
semiconductor device that contains programmable logic
for software-defined radio systems and are implemented
elements (LEs) and reconfigurable interconnects to realize
individually into the Spartan 3 FPGAs. The input carrier
any complex combinational or sequential logic functions.
signal and message signal are generated using COordinate
Hardware implemented in an FPGA can be reconfigured
Rotation DIgital Computer (CORDIC) algorithm, for
by programming the logic elements and interconnections
more scalability or flexibility.
for specific applications, even after the installation of the
The paper is organized as follows. Section II, explains
the theory of the QAM, BASK, BFSK, and BPSK
modulations. Section III, explains the generation of input
product. Today’s FPGAs has static random-access signal using CORDIC algorithm. Section IV deals with
memories (SRAMs), high-speed transceivers, high-speed results and discussions and finally section V concludes
this paper.

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14 1526

 FPGA implementation of Digital Modulation Schemes

output is a band limited signal, ready for transmission by

II. THEORY of the DIGITAL MODULATIONS a power amplifier. BASK signal can be expressed as

A. Quadrature Amplitude Modulation

S BASK (t )  m(t ) A sin(2f c t   0 ),0  t  T (3)
Quadrature amplitude modulation (QAM) is a
modulation scheme in which two sinusoidal carrier Where m(t ) = 0 or 1 (the binary message), T is the bit
signals, one exactly 90 degrees out of phase with respect duration, and A, f c , and  0 are the amplitude,
to the other, are used to transmit data over a physical
frequency, and phase of the sinusoidal carrier signal. The
channel. Because the orthogonal carrier signal occupy the
modulated signal has a power P  A
2
same frequency band and differ by a 90 degree phase 2 for both the
shift, each can be modulated independently and states.
transmitted over the same frequency band. Finally it is
separated by demodulation at the receiver. For a given
bandwidth, QAM transmits data at twice the rate of
standard pulse amplitude modulation (PAM) without any
degradation in the bit error rate (BER). QAM and its
derivatives are used in both mobile radio and satellite
communication. These two carrier waves represent the in-
phase (I) and Quadrature-phase (Q) components of our
signal. These signals can be represented as

I  A cos( ) and Q  A sin( ) (1)

Fig. 2 A block diagram of BASK modulation.

A QAM signal can be expressed as
A cos(2fct   )  I cos(2fct)  Q sin(2fct) (2)

l
×
Channel input 1

Cos ωt
+
Fig. 3 The modulating-signal (message) and the BASK
Output
Signal waveforms

C. Binary Frequency-Shift Keying Modulation

× Q

Channel input 2
In a BFSK (binary frequency-shift keying) modulation,
the frequency of the sinusoidal carrier signal is in
Fig. 1 A block diagram of QAM modulation
accordance with the message level (―0‖ or ―1‖) while
keeping the amplitude and phase constant. A block
diagram of the BFSK modulation and its signal
waveforms are shown in Fig 4 and 5 respectively. A
BFSK signal can be expressed as

B. Binary Amplitude-Shift Keying Modulation

In a BASK (binary amplitude-shift keying)

modulation, the amplitude of the sinusoidal carrier signal
S BFSK (t )  A sin2 [ f c  m(t ) f m ]t   0 ,0  t  T (4)
is in accordance with the message level (―0‖ or ―1‖),
while keeping the frequency and phase constant. A block
diagram of the BASK modulation and its signal Where m(t ) = 0 or 1 (the binary message), T is the bit
waveforms are shown in Fig 2 and 3, respectively. Since duration, and A, f c , and  0 are the amplitude,
there are sharp discontinuities at the transition points, the frequency, and phase of the sinusoidal carrier signal. The
resulting BASK signal has an unnecessarily wide
modulated signal has a power P  A
2
bandwidth. The band pass filter shown in Fig 2 removes 2 for both the
the high-frequency components of the BASK signal. The states.

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14 1527

 FPGA implementation of Digital Modulation Schemes

Fig7. The modulating-signal and BPSK signal waveforms

Fig. 4 A block diagram of BFSK modulation III. GENERATION of INPUT SIGNAL USING CORDIC

In this paper CORDIC algorithm is used to design a

digital sine waveform generator. There are plenty of
applications which require digital wave generators.
Wireless and mobile systems are among the fastest
growing application areas; in particular, Software Defined
Radio (SDR) is currently a focus of research and
development. An SDR system allows performing many
functions based on a single hardware platform, thus
highly reconfigurable resources for signal processing are
needed, mainly for modulation of digital signals. Fourth
Fig. 5 The modulating-signal (message) and the BFSK generation (4G) wireless and mobile systems are currently
Signal waveforms the focus of research and development. They will allow
new types of services to be universally available to
consumers and for industrial applications. Broadband
D. Binary Phase-Shift Keying Modulation wireless networks will enable packet based high data rate
communication suitable for video transmission and
In a BPSK (binary phase-shift keying) modulation, the mobile Internet applications.
phase of the sinusoidal carrier signal is in accordance with
the message level (―0‖ or ―1‖) while keeping the A. The CORDIC Algorithm
amplitude and frequency constant. A block diagram of the CORDIC is based on the common rotation equations:
BPSK modulation and its signal waveforms are shown in
x '  x . cos   y . sin   cos  . x  y . tan  
Fig 6 and 7, respectively. A BPSK signal can be
expressed as
y '  y . cos   x . sin   cos  .  y  x . tan   (6)
S BPSK (t )  A sin[2f c t  m(t ) ],0  t  T (5)

Where m(t ) = 0 or 1 (the binary message), T is the bit If tan    2i multiplication in (6) can be performed
,
duration, and A, f c , and  0 are the amplitude, by a simple shift operation. This allows the vector to be
rotated by desired angle in a sequence of smaller rotations
2 for both the by angle i   tan 2 
frequency, and phase of the sinusoidal carrier signal. The
i
modulated signal has a power P  A
2

states.


xi 1  ki xi  yi . . d i . 2 i  (7)
yi 1  k y  x
i i i. . di . 2 i
,
Where,

  
k i  cos tan 1 2 1  1
1  2  2i , d i   1

Fig 6. A block diagram of BPSK modulation

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14 1528

 FPGA implementation of Digital Modulation Schemes

y i 1  y i  xi * d i * 2  i
B. Modes of The CORDIC Algorithm  
z i 1  z i  d i * tan 1 2  i
(10)
Where,
CORDIC rotator works in two modes: rotation and
vectoring   1, zi  0
di  
 1, otherwise
Then:

xn  An x0  y 02
2

yn  0

z n  z 0  tan 1  
y0
 x0 
(11)

An   1  2 2i
n (12)
Fig. 8 The Rotation (X’, Y’) and vectoring (X, Y) modes of the
CORDIC algorithm The CORDIC algorithm in every mode is limited between
 
In the first mode it rotates the input vector by specified  and .
angle. The angle accumulator is initialized with the 2 2
desired rotation angle. For this mode, CORDIC equations
are: This limitation is caused by the first rotation angle
 0  tan 1 2 0 
i
xi 1  xi  y i * d i * 2
y i 1  y i  xi * d i * 2  i
 ,
To achieve simplicity of hardware realization, the idea
z i 1  z i  d i * tan 1 2  i used in CORDIC are to (i) decompose the rotations into a
sequence of elementary rotations through predefined
(8)
angles that could be implemented with minimum
Where,
hardware cost; and (ii) to avoid scaling, that might
  1, zi  0 involve arithmetic operations such as square-root and
di   division. The other idea is based on the fact the scale-
 1, otherwise factor contains only the magnitude information but no
information about the angle of rotation [16].

This gives the following result:

IV RESULTS and DISCUSSIONS
x n  An . x0 cos z 0  y 0 sin z 0 
y n  An .  y 0 cos z 0  x0 sin z 0 
The Digital modulation schemes such as of quadrature
amplitude modulation (QAM), binary amplitude-shift
zn  0 keying (BASK), binary frequency shift keying (BFSK)
(9) and binary phase-shift keying (BPSK) were designed
Where, separately using Xilinx ISE 14.1 tool and its simulated
An   1  2 2i results are shown below.
n

In the vectoring mode input vector is being rotated to the

x axis while recording the angle required to make that
rotation. The result of the vectoring operation is a rotation
angle and the scaled magnitude of original vector. The
CORDIC equations in this mode are:

xi 1  xi  y i * d i * 2  i

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14 1529

 FPGA implementation of Digital Modulation Schemes

Fig. 12 The above figure shows the simulation result of

BPSK, where data_in represents the input signal and
mod_out represents the modulated BPSK output signal.
By varying the phase, the modulated BPSK signal is
obtained.

These modulators which are designed is implemented

separately using Spartan 3 XC3S100E FPGA board.

Fig. 9 The above figure shows the simulation result of

QAM,where Xin,Yin represents the input signal and
X_out & Y_out represents the modulated signal. 0111 is
given as the input and its corresponding output obtained is
-0.49 & -0.86 which is same as that of manual calculation.

Fig. 13 Implementation on Spartan 3 XC3S100E device.

The device Spartan 3 XC3S100E utilization memory

for all the Digital modulators are shown in table which
gives the total resources utilized.

TABLE I
DEVICE UTILIZATION of DIGITAL MODULATORS
Fig. 10 The above figure shows the simulation result of
BASK, where data_in represents the input signal and LOGIC AVAILAB
mod_out represents the modulated BASK output signal. USED UTILIZATION
UTILIZATION LE
10110101010 is given as the input and 11111111110 is
the modulated output. No. of Slices 692 960 72%
No. of Slice Flip
125 1920 6%
Flops
No. of 4input
1326 1920 69%
LUTs
No. of bonded
35 108 32%
IOBs
No. of GCLKs 1 24 4%

V. CONCLUSION
Fig. 11 The above figure shows the simulation result of
BFSK, where data_in represents the input signal and FPGA implementations of QAM, BASK, BFSK,
mod_out represents the modulated BFSK output signal. and BPSK digital modulators were demonstrated. The
10110101001 is given as the input and 11111100111 is main advantages of the implementations were the
the modulated output. minimum numbers of digital blocks used for performing
digital modulations. The input signals for all these digital
modulators were generated using CORDIC algorithm and
corresponding output signals are obtained in digitized
form. These design entry is done through VHDL coding
in Xilinx environment and finally all these modulators
were implemented separately using Spartan 3 FPGA.

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M.R. Thansekhar and N. Balaji (Eds.): ICIET’14 1531