The document outlines the syllabus for a Computer Organization and Design course, covering topics such as combinational circuits, logic gates, Boolean algebra, memory types, CPU architecture, and instruction cycles. It includes practical exercises involving binary operations, flip-flop designs, and comparisons of various architectures. The syllabus also emphasizes the importance of cache memory, data transfer processes, and the classification of external devices.
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SE Syllabus Computer Organization and Design
The document outlines the syllabus for a Computer Organization and Design course, covering topics such as combinational circuits, logic gates, Boolean algebra, memory types, CPU architecture, and instruction cycles. It includes practical exercises involving binary operations, flip-flop designs, and comparisons of various architectures. The syllabus also emphasizes the importance of cache memory, data transfer processes, and the classification of external devices.
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Computer Organization and Design
SE Syllabus (ALL Units 1 – 5)
1. Functional block diagram of computer organization. 2. Define a combinational circuit. Its types 3. Half Adder, Full Adder 4. Half Subtractor, Full Subtractor 5. MUX: 4:1, 8:1 6. Encoder: Definition, Types, 3x4 encoder 7. Draw Circuit diagram with pin numbers for below equation (^ sign indicate complement operation) i. (A+B+C).(A+B^+C).(A+B+C^) ii. (P . Q) + (R . P^) + (Q . R ) 8. logic gates IC no, TT, IC diagram, symbol: AND, OR, NOT, NAND, NOR, EX OR, EXNOR. 9. Find minimum Boolean equation using K map for function: Y(A,B,C) = ∑m (0,1,2,6,7) F(A,B,C,D) = ∑m (0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13) Y(A,B,C) = ∑m (1,4,6,7) 10. 2 bit magnitude comparator with Truth table and output equations. 11. 3 bit up counter with a clock diagram. 12. Convert: i. (741CD.FA)16= (?)8 ii. (110.5)10 = (?)2 iii. (1245.77)8= (?)16 iv. (10101.10)2 = (?)10 v. (43CFD.EFD)16= (?)2 vi. (765.2471)8 = (?)2 vii. (111010111.011)2=(?)8 viii. (110101111011010.111101101)2=(?)16 13. Perform following binary operation: i. 1’s Complement subtraction of 1001011011011.11– 11111000011011.00 ii. 2’s Complement subtraction of 1001111110001001– 1000011100100011 14. Perform binary subtraction using 1’s Complement method: i.1010110101111– 1001010101100 ii. 10101010110101010– 111101010101010 15. Perform binary subtraction using 2’s Complement method: i. 1011101001011101.11– 10011100111011.00 ii. 1010101010101010101– 0101010001010101010 16. Perform following binary arithmetic operations: i. 10111010101000110.11001 + 101101111100.01 ii. 110001011000 ÷ 11 iii. 101101101010101110110.110 + 101011011001010110.0010 iv. 11001x 11 v. 1011010 x 0100 vi. 1011010011111 ÷ 010 17. Apply Boolean expression laws to find the minimum Boolean term.: (^ sign indicate complement operation) i. (A+B+C).(A+B^+C) + (C . C^) ii. (C . B) + (B . U) + (U . C^ ) 18. Why is Boolean algebra used? state and prove any 4 boolean algebra laws 19. Demorgans law 20. Design T flip flop using J-K flip flop 21. Design S-R flip flop using NAND latch 22. Design D flip flop using S-R flip flop. 23. Classify memory and compare RAM and ROM 24. Classify memory and compare SRAM and DRAM 25. Different types of ROM in detail 26. Cache memory with block diagram and cache hit formula. 27. Importance of Cache memory? explain with block diagram and cache hit formula. 28. Recall READ HIT and READ MISS in terms of cache memory with block diagram and mention cache performance formula. 29. Memory hierarchy with a pyramid diagram. 30. Memory selection criteria for a computer. 31. Short note on associative memory. 32. Big-endian and little endian instruction arrangements with examples. 33. CPU architecture with block diagram. 34. Structure of a CPU with diagram. 35. Applications of Microprogramming. 36. Process of data transfer between processor and IO devices. 37. Complete instruction cycle with diagram. 38. Detailed instruction cycle with diagram. 39. Create a program to perform: arithmetic & logical addition/multiplication/subtraction/division/and/or operation of two numbers stored in temporary register t2 and t7 and store the result in t8 register using MIPS instructions. 40. Bus interconnection in computer with diagram. 41. All 15 registers definition. 42. Compare CISC and RISC architecture. 43. Functions of the IO module. 44. What is the IO module? write its primary function 45. What is programmed IO ? write its characteristics. 46. 2 stage CPU instruction pipeline system with timing diagram. 47. 6 stage CPU instruction pipeline system with timing diagram. 48. Register organization with diagram. 49. Short note on Interrupts and exceptions. 50. What is addressing mode? explain with an example. 51. Classify External devices with examples.