Lec-02 (Architecture of 8085)
Lec-02 (Architecture of 8085)
Course Code-COM-503
Lecture No-1
Model Institute of
Engineering & Technology
Course Outcomes
Course Description Mapping with Program
Outcomes Outcomes and Program
Specific Outcomes
CO2 Analyse, design, specify and test various assembly PO[1,2,3, 4,5,6,9,12]
PSO[1,2]
language programs of moderate complexity.
▪ Address Bus
▪ Data Bus
▪ Control Bus
Organization of a microprocessor-based system
The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates
with the other units using a 16-bit address bus, an 8-bit data bus and a
control bus.
The 8085 Bus Structure
Address Bus
Data Bus
▪ Operates in bidirectional mode: The data bits are sent from the
MPU to peripheral devices, as well as from the peripheral devices to
the MPU.
Registers
▪ Six general purpose 8-bit registers: B, C, D, E, H, L
Flag Bits
▪ Contains the memory address (16 bits) of the instruction that will
be executed in the next step
SUMMARY
• Draw and explain the functional block diagram of 8085 with each unit.
• Explain the register organization of 8085. Also draw and explain the flag
register in detail.
Home Assignment
• Explain the bus structure of 8085 with reference to the three buses of
8085.
Thank You