UITU Lab 10
UITU Lab 10
Objective:
Student Information
Student ID 24SP-019-CS
Date 14/12/24
Assessment
Total (Max.) Performance (04) Viva (04) File (02) Total (10)
Marks Obtained
Remarks
Signature
UIT University
Department of Computer Science/Software Engineering
CSC-111
Digital Logic Design
Lab 10
Instructio
ns
Come to the lab in time. Students who are late more than 15 minutes, will not be allowed to attend the lab.
Students have to perform the examples and exercises by themselves.
Raise your hand if you face any difficulty in understanding and solving the examples or exercises.
Lab work must be submitted on or before the submission date.
1. Objective
The purpose of this lab session is to analyze and understand the basic operation of a multiplexer and
demultiplexer.
2. Labs Descriptions
Multiplexer:
A multiplexer (MUX) is a device that allows
digital information from several sources to be
routed onto a single line for transmission
over that line to a common destination.
The basic multiplexer has several data-
input lines and a single output line. It also has
data-select inputs, which permit digital data on
any one of the inputs to be switched to the
output line. Multiplexers are also known as
data selectors
Figure 1: Multiplexer
Demultiplexer:
A demultiplexer (DEMUX) basically reverses
the multiplexing function. It takes digital
information from one line and distributes it to
given number of output lines. For this reason,
the demultiplexer is also known as a data
distributor.
Figure 2: Demultiplexer
2.1 Lab Equipment:
M21-7000 trainer or ETS-5000 trainer, IC’s (74151, 74154, 74280), DMM, Logic Probe
2.2 Procedure:
a) Insert all logic IC’s one by one into the bread-boarding socket, connect pin 14 to +5V and pin 7 to GND.
b) Experimentally verify that the respective logic gate is working properly by determining its truth table. You can
do this by connecting the inputs to switches and the output to one of the LEDs on the Trainer.
c) Also observe the output with DMM and logic probe. Record your observations in the respective tables.
3. Lab tasks
Task 1
Construct the logic circuit on hardware for 8-Input Data Selector/Multiplexer (see appendix at the end for
pin description), and complete the truth table.
Task 2
Construct the logic circuit on hardware for 4 line–to–16-line Demultiplexer (see appendix at the end for
pin description), and complete the truth table.
4. Homework Tasks