+

William Stallings
Computer Organization
and Architecture
10th Edition
© 2016 Pearson Education, Inc., Hoboken,
NJ. All rights reserved.
+
Chapter 1
Basic Concepts and
Computer Evolution
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 Computer Architecture
Computer Organization
• Attributes of a system • Instruction set, number of
visible to the bits used to represent
programmer various data types, I/O
• Have a direct impact on mechanisms, techniques
the logical execution of a for addressing memory
program

Architectural
Computer
attributes
Architecture
include:

Organizational
Computer
attributes
Organization
include:

• Hardware details • The operational units and

transparent to the their interconnections
programmer, control that realize the
signals, interfaces architectural
between the computer specifications
and peripherals, memory
technology used

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+
IBM System
370 Architecture
◼ IBM System/370 architecture
◼ Was introduced in 1970
◼ Included a number of models
◼ Could upgrade to a more expensive, faster model without having to
abandon original software
◼ New models are introduced with improved technology, but retain the
same architecture so that the customer’s software investment is
protected
◼ Architecture has survived to this day as the architecture of IBM’s
mainframe product line

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The Art of Managing Complexity
◼ Abstraction

◼ Discipline

◼ The Three –y’s

◼ Hierarchy
◼ Modularity
◼ Regularity

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <5>
Abstraction
programs

Hiding details when device drivers

they aren’t important instructions
registers

focus of this course

datapaths
controllers

adders
memories

AND gates
NOT gates

amplifiers
filters

transistors
diodes

electrons

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <6>
The Three -y’s
• Hierarchy
– A system divided into modules and
submodules
• Modularity
– Having well-defined functions and interfaces
• Regularity
– Encouraging uniformity, so modules can be
easily reused

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <7>
+
Structure and Function
◼ A computer is a complex
system; contemporary
computers contain millions of
Elementary electronic
components. How, then, can one
clearly describe them? The key
is to recognize the hierarchical ◼ At each level, the designer is
nature of most complex systems, concerned with structure and
including the computer function
◼ Hierarchical system
◼ Structure
◼ Set of interrelated subsystems
◼ The way in which components
◼ Hierarchical nature of complex relate to each other
systems is essential to both their
design and their description ◼ Function
◼ Designer need only deal with a ◼ The operation of individual
particular level of the system at components as part of the
a time structure
◼ Concerned with structure and
function at each level

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+
Function
◼ There are four basic functions that a computer can perform:
◼ Data processing
◼ Data may take a wide variety of forms and the range of
processing requirements is broad
◼ Data storage
◼ Short-term
◼ Long-term
◼ Data movement
◼ Input-output (I/O) - when data are received from or delivered to
a device (peripheral) that is directly connected to the computer
◼ Data communications – when data are moved over longer
distances, to or from a remote device
◼ Control
◼ A control unit manages the computer’s resources and
orchestrates the performance of its functional parts in response
to instructions
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 COMPUTER

I/O Main
memory

System
Bus

CPU

CPU

Registers ALU

Structure Internal
Bus

Control
Unit

CONTROL
UNIT
Sequencing
Logic

Control Unit
Registers and
Decoders

Control
Memory

Figure 1.1 A Top-Down View of a Computer

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+
 CPU – controls the operation of
the computer and performs its
There are four data processing functions
main structural
components  Main Memory – stores data
of the computer:  I/O – moves data between the
computer and its external
environment

 System Interconnection –
some mechanism that provides
for communication among CPU,
main memory, and I/O

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+ ◼ Control Unit
CPU
◼ Controls the operation of the CPU
and hence the computer
Major structural
◼ Arithmetic and Logic Unit (ALU)
components:
◼ Performs the computer’s data
processing function

◼ Registers
◼ Provide storage internal to the CPU

◼ CPU Interconnection
◼ Some mechanism that provides for
communication among the control
unit, ALU, and registers

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+
Multicore Computer Structure

◼ Central processing unit (CPU)

◼ Portion of the computer that fetches and executes instructions
◼ Consists of an ALU, a control unit, and registers
◼ Referred to as a processor in a system with a single processing unit

◼ Core
◼ An individual processing unit on a processor chip
◼ May be equivalent in functionality to a CPU on a single-CPU system
◼ Specialized processing units are also referred to as cores

◼ Processor
◼ A physical piece of silicon containing one or more cores
◼ Is the computer component that interprets and executes instructions
◼ Referred to as a multicore processor if it contains multiple cores

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+
Cache Memory

◼ Multiple layers of memory between the processor and main

memory

◼ Is smaller and faster than main memory

◼ Used to speed up memory access by placing in the cache

data from main memory that is likely to be used in the near
future

◼ A greater performance improvement may be obtained by

using multiple levels of cache, with level 1 (L1) closest to the
core and additional levels (L2, L3, etc.) progressively farther
from the core

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 MOTHERBOARD
Main memory chips

Processor
I/O chips chip

PROCESSOR CHIP

Core Core Core Core

L3 cache L3 cache

Core Core Core Core

CORE
Arithmetic
Instruction and logic Load/
logic unit (ALU) store logic

L1 I-cache L1 data cache

L2 instruction L2 data
cache cache

Figure 1.2 Simplified View of Major Elements of a Multicore Computer

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 +

Figure 1.3
Motherboard with Two Intel Quad-Core Xeon Processors

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 Figure 1.4

zEnterprise
EC12 Processor
Unit (PU)
Chip Diagram

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 Figure 1.5

zEnterprise
EC12
Core Layout

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+
History of Computers
First Generation: Vacuum Tubes

◼ Vacuum tubes were used for digital logic

elements and memory
◼ IAS computer
◼ Fundamental design approach was the stored program concept
◼ Attributed to the mathematician John von Neumann
◼ First publication of the idea was in 1945 for the EDVAC
◼ Design began at the Princeton Institute for Advanced Studies
(IAS)
◼ Completed in 1952
◼ Prototype of all subsequent general-purpose computers

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 Central processing unit (CPU)

Arithmetic-logic unit (CA)

AC MQ

Input-
Arithmetic-logic output
circuits
equipment
(I, O)

MBR

Instructions
and data

Instructions
and data
M(0)
M(1)
M(2)
M(3) PC IBR
M(4) AC: Accumulator register
MQ: multiply-quotient register
MBR: memory buffer register
IBR: instruction buffer register
MAR IR PC: program counter
MAR: memory address register
Main
IR: insruction register
memory
(M)
Control
Control
circuits
signals
M(4092)
M(4093)
M(4095)
Program control unit (CC)

Addresses

Figure 1.6 IAS Structure

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 0 1 39

sign bit (a) Number word

left instruction (20 bits) right instruction (20 bits)

0 8 20 28 39

opcode (8 bits) address (12 bits) opcode (8 bits) address (12 bits)

(b) Instruction word

Figure 1.7 IAS Memory Formats

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+ Registers
Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit

Memory address • Specifies the address in memory of the word to be written from
register (MAR) or read into the MBR

Instruction register (IR) • Contains the 8-bit opcode instruction being executed

Instruction buffer • Employed to temporarily hold the right-hand instruction from a

register (IBR) word in memory

• Contains the address of the next instruction pair to be fetched

Program counter (PC) from memory

Accumulator (AC) and • Employed to temporarily hold operands and results of ALU
multiplier quotient (MQ) operations

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 Start

Yes Is next No
instruction MAR PC
No memory in IBR?
Fetch access
cycle required
MBR M(MAR)

Left
No Yes IBR MBR (20:39)
IR IBR (0:7) IR MBR (20:27) instruction
IR MBR (0:7)
MAR IBR (8:19) MAR MBR (28:39) required?
MAR MBR (8:19)

PC PC + 1

Decode instruction in IR

AC M(X) Go to M(X, 0:19) If AC > 0 then AC AC + M(X)

go to M(X, 0:19)

Execution Yes
Is AC > 0?
cycle

MBR M(MAR) PC MAR No MBR M(MAR)

AC MBR AC AC + MBR

M(X) = contents of memory location whose addr ess is X

(i:j) = bits i through j

Figure 1.8 Partial Flowchart of IAS Operation

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 Symbolic
Instruction Type Opcode Representation Description
00001010 LOAD MQ Transfer contents of register MQ to the
accumulator AC
00001001 LOAD MQ,M(X) Transfer contents of memory location X to
MQ
00100001 STOR M(X) Transfer contents of accumulator to memory
Data transfer location X
00000001 LOAD M(X) Transfer M(X) to the accumulator
00000010 LOAD –M(X) Transfer –M(X) to the accumulator
00000011 LOAD |M(X)| Transfer absolute value of M(X) to the
accumulator
00000100 LOAD –|M(X)| Transfer –|M(X)| to the accumulator
Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half of M(X)

Table 1.1
branch 00001110 JUMP M(X,20:39) Take next instruction from right half of M(X)
00001111 JUMP+ M(X,0:19) If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
0 JU If number in the
0 MP accumulator is nonnegative,
Conditional branch 0 + take next instruction from

The IAS
1 M(X right half of M(X)
0 ,20:
0 39)

Instruction Set
0
0
00000101 ADD M(X) Add M(X) to AC; put the result in AC
00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC
00000110 SUB M(X) Subtract M(X) from AC; put the result in AC
00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder

00001011 MUL M(X)

in AC
Multiply M(X) by MQ; put most significant The IAS
bits of result in AC, put least significant bits
Arithmetic

00001100 DIV M(X)

in MQ
Divide AC by M(X); put the quotient in MQ
computer had a
and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one
bit position
total of 21
00010101 RSH Divide accumulator by 2; i.e., shift right one
position
instructions
00010010 STOR M(X,8:19) Replace left address field at M(X) by 12
rightmost bits of AC
Address modify
00010011 STOR M(X,28:39) Replace right address field at M(X) by 12
rightmost bits of AC (Table can be found on page 17 in the textbook.)

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+
History of Computers
Second Generation: Transistors
◼ Smaller

◼ Cheaper

◼ Dissipates less heat than a vacuum tube

◼ Is a solid state device made from silicon

◼ Was invented at Bell Labs in 1947

◼ It was not until the late 1950’s that fully transistorized

computers were commercially available

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+
Transistor

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+
Table 1.2
Computer Generations

Approximate Typical Speed

Generation Dates Technology (operations per second)
1 1946–1957 Vacuum tube 40,000
2 1957–1964 Transistor 200,000
3 1965–1971 Small and medium scale 1,000,000
integration
4 1972–1977 Large scale integration 10,000,000
5 1978–1991 Very large scale integration 100,000,000
6 1991- Ultra large scale integration >1,000,000,000

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+
Second Generation Computers

◼ Introduced:
◼ More complex arithmetic and logic units and
control units
◼ The use of high-level programming languages
◼ Provision of system software which provided the
ability to:
◼ Load programs
◼ Move data to peripherals
◼ Libraries perform common computations

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 IBM 7094 computer Peripheral devices

Mag tape
units
CPU
Card
punch
Data
channel Line
printer

Card
reader

Drum
Multi- Data
plexor channel
Disk

Data
Disk
channel

Hyper-
tapes

Memory Data Teleprocessing

channel equipment

Figure 1.9 An IBM 7094 Configuration

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 History of Computers
Third Generation: Integrated Circuits

◼ 1958 – the invention of the integrated circuit

◼ Discrete component
◼ Single, self-contained transistor
◼ Manufactured separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit boards
◼ Manufacturing process was expensive and cumbersome

◼ The two most important members of the third generation

were the IBM System/360 and the DEC PDP-8

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+
Integrated Circuit (IC)

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 Boolean Binary
Input logic Output Input storage Output
function cell

Read

Activate Write
signal

(a) Gate (b) Memory cell

Figure 1.10 Fundamental Computer Elements

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+ ◼ A computer consists of gates,
Integrated memory cells, and
interconnections among these
Circuits elements

◼ The gates and memory cells

◼ Data storage – provided by are constructed of simple
memory cells digital electronic components
◼ Data processing – provided by
gates ◼ Exploits the fact that such
components as transistors,
resistors, and conductors can be
◼ Data movement – the paths fabricated from a
among components are used semiconductor such as silicon
to move data from memory to
memory and from memory ◼ Many transistors can be
through gates to memory produced at the same time on a
single wafer of silicon
◼ Control – the paths among
components can carry control ◼ Transistors can be connected
signals with a processor metallization to
form circuits

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 Wafer

Chip

Gate

Packaged
chip

Figure 1.11 Relationship Among Wafer, Chip, and Gate

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 t
ui
g

ed of
rc
or in

ga w
d
st rk

ci

ul l a
at n

te
gr tio
si o

’s
an w

om e
te n

r
tr irst

in ve

pr o o
In

M
F

100 bn
10 bn
1 bn
100 m
10 m
100,000
10.000
1,000
100
10
1
1947 50 55 60 65 70 75 80 85 90 95 2000 05 11

Figure 1.12 Growth in Transistor Count on Integrated Circuits

(DRAM memory)

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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Moore’s Law
1965; Gordon Moore – co-founder of Intel

Observed number of transistors that could be

put on a single chip was doubling every year

Consequences of Moore’s law:

The pace slowed to a
doubling every 18
months in the 1970’s
but has sustained The cost of The electrical Computer
computer logic path length is becomes smaller Reduction in
that rate ever since and memory shortened, power and
Fewer
and is more
interchip
circuitry has increasing convenient to cooling
use in a variety connections
fallen at a operating requirements
dramatic rate speed of environments

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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
IBM System/360

◼ Announced in 1964

◼ Product line was incompatible with older IBM machines

◼ Was the success of the decade and cemented IBM as the

overwhelmingly dominant computer vendor

◼ The architecture remains to this day the architecture of IBM’s

mainframe computers

◼ Was the industry’s first planned family of computers

◼ Models were compatible in the sense that a program written for
one model should be capable of being executed by another
model in the series

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+ Family Characteristics
The concept of a family of compatible computers was
both novel and extremely successful. A customer with
modest requirements and a budget to match could start
with the relatively inexpensive Model.

Similar or
Similar or
identical Increasing
identical
operating speed
instruction set
system

Increasing
Increasing
number of I/O Increasing cost
memory size
ports

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 In the same year that IBM shipped its first System/360, another momentous
first shipment occurred: PDP-8 from Digital Equipment Corporation(DEC).
At a time when the average computer required an air-conditioned room, the
PDP-8. (dubbed a minicomputer by the industry, after the miniskirt of the day)
was small enough that it could be placed on top of a lab bench or be built into
other equipment. It could not do everything the mainframe could, but at
$16,000, it was cheap enough for each lab technician to have one. In contrast,
the System/360 series of mainframe computers introduced just a few months
before cost hundreds of thousands of dollars.

Console Main I/O I/O

CPU
controller memory module module

Omnibus

Figure 1.13 PDP-8 Bus Structure

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 + LSI
Large
Scale
Later Integration

Generations
VLSI
Very Large
Scale
Integration

ULSI
Semiconductor Memory Ultra Large
Microprocessors Scale
Integration

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 Semiconductor Memory
In 1970 Fairchild produced the first relatively capacious semiconductor memory

Chip was about the size Could hold 256 bits of

Non-destructive Much faster than core
of a single core memory

In 1974 the price per bit of semiconductor memory dropped below the price per bit
of core memory
There has been a continuing and rapid decline in Developments in memory and processor
memory cost accompanied by a corresponding technologies changed the nature of computers in
increase in physical memory density less than a decade

Since 1970 semiconductor memory has been through 13 generations

Each generation has provided four times the storage density of the previous generation, accompanied
by declining cost per bit and declining access time

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+
Microprocessors
◼ The density of elements on processor chips continued to rise
◼ More and more elements were placed on each chip so that fewer
and fewer chips were needed to construct a single computer
processor

◼ 1971 Intel developed 4004

◼ First chip to contain all of the components of a CPU on a single
chip
◼ Birth of microprocessor

◼ 1972 Intel developed 8008

◼ First 8-bit microprocessor

◼ 1974 Intel developed 8080

◼ First general purpose microprocessor
◼ Faster, has a richer instruction set, has a large addressing
capability
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 Evolution of Intel Microprocessors

4004 8008 8080 8086 8088

Introduced 1971 1972 1974 1978 1979
5 MHz, 8 MHz, 10
Clock speeds 108 kHz 108 kHz 2 MHz 5 MHz, 8 MHz
MHz
Bus width 4 bits 8 bits 8 bits 16 bits 8 bits
Number of
2,300 3,500 6,000 29,000 29,000
transistors
Feature size
10 8 6 3 6
(µm)
Addressable 640 Bytes 16 KB 64 KB 1 MB 1 MB
memory

(a) 1970s Processors

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 Evolution of Intel Microprocessors

80286 386TM DX 386TM SX 486TM DX

CPU
Introduced 1982 1985 1988 1989
Clock speeds 6 MHz - 12.5 16 MHz - 33 16 MHz - 33 25 MHz - 50
MHz MHz MHz MHz
Bus width 16 bits 32 bits 16 bits 32 bits
Number of transistors
134,000 275,000 275,000 1.2 million
Feature size (µm) 1.5 1 1 0.8 - 1
Addressable
16 MB 4 GB 16 MB 4 GB
memory
Virtual
1 GB 64 TB 64 TB 64 TB
memory
Cache — — — 8 kB

(b) 1980s Processors

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 Evolution of Intel Microprocessors

486TM SX Pentium Pentium Pro Pentium II

Introduced 1991 1993 1995 1997
Clock speeds 16 MHz - 33 60 MHz - 166 150 MHz - 200 200 MHz - 300
MHz MHz, MHz MHz
Bus width 32 bits 32 bits 64 bits 64 bits
Number of 1.185 million 3.1 million 5.5 million 7.5 million
transistors
Feature size (µm) 1 0.8 0.6 0.35
Addressable
4 GB 4 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
512 kB L1 and 1
Cache 8 kB 8 kB 512 kB L2
MB L2

(c) 1990s Processors

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 Evolution of Intel Microprocessors
Core 2 Duo Core i7 EE
Pentium III Pentium 4
4960X
Introduced 1999 2000 2006 2013
Clock speeds 450 - 660 MHz 1.3 - 1.8 GHz 1.06 - 1.2 GHz 4 GHz
Bus
wid 64 bits 64 bits 64 bits 64 bits
th
Number of 9.5 million 42 million 167 million 1.86 billion
transistors
Feature size (nm) 250 180 65 22
Addressable
64 GB 64 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
Cache 512 kB L2 256 kB L2 2 MB L2 1.5 MB L2/15
MB L3
Number of cores 1 1 2 6

(d) Recent Processors

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+
The Evolution of the Intel x86
Architecture
◼ Two common processor families are the Intel x86 and the
ARM architectures

◼ Current x86 offerings represent the results of decades of

design effort on complex instruction set computers (CISCs)

◼ An alternative approach to processor design is the reduced

instruction set computer (RISC)

◼ ARM architecture is used in a wide variety of embedded

systems and is one of the most powerful and best-designed
RISC-based systems on the market

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 Highlights of the Evolution of the
Intel Product Line:
8080 8086 80286 80386 80486
• World’s first • A more • Extension of the • Intel’s first 32- • Introduced the
general- powerful 16-bit 8086 enabling bit machine use of much
purpose machine addressing a • First Intel more
microprocessor • Has an 16-MB memory processor to sophisticated
• 8-bit machine, instruction instead of just support and powerful
8-bit data path cache, or 1MB multitasking cache
to memory queue, that technology and
• Was used in the prefetches a sophisticated
first personal few instructions instruction
computer before they are pipelining
(Altair) executed • Also offered a
• The first built-in math
appearance of coprocessor
the x86
architecture
• The 8088 was a
variant of this
processor and
used in IBM’s
first personal
computer
(securing the
success of Intel

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Highlights of the Evolution of the
Intel Product Line:
Pentium
• Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel

Pentium Pro
• Continued the move into superscalar organization with aggressive use of register renaming, branch
prediction, data flow analysis, and speculative execution

Pentium II
• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics
data efficiently

Pentium III
•Incorporated additional floating-point instructions
•Streaming SIMD Extensions (SSE)

Pentium 4
• Includes additional floating-point and other enhancements for multimedia

Core
• First Intel x86 micro-core

Core 2
• Extends the Core architecture to 64 bits
• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip
• An important addition to the architecture was the Advanced Vector Extensions instruction set

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+
Embedded Systems
◼ The use of electronics and software within a product

◼ Billions of computer systems are produced each year

that are embedded within larger devices

◼ Today many devices that use electric power have an

embedded computing system

◼ Often embedded systems are tightly coupled to their

environment
◼ This can give rise to real-time constraints imposed by the
need to interact with the environment
◼ Constraints such as required speeds of motion, required
precision of measurement, and required time durations,
dictate the timing of software operations
◼ If multiple activities must be managed simultaneously this
imposes more complex real-time constraints

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 Custom
logic

Processor Memory

Human Diagnostic
interface port

A/D D/A
conversion Conversion

Actuators/
Sensors
indicators

Figure 1.14 Possible Organization of an Embedded System

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+
The Internet of Things (IoT)
◼ Term that refers to the expanding interconnection of smart devices, ranging
from appliances to tiny sensors

◼ Is primarily driven by deeply embedded devices

◼ With reference to the end systems supported, the Internet has gone through
roughly fourGenerations of deployment culminating in the IoT:
◼ Information technology (IT)
◼ PCs, servers, routers, firewalls, and so on, bought as IT devices by enterprise IT
people and primarily using wired connectivity
◼ Operational technology (OT)
◼ Machines/appliances with embedded IT built by non-IT companies, such as
medical machinery, SCADA, process control, and kiosks, bought as appliances by
enterprise OT people and primarily using wired connectivity
◼ Personal technology
◼ Smartphones, tablets, and eBook readers bought as IT devices by consumers
exclusively using wireless connectivity and often multiple forms of wireless
connectivity
◼ Sensor/actuator technology
◼ Single-purpose devices bought by consumers, IT, and OT people exclusively using
wireless connectivity, generally of a single form, as part of larger systems

◼ It is the fourth generation that is usually thought of as the IoT and it is marked
by the use of billions of embedded devices

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+
Embedded Application Processors
Operating versus
Systems Dedicated Processors

◼ There are two general ◼ Application processors

approaches to developing an ◼ Defined by the processor’s ability to
execute complex operating systems, ,
embedded operating system such as Linux, Android, and Chrome
(OS): ◼ Thus, the application processor id
general-purpose in nature
◼ Take an existing OS and ◼ An example is the smartphone – the
adapt it for the embedded embedded system is designed to
application support numerous apps and perform a
wide variety of functions
◼ Design and implement an
OS intended solely for ◼ Dedicated processor
embedded use ◼ Is dedicated to one or a small number of
specific tasks required by the host
device
◼ Because such an embedded system is
dedicated to a specific task or tasks, the
processor and associated components
can be engineered to reduce size and
cost
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 Processor

Analog data A/D Temporary

RAM
acquisition converter data

Analog data D/A Program

ROM
transmission converter and data

Send/receive Serial I/O Permanent

EEPROM
data ports data

Peripheral Parallel I/O Timing

TIMER
interfaces ports System functions
bus

Figure 1.15 Typical Microcontroller Chip Elements

• Microprocessor: Processor on a chip

• Microcontroller is an entire computer on a chip, a microprocessor
with on-chip memory and I/O.
• Billions of microcontroller units are embedded each year in
myriad products from toys to appliances to automobiles. For
example, a single vehicle can use 70 or more microcontrollers.
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+
Deeply Embedded Systems
◼ Subset of embedded systems

◼ Has a processor whose behavior is difficult to observe both by the

programmer and the user

◼ Uses a microcontroller rather than a microprocessor

◼ Is not programmable once the program logic for the device has been
burned into ROM

◼ Has no interaction with a user

◼ Dedicated, single-purpose devices that detect something in the

environment, perform a basic level of processing, and then do
something with the results

◼ Often have wireless capability and appear in networked configurations,

such as networks of sensors deployed over a large area

◼ Typically have extreme resource constraints in terms of memory,

processor size, time, and power consumption

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 ARM

Refers to a processor architecture that has evolved from

RISC design principles and is used in embedded systems

Family of RISC-based microprocessors and microcontrollers

designed by ARM Holdings, Cambridge, England

Chips are high-speed processors that are known for their

small die size and low power requirements

Probably the most widely used embedded processor

architecture and indeed the most widely used processor
architecture of any kind in the world

Acorn RISC Machine/Advanced RISC Machine

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+
ARM Products

Cortex-M
• Cortex-M0
Cortex-R • Cortex-M0+
• Cortex-M3
Cortex- • Cortex-M4
A/Cortex-
A50

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+
The Cortex-A and Cortex-A50
◼ The Cortex-A and Cortex-A50 are application processors, intended for
mobile devices such as smartphones and eBook readers, as well as
consumer devices such as digital TV and home gateways (e.g., DSL and
cable Internet modems).

◼ These processors run at higher clock frequency (over 1 GHz), and

support a memory management unit (MMU), which is required for full
feature OSs such as Linux, Android, MS Windows, and mobile OSs.

◼ An MMU is a hardware module that supports virtual memory and paging

by translating virtual addresses into physical addresses; this topic is
explored in Chapter 8.

◼ The two architectures use both the ARM and Thumb-2 instruction sets;
the principal difference is that the Cortex-A is a 32-bit machine, and the
Cortex-A50 is a 64-bit machine.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Cortex-R
◼ The Cortex-R is designed to support real-time applications, in which the timing of events
needs to be controlled with rapid response to events. They can run at a fairly high clock
frequency (e.g., 200MHz to 800MHz) and have very low response latency.

◼ The Cortex-R includes enhancements both to the instruction set and to the processor
organization to support deeply embedded real-time devices.

◼ Most of these processors do not have MMU; the limited data requirements and the limited
number of simultaneous processes eliminates the need for elaborate hardware and
software support for virtual memory.

◼ The Cortex-R does have a Memory Protection Unit (MPU), cache, and other memory
features designed for industrial applications. An MPU is a hardware module that prohibits
one program in memory from accidentally accessing memory assigned to another active
program. Using various methods, a protective boundary is created around the program, and
instructions within the program are prohibited from referencing data outside of that
boundary.

◼ Examples of embedded systems that would use the Cortex-R are automotive braking
systems, mass storage controllers, and networking and printing devices.

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+
Cortex-M series
Cortex-M series processors have been developed primarily for the microcontroller domain
where the need for fast, highly deterministic interrupt management is coupled with the desire for
extremely low gate count and lowest possible power consumption. As with the Cortex-R series,
the Cortex-M architecture has an MPU but no MMU. The market for the Cortex-M includes IoT
devices, wireless sensor/actuator networks used in factories and other enterprises, automotive
body electronics, and so on.
There are currently four versions of the Cortex-M series:
■ Cortex-M0 :
Designed for 8- and 16-bit applications, this model emphasizes low cost, ultra low power, and
simplicity. It is optimized for small silicon die size (starting from 12k gates) and use in the
lowest cost chips.
■ Cortex-M0+ :
An enhanced version of the M0 that is more energy efficient.
■ Cortex-M3 :
Designed for 16- and 32-bit applications, this model emphasizes performance and energy
efficiency. It also has comprehensive debug and trace
features to enable software developers to develop their applications quickly.
■ Cortex-M4 :
This model provides all the features of the Cortex-M3, with additional instructions to support
digital signal processing tasks.

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 Security Analog Interfaces Timers &Triggers Parallel I/O Ports Serial Interfaces
Periph Timer/
bus int counter Pin
Hard- reset USART USB
ware A/D D/A Low Real
AES con- con- energy time ctr
General External Low-
verter verter energy
Pulse Watch- purpose Inter- UART
counter dog tmr I/O rupts UART

Peripheral bus
32-bit bus

Voltage Voltage High fre- High freq Flash SRAM Debug DMA
regula- compar- quency RC crystal memory memory inter- control-
tor ator oscillator oscillator 64 kB 64 kB face ler

Brown- Low fre- Low freq Memory

Power- protec-
out de- quency RC crystal Cortex-M3 processor
on reset tion unit
tector oscillator oscillator
Energy management Clock management Core and memory

Microcontroller Chip
ICode SRAM &
interface peripheral I/F
Bus matrix

Debug logic

Memory
DAP protection unit

ARM
NVIC core ETM
Cortex-M3 Core
NVIC ETM Cortex-M3
interface interface
Processor
32-bit ALU
Hardware 32-bit
divider multiplier

Control Thumb
logic decode
Instruction Data
interface interface

Figure 1.16 Typical Microcontroller Chip Based on Cortex-M3

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+
Cloud Computing
◼ NIST defines cloud computing as:

“A model for enabling ubiquitous, convenient,

on-demand network access to a shared pool of
configurable computing resources that can be
rapidly provisioned and released with minimal
management effort or service provider interaction.”

◼ You get economies of scale, professional network

management, and professional security management

◼ The individual or company only needs to pay for the storage

capacity and services they need

◼ Cloud provider takes care of security

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 Cloud Networking
◼ Refers to the networks and network management functionality that must
be in place to enable cloud computing

◼ One example is the provisioning of high-performance and/or high-

reliability networking between the provider and subscriber

◼ The collection of network capabilities required to access a cloud,

including making use of specialized services over the Internet, linking
enterprise data center to a cloud, and using firewalls and other network
security devices at critical points to enforce access security policies

Cloud Storage
◼ Subset of cloud computing

◼ Consists of database storage and database applications hosted

remotely on cloud servers

◼ Enables small businesses and individual users to take advantage of data

storage that scales with their needs and to take advantage of a variety of
database applications without having to buy, maintain, and manage the
storage assets
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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+ Summary
Basic Concepts and
Computer Evolution
Chapter 1
◼ Organization and architecture
◼ Embedded systems
◼ Structure and function
◼ The Internet of things
◼ Brief history of computers ◼ Embedded operating systems
◼ The First Generation: Vacuum ◼ Application processors versus
tubes
dedicated processors
◼ The Second Generation:
Transistors ◼ Microprocessors versus
◼ The Third Generation: Integrated microcontrollers
Circuits ◼ Embedded versus deeply
◼ Later generations embedded systems
◼ The evolution of the Intel x86
architecture ◼ ARM architecture
◼ ARM evolution
◼ Cloud computing ◼ Instruction set architecture
◼ Basic concepts
◼ ARM products
◼ Cloud services

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