Coma Lab
Coma Lab
INDEX
Sr. Page
Date Experiment Name Sign
No. No.
PRACTICAL-1
AIM: Write a program to add two 8-bit numbers.
PROGRAM:
LDA2500h
MOV B,A
LDA 2501h
ADD B
STA 2505h
HLT
INPUTS:
2500H: 35H
2501H: 23H
OUTPUT:
2505H: 58H
CONCLUSION:
Thus I verified the output of addition of two 8 bit numbers and verified the stored the results in output
memory locations.
PRACTICAL-2
AIM: Write a program to find one’s complement and two’s complement of 8-bit numbers.
PROGRAM:
LDA
2050H
CMA
MOV C,A
STA 2052H
ADI 01H
MOV E,A
STA 2053H
HLT
INPUT:
2050H: 35H
2052H: ?
2053H: ?
OUTPUT:
2052H: CAH
2053H: CBH
CONCLUSION:
PRACTICAL-3
AIM: Write a program to perform 16-bit addition of two numbers.
PROGRAM:
LHLD 2050H
XCHG
LHLD
2052H DAD
D SHLD
3050H HLT
2052H:
25H
2053H:
36H
CONCLUSION:
PRACTICAL-4
AIM: Write a program to multiply two 8-bit numbers using addition.
LDA 2200H
MOV B,A
LDA2201H
MOV C,A
Back: ADD B
DCR C
JNZ back
STA 2050H
HLT
INPUTS:
2050H: 03H
2050H: 05H
2050H: ?
OUTPUT:
2050H: 0FH
CONCLUSION:
PRACTICAL-5
AIM: Write an ALP to transfer a block of data from memory location 2010H to 2080H.
PROGRAM:
LXI H,2010H
LXI D,2080H
MVI C,10H
VISH1: MOV A,C
STAX D
INX H
INX D
DCR C
JNZ VISH1
HLT
INPUT: 2010H:
A2 2011H:
63H
2012H: 41H
2013H: 2DH
2014H: 3EH
2015H: FFH
2017H: 15H
2018H: F3H
2019H: EFH
201AH: 6CH
201BH: FCH
201CH: BCH
201DH: E1H
201EH:03H
201FH: E0H
OUTPUT: 2080H:
10H
2081H:
0FH
2082H: 0EH
2083H: 0DH
2084H: 0CH
2085H: 0BH
2086H: 0AH
Parul Institute of Technology 11
COMA LAB (203124210)
CSE Semester - III T07D22CYBER101
2087H: 09H
2088H: 08H
2089H: 07H
208AH: 06H
208BH: 05H
208CH: 04H
208DH: 03H
208EH: 02H
208FH: 01H
CONCLUSION:
PRACTICAL-6
AIM: Write a program to perform addition of 6 bytes of data stored at memory location
starting from 2050H.Use register B to save carry generated while performing addition.
Display sum and carry at consecutive locations 2070H and 2071H.
PROGRAM:
MVI A,00H
MOV B,A
LXI
H,2050H
MVI C,06H
nxtbyte: ADD M
JNC nxtmem
INR B
nxtmem: INX H
DCR C
JNZ nxtbyte
LXI H,2070H
MOV M,A
INX H
MOV M,B
HLT
INPUT: 2050H:
08H
2051H:
10H
2052H: 3AH
2053H: 47H
2054H: 4BH
2055H: 68H
OUTPUT: 2070H:
4CH
2071H: 01H
CONCLUSION:
PRACTICAL-7
(A)
AIM: Write a program to find the largest number of given two 8-bit numbers at 2050H &
2051H memory location. Store the result at 2060H.
PROGRAM:
LXI H,2050H
MOV A,M
INX H
CMP M
JNC NXT
MOV
A,M
NXT: STA
2060H
HLT
INPUT: 2050H:
6AH 2051H:
F4H
CONCLUSION:
PRACTICAL-7 (B)
AIM: Write a program to find the largest number in a set of 8 readings stored at 2050H.
Display the number at 2060H.
PROGRAM:
LXI H,2050H
MVI C,08H
MVI B,00H
NXT1: MOV A,M
CMP B
JNC
NEXT
MOV B,A
NEXT: INX H
DCR C
JNZ
NXT1
MOV A,B
STA 2060H
HLT
OBSERVATIONS:
Input:
2050H: 22H
2051H: 2FH
2052H: 6DH
2053H: 13H
2054H: 2AH
2055H: 9EH
2056H: EAH
2057H: 08H
Output:
2060H: EAH
CONCLUSION:
PRACTICAL-8
AIM: Write a program to arrange the numbers in ascending order. The numbers are stored
at 2050H onwards. [5 numbers]
PROGRAM:
LXI
H,4200H
MOV C,M
DCR C
SKIP: DCR D
JNZ
LOOP
DCR C
JNZ REPEAT
HLT
4201H: 01H
4202H: 02H
4203H: 03H
4204H: 04H
4205H: 05H
CONCLUSION:
PRACTICAL-9
AIM: Write a program to convert a number from BCD to Binary.
PROGRAM:
LDA 2010H
MOV B,A
ANI 0FH
MOV C,A
MOV A,B
ANI 0F0H
JZ SKIPMUL
RRC
RR
C
RR
C
RR
C
MOV D,A
XRA A
MVI
E,0AH
SUM: ADD D
DCR E
JNZ
SUM
SKIPMUL: ADD C
STA 2020H
HLT
CONCLUSION:
PRACTICAL-10
PROGRAM:
LXI
H,8000H
MOV A,M
MOV B,A
STC
CMC
SUI
0AH JC
NUM
ADI
41H
JMP STORE
NUM: MOV A,B
ADI 30H
STORE:INX H
MOV M,A
HLT
CONCLUSION:
PRACTICAL-11
Features of 8086
• 8086 is a 16bit processor. It’s ALU, internal registers works with 16bit binary word.
• 8086 has a 16bit data bus. It can read or write data to a memory/port
either 16bits or 8 bit at a time
• 8086 has a 20bit address bus which means, it can address upto
1MBmemory location
• Frequency range of 8086 is 6-10 MH.
1=main & index registers; 2=segment registers and IP; 3=address adder; 4=internal
address bus; 5=instruction queue; 6=control unit (very simplified!); 7=bus interface;
8=internal databus; 9=ALU; 10/11/12=external address/data/control bus.
Registers
The 8086 has eight more or less general 16-bit registers (including the
stack pointer but excluding the instruction pointer, flag register and segment
registers). Four of them, AX, BX, CX, DX, can also be accessed as twice as many 8-
bit registers while the other four, BP, SI, DI, SP, are 16-bit only.
A 64 KB (one segment) stack growing towards lower addresses is
supported in hardware; 16-bit words are pushed onto the stack, and the top of
the stack is pointed to by SS:SP. There are 256 interrupts, which can be invoked
by both hardware and software. The interrupts can cascade, using the stack to
store the return addresses.
The 8086 has 64 K of 8-bit (or alternatively 32 K of 16-bit word) I/O port space.
Flags
8086 has a 16-bit flags register. Nine of these condition code flags are active, and
indicate the current state of the processor: Carry flag (CF), Parity flag (PF), Auxiliary carry
flag(AF), Zero flag (ZF), Sign flag (SF), Trap flag (TF), Interrupt flag (IF), Direction flag (DF), and
Overflow flag (OF).
Segmentation
There are also four 16-bit segment registers that allow the 8086 CPU to access
one megabyte of memory in an unusual way. Rather than concatenating the segment
register with the address register, as in most processors whose address space exceeded
their register size, the 8086 shifts the 16-bit segment only four bits left before adding it to
the 16-bit offset (16×segment + offset), therefore producing a 20-bit external (or effective
or physical) address from the 32-bit segment: offset pair. As a result, each external
address can be referred to by 212 = 4096 different segment: offset pairs.
Conclusion:
We have studied the basic structure of the 8086 microprocessor.