Instruction Set of 8086 Microprocessor 16 Marks

Syllabus:
3.1 Machine Language Instruction format, addressing modes
3.2 Instruction set, Groups of Instructions
Arithmetic Instructions, Logical Instructions, Data transfer instructions, Bit manipulation instructions, String Operation
Instructions, Program control transfer or branching Instructions, Process control Instructions

Machine Language Instruction Format:

There are one or more fields in machine language instruction format.
The first field is called operation code (or opcode) field.It indicates the operation to be performed by microprocessor.
There are other fields known as operand fields.
The microprocessor performs different operations on these fields. The length of an instruction is determined by opcode
& operand fields. The length an instruction may vary from one byte to six bytes.
There are six general formats of instructions in 8086 instruction set. These are described below.
1. One byte instruction:
This format is one byte long. It may have the implied data or register operands. Three least significant bits (LSB) of
opcode are used to specify the register operand if any, otherwise, all 8 bits form an opcode and operands are implied.
Examples:
1. Moving data between registers.
2. Incrementing or decrementing a value in a register.
3. Performing simple arithmetic or logical operations.

2. Register to Register:
This format is two byte long. The first byte of instruction gives the opcode and size of operand (16 bit/8 bit) with help
of w bit. The second byte of instruction gives the register operands and R/M fields.
Example: MOV A, B (Move the content of register B to register A)
1. Instruction: MOV A, B
2. Operation: The contents of register B are copied into register A.
3. Length: Typically 1 byte (depending on the CPU architecture).

3. Register to Memory/Memory to Register without displacement:

This format is 2 byte long and similar to ‘register to register’ format. Here MOD field is 00.
Register to Memory
This instruction transfers data from a register to a specific memory location. The memory location is directly specified without
any displacement.

Instruction: MOV [destination], source

Example: MOV [0x1234], AX
 Memory to Register
This instruction transfers data from a memory location to a register. Again, the memory location is directly specified
without any displacement.
Instruction: MOV destination, [source]
Example: MOV AX, [0x1234]

4. Register to Memory/Memory to Register with displacement:

This instruction format contains one byte (for 8 bit displacement) or two bytes (for 16 bit displacement) additional
along with the previous format.

Register to Memory with Displacement

This instruction transfers data from a register to a memory location with an offset (displacement).
Instruction: MOV [base + displacement], source
Example: MOV [BX + 0x10], AX

Memory to Register with Displacement

This instruction transfers data from a memory location with an offset to a register.
Instruction: MOV destination, [base + displacement]
Example: MOV AX, [BX + 0x10]

In this instruction:
 Base: The content of the BX register acts as the base address.
 Displacement: The value 0x10 (16 in decimal) is the displacement added to the base address to form the final
memory address.
So, the instruction moves the content of the AX register to the memory location at BX + 0x10.
Example: MOV [BX + 0x10], AX
: MOV AX, [BP + SI + 0x04]
In this case:
 Base: The combined content of the BP and SI registers acts as the base address.
 Displacement: The value 0x04 (4 in decimal) is the displacement added to the base address to form the final
memory address. Here, the content of the memory location at BP + SI + 0x04 is moved into the AX register.
5.Immediate operand to Register:
In this instruction format, first byte and 3 bits from second byte (D3, D4, D5) are used as opcode. It contains 2 bytes of
immediate operand in case of 16 bit data.

This instruction transfers an immediate constant value to a register.

Instruction: MOV register, immediate
Example: MOV AX, 5

6.Immediate operand to Memory with 16 bit displacement:

This instruction format requires 5 or 6 bytes. First two bytes contain opcode, MOD and R/M fields. Next two bytes
contain 16 bit displacement and remaining two bytes contain immediate data.
This instruction moves an immediate constant value to a memory location specified by a base address plus a 16-bit
displacement.
Instruction: MOV [base + displacement], immediate
Example: MOV [BX + 0x0010], 5
In this example:
 BX is the base register.
 0x0010 (16 in decimal) is the 16-bit displacement.
 5 is the immediate operand (constant value) that is moved into the memory location at BX + 0x0010.

The opcode has indicator bits as follows:

1) w bit: In opcode, this bit indicates the size of operand. If w = 0, the operand is 0f 8 bits. If w = 1, the operand is of
16 bits.
2) d bit: If there are two operands in an instruction, this bit indicates that one operand is in a register. If d = 0, the
REG field specifies that it is a source operand. If d = 1, the REG field of opcode specifies that it is a destination
operand.
3) s bit: This bit is called as sign extension bit. This bit along with w bit gives the type of operation.

i) s = 0, w = 0 : 8 bit operation with 8 bit immediate operand

ii) s = 0, w = 1 : 16 bit operation with 16 bit immediate operand
iii) s = 1, w = 1 : 16 bit operation with signed 16 bit immediate operand.
4) v bit: This bit is used in shift and rotate instructions.

If v = 0, shift count is 1.
If v = 1, shift count is in CL register.
5) z bit: this bit is used by REP prefix to control the loop.

Addressing modes of 8086:

Addressing mode gives a way of locating data or operand. It describes the type of operands and the way in which these
operands are accessed for executing an instruction.
1) Immediate:
In this type of addressing mode, data is available in the instruction itself e.g.
MOV AX, 5000H
ADD BX, 1020H
2) Direct:
In this addressing mode a 16 bit offset address is directly specified in the instruction e.g.
MOV AX, [5000H]
3) Register:
4) Register Indirect:
In this mode, the operand is specified indirectly using some register. The contents of register point to some
memory location in Data Segment or Extra Segment. The registers used to specify memory location are BX,
SI, DI, BP e.g. MOV AX, [BX]
5) Indexed:
In this mode offset of operand is stored in either SI or DI register. This is a form of register indirect addressing mode
e.g. MOV AX, [SI]

6) Register relative:
In this addressing mode, effective address of data is formed by adding 8 bit or 16 bit displacement with the
contents of BX, BP, SI, or DI registers e.g. MOV AX, 50H [BX]
7) Based Indexed:
In this addressing mode, the effective address of data is formed by adding contents of base register (BX or BP)
to the contents of an index register (SI, DI)
e.g. MOV AX, [BX] [SI]
8) Relative Based Indexed:
The effective address of data, in this mode, is formed by adding an 8 bit / 16 bit displacement to the sum of
contents of any one base register(BX or BP) and any one index register (SI or DI).
e.g. MOV AX, 1000H [BX] [SI]

Instruction set of 8086:

The instructions of 8086 microprocessor are categorized into following main types:
1) Data copy/transfer instructions:
These instructions are used to transfer data from source to destination. All move, load, store, input and output
instructions belong to this category.
2) Arithmetic and logical instructions:
Instructions of this type are used to perform arithmetic, logical, increment, decrement, compare etc. operations.
3) Branch instructions:
These instructions transfer execution control to specified address. Cal, jump, return and interrupt instructions
belong to this category.
4) Loop instructions:
These instructions are used to implement conditional or unconditional loops. The loop count is stored in CX
register e.g. LOOP, LOOPZ, LOOPNZ instructions.
5) Machine control instructions:
These instructions are used to control 8086 microprocessor itself e.g. NOP, HLT, WAIT and LOCK instructions.
6) Flag manipulation instructions:
These instructions are used to set or reset flags of 8086 e.g. STC, CLC, CMC, STI, CLI, CLD, STD
instructions.
7) Shift and Rotate instructions:
These instructions are used to shift or rotate the bits of operand in either right or left direction. CL register can
be used to store the count of shift/rotate operation.
8) String instructions:
These instructions are used to perform string manipulation operations such as load, move, store, scan, compare etc.
1. Data transfer / copy instructions:
1) MOV: This instruction copies a word or byte from source to destination. The destination can be a register or
memory. The source can be a register, a memory location or an immediate data. No flags are affected after execution
of MOV instruction.
General form: MOV destination, source
 Examples: MOV CX, 1234H
MOV BL, [5000H]
MOV AX, BX
MOV AX, [SI]
MOV AX, 50H [BX]
2) PUSH: Push to stack
General form: PUSH source
 This instruction stores the contents of source on to the stack.
 The source can be a general purpose register, segment register or memory.
 No flags are affected by this instruction
Examples:
PUSH AX ; Let AX = 1122H, SS = 2000H, SP = FFFFH
PUSH DS
PUSH [2000H]
3) POP: Pop from stack
General form: POP destination
 This instruction copies a word from stack segment pointed by SP to destination. The destination can be
a general purpose register, a segment register or a memory location. After copying, SP is automatically
incremented by 2.
 No flags are affected by POP instruction

POP AX ; Let SS = 2000H and SP = FFFDH

POP DS
POP CS ; This is not allowed
POP [5000H]
4) XCHG: Exchange
General form: XCHG destination, source
 This instruction exchanges contents of source and destination.
 Source and destination both cannot be memory locations.
 Source and destination must be of same size (i.e. both must be bytes or both must be words).
 Segment register cannot be used with this instruction.
 No flags are affected by this instruction.
Examples:
XCHG AX, DX
XCHG BL, CL
XCHG [5000H], AX
5) IN: Copy data from a port
General form: IN Accumulator (AX or AL), Port
 This instruction copies data from a port to AL or AX register.
 If an 8 bit port is read, the data will go into AL.
 If a 16 bit port is read, the data will go to AX.
 No flags are affected.
Example 1) MOV DX, 8000H ; move port address into DX
IN AL, DX
2) MOV DX, 8080H ; move port address into DX
IN AX, DX
6) OUT: Output a byte or word to a port
General form: OUT Port, Accumulator (AX or AL)
 This instruction copies a byte from Al to a port or a word from AX to a port.
 Examples:
OUT 81H, AL
OUT 46H, AX
No flags are affected by this instruction.
7) XLAT: Translate a byte in AL
General form: XLAT
 This instruction is used to translate a byte from one code to another code.
 It replaces a byte in AL register with a byte pointed by BX in a lookup table in memory.
 Before using this instruction lookup table must be present in memory. Starting address of table is loaded in
BX register. The byte to be translated is loaded in AL.
 AL -> DS : [ BX + AL ]
 The value in AL is added to BX. This new value will be used as pointer in data segment.
 From the location, pointed by [BX+AL], data will be transferred to
AL. No flags are affected by this instruction.
ow to find ASCII value of a decimal digit (0 – 9) present in AL.
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
ASCII_CODES DB 30H,31H,32H,33H,34H,35H,36H,37H,38H,39H
DIGIT DB 05 ; Find ASCII code of 5
RES DB ? ; To store the result i.e. ASCII code
DATA ENDS
CODE SEGMENT
MAIN:
MOV AX, DATA ; Initialize data segment
MOV DS, AX
MOV BX, OFFSET ASCII_CODES ; Find offset of table
MOV AL, DIGIT ; Move code to AL
XLAT ; Find new code
MOV RES, AL ; Store result
MOV AH, 4CH ; Terminate the program
INT 21H
CODE ENDS
END MAIN
8) LEA: Load Effective Address
General form: LEA Register, source
 This instruction loads the effective address of destination operand into the source register.
 No flags are affected.
Example:
LEA BX, NUM1
9) LDS: Load Register and DS with words from memory
10) LES: Load Register and ES with words from memory
General form: LDS Register, Memory address of first word
 This instruction copies a word from memory into register specified. It then copies a word from next
memory locations into DS/ES.
 No flags are affected.
 Example:
LDS BX, [5000H]
11) LAHF: Load AH from lower byte of flag
General form: LAHF
 This instruction copies lower byte of flag register to AH register.
 No flags are affected.
 Example:
LAHF
12) SAHF: Store AH register to lower byte of flag register
General form: LAHF
 This instruction copies contents of AH register to lower byte of flag register.
 Depending upon the bits of AH register, the flags in the lower byte of flag register will be set or reset.
 Example:
SAHF
13) PUSHF: Push flags to stack
General form: PUSHF
 This instruction pushes the flag register contents on to the stack. Higher byte of flag is stored first and
then lower byte of the flag is stored.
 The SP is decremented by 2.
 No flags are affected.
 Example:
PUSHF
14) POPF: Pop flags from stack
General form: PUSHF
 This instruction loads the flag register from stack.
 SP is incremented by 2.
 All flags will be affected by this instruction.
 Example: POPF
2. Arithmetic instructions:
1) ADD: Add
General form: ADD destination, source
This instruction adds a number from source to destination. The result is available in destination.
 The source may be an immediate number, a register or a memory location.
 The destination may be a register or a memory location.
 Both source and destination cannot be memory locations.
 The size of source and destination must be same i.e. both must be bytes or both must be words.
 Segment registers cannot be used.
 Flags affected: All condition flags (A, C, O, P, S, Z).
Examples:
ADD AL, 67H
ADD DX, BX
ADD AX, [SI]
2) ADC: Add with Carry
General form: ADC destination, source
 The operation of this instruction is same as ADD instruction except it adds carry flag bit to the result.
 If CF=1 (set), 1 is added to the addition result.
 If CF=0 (reset), 0 is added to the addition result.
 All condition flags are affected by this instruction.
Examples:
ADC AX, BX
ADC AH, 67H
ADC BX, [SI]
3) SUB: Subtract
4) SBB: Subtract with Borrow
General form: SUB destination, source

te number, a register or a memory location.

rds.
SBB, borrow flag (i.e. Carry flag) and source will be subtracted from destination and result is placed in
destination.
SUB, only source will be subtracted from destination and result is placed in destination.
destination = destination - source

SUB AX, BX SUB

AH, 67H SUB
BX, [SI] SUB
CX, [5000H] SUB
[BX], 23H
5) INC: Increment
 General form: INC destination
 This instruction increments the destination by 1.
 The destination may be a register or a memory location.
 Immediate operand is not allowed.
 Flags affected: A, O, P, S and Z. Carry flag is not affected by this
instruction. Examples:
INC BL
INC CX
6) DEC: Decrement
General form: DEC destination
 This instruction subtracts 1 from destination.
 The destination may be a register or a memory location.
 Immediate operand cannot be used.
 Flags affected: A, O, P, S and Z. Carry flag is not affected by this instruction.
 Examples:
DEC CL
DEC BP
7) CMP: Compare
General form: CMP destination, source
 This instruction compares destination and source.
 Both can be byte operands or both can be word operands.
 The source can be an immediate number, a register or a memory locatin.
 The destination can be a register or a memory location.
 Both operands cannot be memory operands.
 Comparison is done by subtracting the source from destination (destination – source). Source and destination
remain unchanged.
All condition flags are affected to indicate the result of operation.
For example,
CMP CX, BX
i) If CX = BX CF = 0, ZF = 1, SF = 0
ii) If CX > BX CF = 0, ZF = 0, SF = 0
iii) If CX < BX CF = 1, ZF = 0, SF = 1
CMP AL, 01H
CMP BH, CL
CMP DX, NUM1
CMP [BX], 10H
8) AAA: ASCII Adjust after Addition
General form: AAA
 This instruction is generally used after an ADD instruction. AH must be cleared before ADD operation.
 This instruction converts the contents of AL to unpacked decimal digits.
 This instruction examines the lower 4 bits of AL whether it contains a value in the range 0 to 9.
 If it is between 0 – 9 and AF=0, this instruction sets 4 higher bits of AL to zero.
 If lower 4 bits of AL are in the range 0 – 9 and AF=1, 06H is added to AL. The upper four bits of AL
are cleared and AH is incremented by 1.
 If lower nibble (lower 4 bits) of AL is greater than 9, AL is incremented by 6 and AH is incremented by 1.
The upper nibble of AL is cleared and AF=CF=1.
 Flags affected: A, C
 Examples:
1) Let BL =
34H AL = 33H
 then
ADD AL, BL ; AL = 33 + 34 = 67H
AAA ; AL = 07H
2) Let BL =
34H AL = 36H
then
ADD AL, BL ; AL = 33 + 34 = 6AH
AAA ; Since lower 4 bits of AL = A > 9
therefore AL = AL + 06H
= 10H
AL = 00H, AH = 01H
9) AAS: ASCII Adjust after Subtraction
General form: AAA
 This instruction corrects the result in AL register. This instruction is used after subtraction operation.
 If lower nibble of AL is greater than 9 or if AF = 1, AL is decremented by 6 and AH is decremented by 1.
The CF and AF are set to 1.
10) AAM: ASCII Adjust after Multiplication
General form: AAM
 This instruction converts the product available in unpacked BCD format.
 This instruction is used after multiplication operation in which two unpacked BCD operands are multiplied.
 Flags affected: S, Z, P
 Example:
MOV AL, 04
MOV BL, 09
MUL BL ; AX = 0024H
AAM ; AH = 03, AL = 06
11) AAD: ASCII Adjust before Division
General form: AAM
 This instruction converts two unpacked BCD digits in AH and AL to equivalent binary number and stores it
in AL.
 Flags modified: S, Z, P
 This instruction is used before DIV instruction.
Example:
Let AX = 0508
AAD ; AL = 3AH
12) DAA: Decimal Adjust Accumulator
General form: DAA
 This instruction is used to convert the result of addition of two packed BCD numbers to a valid BCD numbers.
 The result has to be only in AL.
 If lower nibble of AL is greater than 9 or if AF = 1, it will add 06 to lower nibble in AL.
 After adding 06, if upper nibble of AL is greater than 9 or if CF=1, this instruction adds 60 to AL.
 Flags affected: S, Z, A, P, C
 Following examples explains this instruction.
i) Let AL = 53, CL = 29

DAA ; C > 9
7C + 06 = 82
ii) Let AL = 73, CL = 29

DAA ; C > 9
 9C + 06 = A2
A>9
A2 + 60 = 02 in AL and CF = 1
13) DAS: Decimal Adjust after Subtraction
General form: DAS
 This instruction is used after subtracting two packed BCD numbers. The result of subtraction must be in AL.
 If lower nibble of AL > 9 or the AF = 1 then this instruction will subtract 6 from lower nibble of AL.
 If the result in upper nibble is now greater than 9 or if carry flag was set, the instruction will subtract 60
from AL.
 Examples:
1) Let AL = 75, BH = 46
SUB AL, BH ; AL = 75 – 46
= 2F
DAS ; AL = AL - 06
= 2F - 06
= 29
2) Let AL = 49, BH = 72
SUB AL, BH ; AL = 49 - 72
= D7 with CF = 1
Since D > 9
AL = AL - 60
= D7 - 60
= 77 with CF = 1
14) NEG: Negate (Find 2’s complement)
General form: NEG destination
 This instruction finds 2’s complement of destination
 For finding 2’s complement, it subtracts the contents of destination from zero.
 The result is stored in destination.
 The destination may be a register or a memory location.
15) MUL: Unsigned multiplication of byte or word
General form: MUL source
 This instruction multiplies an unsigned byte by contents of AL or an unsigned word by contents of AX.
 The source can be a register or memory location. Immediate data cannot be used as source.
 When a byte is multiplied by AL, the result is put in AX.
 When a word is multiplied by AX, the result can be as large as 32 bits. The most significant word (upper 16
bits) of result is placed in DX. The least significant word (lower 16 bits) of result is placed in AX.
 If the most significant byte of 16 bit result or the most significant word of 32 bit result is 0, CF and OF will be
0. A, P, S and Z flags are undefined.
 Examples:

MUL BH ; AX = AL *
BH MUL CX ; DX :
AX = AX * CX
MUL BYTE PTR
16) IMUL: Multiply signed numbers [BX]
MUL WORD PTR [SI]
 General form: IMUL source
 This instruction multiplies a signed byte by AL or a signed word by contents of AX.
 The source can be a register or memory location. Immediate data can not be used as source.
 When a byte is multiplied by AL, the signed result is put in AX.
 When a word is multiplied by AX, the signed result is put in registers DX and AX with upper 16 bits in DX
and lower 16 bits in AX.
 If upper byte of 16 bit result or upper word of 32 bit result contains only sign bits (all 0s for positive result
and all 1s for negative result) then CF = OF = 0 (reset).
 If upper byte of 16 bit result or upper word of 32 bit result contains part of the product, CF = OF = 1 (set).
 A, P, S, Z flags undefined.
Examples:
IMUL BX
IMUL AX
IMUL WORD PTR [SI]
17) CBW: Convert signed Byte to signed Word.
General form: CBW
 This instruction copies the sign bit of a byte in AL to all bits in AH.
 No flags are affected.

18) CWD: Convert signed Word to signed Double word

General form: CWD
 This instruction copies the sign bit of a word in AX to all bits of DX register.
 No flags are affected.

19) DIV: Unsigned Divide

General form: DIV source
 This instruction is used to divide an unsigned word by a byte or an unsigned double word by a word.
 The source can be a register or memory location.
 When a word is divided by byte, the word must be in AX. After division, AL will contain an 8 bit
result (quotient) and AH will contain an 8 bit remainder.
 If a number is divided by zero or if result is greater than FFH, 8086 will automatically generate a type 0
interrupt.
 When a double word is divided by a word, the most significant word must be in DX and least significant
word must be in AX. After division, AX will contain the 16 bit result and DX will contain 16 bit remainder.
 If a number is divided by 0 or if the result is greater than FFFFH, type 0 interrupt is generated.
 All flags are undefined after a DIV instruction
Examples:
DIV BL ; AX / BL
DIV CX ; DX : AX / CX
DIV BYTE PTR [SI] ; AX / [SI]
20) IDIV: Signed division
General form: IDIV source register or memory
 This instruction is used to divide a signed word by a signed byte or a signed double word by a signed word.
 When a signed word is divided by signed byte, the word must be in AX. After division, AL will contain
signed result (quotient) and AH will contain signed remainder.
 If a number is divided by zero or if result is greater than 127 or result is less than -127, type 0 interrupt is
generated.
 When a signed double word is divided by a signed word, the most significant word must be in DX and least
significant word must be in AX. After division, AX will contain the 16 bit result and DX will contain 16 bit
remainder.
  If a number is divided by 0, or if the result is greater than 7FFFH, or if the result is less than 8001H, type
0 interrupt is generated.
o All flags are undefined.

IDIV BL
IDIV BP
IDIV BYTE PTR[BX]

3. Logical
1) AND: Logical AND
General form: AND destination, source
 This instruction ANDs bits of destination and source. The result is stored in destination.
 The source can be immediate number, a register or memory location.
 The destination can be a register or a memory location.
 Both operands cannot be memory locations.
 The size of operand must be same.
 Flags affected:
 OF = CF = 0 (reset)
 P, S and Z flags are modified.
 A (Auxiliary Carry) flag is undefined.
Examples: AND AX, 8000H
AND BH, CL
AND DX, [BX]
 General form: OR destination, source
2) OR: Logical OR
  This instruction performs OR operation on bits of source and destination. The result is stored in destination.
 The source can be immediate number, a register or memory location.
 The destination can be a register or a memory location.
 Both operands cannot be memory locations.
 The size of operand must be same.
 Flags affected:
 OF = CF = 0 (reset)
 P, S and Z flags are modified.
 A (Auxiliary Carry) flag is undefined.
Examples:
OR BX, CX OR
AL, DL OR
[BX], AH OR
AL, 30H
3) XOR: Logical Exclusive OR
General form: XOR destination, source
 This instruction performs logical exclusive OR operation on bits of source and destination. The result is
stored in destination.
 The source can be immediate number, a register or memory location.
 The destination can be a register or a memory location.
 Both operands cannot be memory locations.
 The size of operand must be same.
 Flags affected:
 OF = CF = 0 (reset)
 P, S and Z flags are modified.
 A (Auxiliary Carry) flag is undefined.
 Examples:
XOR AL, BL XOR
CX, DX XOR
BX, 5000H XOR
[SI], FFH XOR
DX, DX
4) NOT: Invert each bit of operand
General form: XOR destination
 This instruction complements the contents of destination.
 The destination can be register or memory location.
 No flags are affected.
 Examples:
NOT BX
NOT BYTE PTR[BX]
NOT WORD PTR[SI]
NOT CL

5) TEST: AND operands to update flags.

General form: TEST destination, source
This instruction logically ANDs the bits of source and destination.
No operand will change, only flags are updated.
Flags affected:
OF = CF = 0 (reset)
P, S and Z flags are modified.
A (Auxiliary Carry) flag is undefined
Examples:

TEST AX, BX TEST

[0500H], 06H TEST
AL, CL
4. Shift / Rotate instructions:
1) SHL: SHift operand bits Left
2) SAL: Shift Arithmetic Left operand bits
General form: SHL destination,
count
SAL destination, count
 These instructions shift the destination bits to the left.
 Zero is inserted at the least significant bit position (i.e. bit 0). Most Significant Bit is transferred to Carry flag.
 Destination can be a register or a memory location.
 The count can be 1 or specified by register CL.
 Flags affected A flag is undefined.
 O, S, Z, P and C flags are modified.
 For example, 1) Let AL = 79H = 0111 1001B
SHL AL, 1
SAL AL, 1
AL before execution:
AL after execution:
2) SAL BP, CL ; CL contains shift count
3) SHR: SHift Right
General form: SHR destination, count
 This instructions shift the destination bits to the right.
 Zero is filled in the most significant bit position. Least Significant Bit is transferred to Carry flag.
 Destination can be a register or a memory location.
 The count can be 1 or specified by register CL.
 Flags affected: A flag is undefined.
 O, S, Z, P and C flags are modified.
 For example, 1) Let AL = 79H = 0111 1001B
SHR AL, 1
AL before execution:
AL after execution:
2) SHR DX, CL
4) SAR: Shift Arithmetic Right
General form: SHR destination, count
 This instructions shift the destination bits to the right.
 It inserts the most significant bit of operand in new position.
 Destination can be a register or a memory location.
 The count can be 1 or specified by register CL.
 Flags affected: A flag is undefined
 O, S, Z, P and C flags are modified.
  For example, 1) Let AL = 1DH = 0001 1101B
SAR AL, 1 ; AL = 0000 1110B and Carry flag =1
2) BH = F3H = 1111 0011B
CL=02h
SAR BH, CL ; BH = 1111 1100B and Carry flag = 1
5) ROR: ROtate Right without carry
General form: ROR destination, count
 This instruction rotates the bits of destination to the right.
 The LSB is transferred to MSB as well as to carry flag.
 The destination can be a register or a memory location.
 The count can be 1 or specified by CL register.
 Flags affected: O and C flags are modified.
6) ROL: ROtate Left without carry
General form: ROL destination, count
 This instruction rotates the bits of destination to the left.
 The MSB is transferred to LSB as well as to carry flag.
 The destination can be a register or a memory location.
 The count can be 1 or specified by CL register.
 Flags affected: O and C flags are modified.
7) RCR: Rotate Right through Carry flag:
General form: RCR destination, count
 This instruction rotates the bits of destination to the right through Carry Flag (CF).
 The CF bit is transferred to MSB of destination.
 The LSB is transferred to carry flag.
 The destination can be a register or a memory location.
 The count can be 1 or specified by CL register.
 Flags affected: O and C flags are
modified. Examples:
1) RCR BX, 1
2) MOV CL, 04H
RCR DX, CL
3) RCR BYTE PTR [SI], 1
8) RCL: Rotate Left through Carry flag
General form: RCL destination, count
 This instruction rotates the bits of destination to left through Carry Flag (CF).
 The MSB of destination is transferred to carry flag.
 The CF bit is transferred to LSB of destination.
 The destination can be a register or a memory location.
 The count can be 1 or specified by CL register.
 Flags affected: O and C flags are
modified. Examples:
1) RCR BX, 1
2) MOV CL, 03H
RCR AX, CL
3) RCR WORD PTR [BX], 1
5. String manipulation instructions:
1) REP: Repeat instruction prefix
 This is used as a prefix to other instructions. The instruction to which REP prefix is used, is executed CX times. At
each iteration CX is automatically decremented by 1.there are two more repeat instruction prefix: REPE / REPZ i.e.
Repeat if equal/zero and REPNE / REPNZ i.e. Repeat if not equal/not zero.

2) MOVSB / MOVSW: Move String Byte or String Word

General form: MOVSB or REP MOVSB
 This instruction copies a byte or a word from a location in the data segment to a location in the extra segment.
 The offset of source byte/word in data segment must be in SI register.
 The offset of destination in extra segment must be in DI register.
 For multiple byte/multiple word moves, the number of elements to be moved is put in CX register. It acts
as counter.
 After a byte/word move, SI and DI are automatically adjusted to point to next source and destination byte/word.
 If Direction Flag (DF) = 0, SI and DI will be automatically incremented by 1 for byte move (MOVSB)
and incremented by 2 for word move (MOVSW).
 If DF = 1, then SI and DI will be automatically decremented.
 No flags are affected.
DS : SI ES : DI
3) CMPSB / CMPSW: Compare String Byte or Word
General form: CMPSB or REPE CMPSB
CMPSW or REPE CMPSW
 This instruction is used to compare two strings of byte or word.
 The length of string is stored in CX register.
 One string is stored in data segment and its offset is stored in SI.
 Second string is stored in extra segment and its offset is stored in DI.
 Comparison is done by subtracting the byte/word of destination from the byte/word of source. Neither
source nor destination is changed.
 All condition flags are affected.
 If DF = 0, after comparison SI and DI are automatically incremented by 1 or 2 (for CMPSB 1, for CMPSW 2).
 If DF = 1, after comparison SI and DI are automatically decremented by 1 or 2 (for CMPSB 1, for CMPSW 2).
4) SCANSB / SCANSW: Scan a String Byte or String Word.
General form: SCASB or REPNE SCASB
 This instruction compares a byte in AL or word in AX with a byte or word pointed to by DI in extra segment.
 If DF = 0, then DI will be incremented.
 If DF = 1, then DI will be decremented.
 If a match is found in the string Zero flag is set.
 Flags affected: All condition flags.
5) LODSB / LODSW: Load String Byte into AL or Load String Word in AX
General form: LODSB or LODSW
 This instruction loads a byte/word into AL/AX from contents of a string pointed to by DS : SI.
 SI is modified depending upon DF. If DF = 0, SI is incremented and if DF=1, SI is decremented.
 No flags are affected.
6) STOSB / STOSW: Store a Byte or Word in String
General form: STOSB or STOSW
 This instruction stores AL/AX contents to a location in string pointed by ES : DI.
 DI is modified depending upon DF. If DF = 0, DI is incremented by 1 for STOSB and incremented by 2
for STOSW instruction.
 No flags are affected by this instruction.
6. Branch and control transfer instructions:
Unconditional branch instructions:
1) CALL: Call a procedure
 This instruction is used to transfer execution to a subprogram or procedure (subroutine).
 There are two types of CALL: near and far
 A near CALL is a call to a procedure which is in the same code segment. The value of IP register is stored on
stack when call is executed.
 A far call is a call to a procedure which is in different code segment. When call is executed, value of CS and
IP registers is stored on stack.
Examples:
CALL ascending ; ascending is the name of procedure
CALL BX ; BX is copied into IP
CALL WORD PTR[BX] ; [BX] and [BX+1] contents copied into IP.
2) RET: Return from the procedure
 This instruction returns execution from a procedure to the next instruction after call instruction.
 If procedure is near procedure then value of IP is restored from stack.
 If procedure is far procedure then value of IP as well as CS is restored from stack.
3) INT N: Interrupt type N
General form: INT N
 N can be a value between 00H to FFH.
 When INT N is executed, N is multiplied by 4. the result will be used as offset and value 0000H will be used
as code segment value.
 The address 0000 : N*4 will be used to find new values of IP and CS in order to execute an Interrupt
Service Routine (ISR).
 Example: INT 21H
21H * 4 = 84H
0084H is an offset in CS = 0000H.
4) INTO: Interrupt on Overflow
General form: INTO
This instruction is executed when OF=1. the address of ISR is found (i.e. value of CS and IP) from memory location
0000 : 0016. this is equivalent to INT 04H.
5) JMP: Unconditional jump
 This instruction unconditionally transfers the control of execution to specified address.
 If control is transferred within same code segment it is called near jump or intra segment jump.
 If control is transferred to another code segment, it is called far jump or inter segment jump.
 No flags are affected.
 Examples:
JMP continue ; transfer execution to instruction having a label continue
6) IRET: Return from ISR
 This instruction is used as last instruction in an ISR.
 When an ISR is called, before transferring control to it, the flag, CS and IP registers are stored on the stack. At
the end of each ISR, when IRET is executed the values of IP, CS and flag registers are retrieved from the
stack.
7) LOOP: Loop unconditionally
General form: LOOP label
 This instruction executes instruction from thelabel upto LOOP instruction CX times.
 At each iteration, CX is automatically decremented.
 No flags are affected.
Examples: MOV AL, 00H
MOV CX, 0010
 next: ADD AL, CL
LOOP next
8) LOOPE / LOOPZ:
 Loop while CX ≠ 0 and ZF = 1 (set)
 This instruction executes the loop when CX ≠ 0 and ZF = 1.
 If ZF becomes 0 or CX = 0, the loop is terminated.
9) LOOPNE / LOOPNZ:
 Loop while CX ≠ 0 and ZF = 0 (reset)
 This instruction executes the loop when CX ≠ 0 and ZF = 0.
 If ZF becomes 1 or CX = 0, the loop is terminated.
Conditional branch instructions:
 These instructions transfer the execution control to given label if some condition is satisfied.
 The target address must be in the range -80H to 7FH (or -128 to 127) bytes from branch instruction.
 No flags are affected.
S. No. Instruction Operation
1 JZ / JE label Jump to label if ZF = 1
2 JNZ / JNE label Jump to label if ZF = 0
3 JS label Jump to label if SF = 1
4 JNS label Jump to label if SF = 0
5 JO label Jump to label if OF = 1
6 JNO label Jump to label if OF = 0
7 JP / JPE label Jump to label if PF = 1
8 JNP label Jump to label if PF = 0
9 JB / JNAE /JC label Jump to label if CF = 1
10 JNB / JAE / JNC labelJump to label if CF = 0
11 JBE / JNA label Jump to label if CF = 1 or ZF = 1
12 JNBE / JA label Jump to label if CF = 0 or ZF = 0
13 JL / JNGE label Jump if neither SF = 1 nor OF = 1
14 JNL / JGE label Jump if neither SF = 0 nor OF = 0
15 JLE / JNG label Jump to label if ZF = 1 or neither SF = 1 nor OF = 1
16 JNLE / JG label Jump to label if ZF = 0 or at least any of SF & OF is 1
17 JCXZ label Jump to label if CX = 0
7. Flag manipulation instructions :These instructions are used to control the processor action
by setting/resetting the flag values.
STC − Used to set carry flag CF to 1
CLC − Used to clear/reset carry flag CF to 0
CMC − Used to put complement at the state of carry flag CF.
STD − Used to set the direction flag DF to 1
CLD − Used to clear/reset the direction flag DF to 0
STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
8. Machine control instructions:These instructions control the machine status. NOP, HLT,WAIT and
LOCK instructions belong to this class.
HLT Halt processing. It stops program execution.
NOP Performs no operation.
When WAIT instruction is executed, the processor enters an idle state in which the processor does no
WAIT
processing.
LOCK is a prefix instruction. It makes the LOCK pin low till the execution of the next instruction.